TACC Steps Up to the MIC

By Michael Feldman

April 21, 2011

As Intel prepares to roll out its Many Integrated Core (MIC) technology for commercial production in 2012, it has managed to entice a major US supercomputing center to start porting some of its science codes to the new architecture. The Texas Advanced Computing Center (TACC) announced it has teamed up with the chipmaker and begun porting a handful of research applications to the pre-production “Knights Ferry” MIC processor. Later this year, TACC will build a cluster of such chips for further development, with the intent to deploy a system based on the commercial “Knights Corner” MIC processor when Intel starts production.

MIC represents Intel’s entry into the HPC processor accelerator sweepstakes, as the company attempts to perform an end-run around GPU computing. Mainly thanks to NVIDIA, over the last few years GPU computing, aka GPGPU, has become a mainstream HPC solution across workstations, clusters and supercomputers. They rely on specialized programming environments, like CUDA and OpenCL, to develop software on those platforms.

As suggested by its name, MIC is essentially an x86 processor, with more cores (but simpler ones) than a standard x86 CPU, an extra-wide SIMD unit for heavy duty vector math, and four-way SMT threading. As such, it’s meant to speed up codes that can exploit much higher levels of parallelization than can be had on standard x86 parts.

Knights Ferry is Intel’s development implementation spun out of the chipmaker’s abandoned Larrabee processor effort for visual computing. The chip sports 32 IA cores and runs at 1.2 GHz. Since each core supports a four-way SMP (as opposed to the two-way HyperThreading on Xeons), each chip can manage up to 128 threads in parallel. Memory-wise, Knights Ferry has 8 MB of cache and 1 to 2 GB of GPU-flavored GDDR5 DRAM. Like its current GPGPU competition, Knights Ferry is meant to be hooked up to a PCIe bus, acting as a co-processor to a standard x86 CPU.

Knights Corner will be Intel’s first commercial version of MIC, will have upwards of 50 cores per chip, and will be implemented on the company’s 22nm process technology. Although no official date has been announced for the commercial launch, according to a presentation by Intel research engineer Pradeep Dubey at the recent 2011 Open Fabrics International Workshop in Monterey, Knights Corner is slated for release sometime in the second half of 2012.

At this point, TACC is using the MIC software development kit (SDK), employing a Knights Ferry chip attached to a single machine. According to TACC’s deputy director Dan Stanzione, they are planning to build a “relatively small” cluster of Knights Ferry-equipped nodes to test codes in a distributed computing environment before the end of the year.

On Thursday, I spoke with Stanzione, who was very upbeat about the new architecture, noting that the x86 compatibility is a big deal for TeraGrid researchers. In aggregate, they have a massive investment in their science codes, numbering in the hundreds.

“This is a way to get a dramatically better power per operation without having to throw out everything we know about software,” he said, adding, “I’m really excited about this as a path forward. I think it has the potential to be a real game-changer.”

One nice feature of MIC programming is that it inherently supports OpenMP, a popular parallel computing model for shared memory environments. And since Intel’s HPC tool chain — Parallel Studio and Cluster Studio — has been extended to the MIC architecture, the programmer can even stay in the same development environment for both its Xeon and MIC work — which, of course, Intel would like very much.

The result is that OpenMP code written for four-core or six-core x86 CPUs, like some of the ones TACC has started porting, should move rather easily to a 32-core MIC co-processor. “Getting the codes to run the first time is pretty simple,” Stanzione said, adding that when they move to the MIC cluster, they’ll have to figure out how to layer an MPI distributed memory model on top of that.

According to him, they’ve already ported a bunch of benchmark codes and have started with the applications. One is a bio-modeling app, which attempts to detect epistatic interactions (how genes modify each other to express a phenotype) across a corn genome. The code was thousands of lines long, but because it was parallelized via OpenMP, it moved to MIC with minimal restructuring.

Although TACC has committed resources to the MIC effort, Stanzione said they are evaluating hardware and software accelerator approaches across the spectrum, most notably using CUDA and OpenCL on GPUs. (TACC’s Longhorn supercomputer is currently the center’s largest GPU platform, sporting 512 NVIDIA Tesla processors.) Although it’s too early to compare performance across specific applications, it’s already apparent that porting is much simpler with Intel’s offering.

“Moving a code to MIC might involve sitting down and adding a couple of lines of directives that takes a few minutes,” explained Stanzione. “Moving a code to a GPU is a project.”

Although measuring performance is still a work in progress, the early results on scaling appear to be encouraging. According to Stanzione, doubling the number of MIC cores has roughly doubled the performance on some of the initial codes. They expect to be able to say a lot more about performance when they get the Knights Corner commercial parts.

From Intel’s point of view, getting TACC to sign on to MIC development is a big boost for its manycore effort. Assuming the porting goes as planned, the chipmaker will be able to point to a nice set of proof points based on real-world HPC applications. According to John Hengeveld, Intel’s director of technical compute marketing for its datacenter group, they’ll be able to incorporate TACC’s experience into the upcoming delivery of Knights Corner parts and software. “Having a partner that is helping us work on issues of scalability and optimization is really quite valuable,” he explained.

Although TACC is the first big HPC organization with a committed roadmap for MIC development, they won’t be the last. Intel currently has about 100 MIC developers scattered around, and according to Hengeveld, they’ll be announcing some bigger collaborations in the months ahead. And as we get closer to MIC’s commercial release, the news surrounding the new architecture should start to pick up. “We’ll be talking a lot more about this at ISC,” promised Hengeveld.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Scalable Informatics Ceases Operations

March 23, 2017

On the same day we reported on the uncertain future for HPC compiler company PathScale, we are sad to learn that another HPC vendor, Scalable Informatics, is closing its doors. Read more…

By Tiffany Trader

‘Strategies in Biomedical Data Science’ Advances IT-Research Synergies

March 23, 2017

“Strategies in Biomedical Data Science: Driving Force for Innovation” by Jay A. Etchings is both an introductory text and a field guide for anyone working with biomedical data. Read more…

By Tiffany Trader

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

Google Launches New Machine Learning Journal

March 22, 2017

On Monday, Google announced plans to launch a new peer review journal and “ecosystem” Read more…

By John Russell

HPE Extreme Performance Solutions

HFT Firms Turn to Co-Location to Gain Competitive Advantage

High-frequency trading (HFT) is a high-speed, high-stakes world where every millisecond matters. Finding ways to execute trades faster than the competition translates directly to greater revenue for firms, brokerages, and exchanges. Read more…

Swiss Researchers Peer Inside Chips with Improved X-Ray Imaging

March 22, 2017

Peering inside semiconductor chips using x-ray imaging isn’t new, but the technique hasn’t been especially good or easy to accomplish. Read more…

By John Russell

LANL Simulation Shows Massive Black Holes Break ‘Speed Limit’

March 21, 2017

A new computer simulation based on codes developed at Los Alamos National Laboratory (LANL) is shedding light on how supermassive black holes could have formed in the early universe contrary to most prior models which impose a limit on how fast these massive ‘objects’ can form. Read more…

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Intel Ships Drives Based on 3D XPoint Non-volatile Memory

March 20, 2017

Intel Corp. has begun shipping new storage drives based on its 3D XPoint non-volatile memory technology as it targets data-driven workloads. Intel’s new Optane solid-state drives, designated P4800X, seek to combine the attributes of memory and storage in the same device. Read more…

By George Leopold

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the campaign. Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

New Japanese Supercomputing Project Targets Exascale

March 14, 2017

Another Japanese supercomputing project was revealed this week, this one from emerging supercomputer maker, ExaScaler Inc., and Keio University. The partners are working on an original supercomputer design with exascale aspirations. Read more…

By Tiffany Trader

Nvidia Debuts HGX-1 for Cloud; Announces Fujitsu AI Deal

March 9, 2017

On Monday Nvidia announced a major deal with Fujitsu to help build an AI supercomputer for RIKEN using 24 DGX-1 servers. Read more…

By John Russell

HPC4Mfg Advances State-of-the-Art for American Manufacturing

March 9, 2017

Last Friday (March 3, 2017), the High Performance Computing for Manufacturing (HPC4Mfg) program held an industry engagement day workshop in San Diego, bringing together members of the US manufacturing community, national laboratories and universities to discuss the role of high-performance computing as an innovation engine for American manufacturing. Read more…

By Tiffany Trader

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

Leading Solution Providers

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the campaign. Read more…

By John Russell

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Intel and Trump Announce $7B for Fab 42 Targeting 7nm

February 8, 2017

In what may be an attempt by President Trump to reset his turbulent relationship with the high tech industry, he and Intel CEO Brian Krzanich today announced plans to invest more than $7 billion to complete Fab 42. Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This