Practicalities and Challenges in the Petaflops Era

By Thomas Sterling and Chirag Dekate

June 22, 2011

Every year at ISC we stop and look back at the field of HPC, which has consistently exhibited the greatest rate of change of any technology in the history of mankind. This year is particularly important as the conventional methods that have served well over the last two decades are in direct contention with the technology trends pushing us towards a new future. This is best highlighted in the context of petaflops-capable supercomputers that have become the new standard at the top end of HPC and the reemergence of Asia as a dominant player in that ethereal regime.

But what has defined this year and distinguished it from the recent past is that although the issues are clear, the future conclusions are not. Perhaps, that is the lesson: that we are in a rare state of transition the outcome of which is yet to be determined. And the debate is anything but over. Let’s consider the highlights.

Petaflop computing is now the norm worldwide with the US, Europe, and Asia all driving computation beyond 10^15 flops. Most notable was China with its deployment of Tianhe-1A exceeding 2.5 petaflops (Linpack), assuming the position of the “fastest computer in the world” in 2010. That system is now surpassed with the 8 petaflops K Computer from Japan, giving that country the top spot for the first time since the illustrious Earth-Simulator.

Asia also has significant deployment of more traditional HPC systems, providing the means for strong programs in computational science with potential long-term impact on future science and engineering disciplines. Finally, an increasing share of the integrated components in Asia is homegrown, indicating a likely future with fully native HPC systems.

This year the big debate is the future of HPC system architecture: homogeneous multicore/manycore or heterogeneous GPU-based structures. And in both cases, the issue of programming dominates. GPUs are perceived by many as the fast track to superior computing. And for some applications this has been demonstrated. Indeed, of the top four machines, three incorporate GPUs. That would suggest a clear trend. But not so fast. Of the top 500 systems, only 17 integrate GPUs as a seminal element in achieving their performance goals. That would also suggest a clear trend, but in the opposite direction.

GPUs bring an enormous combined floating-point capability in a relatively small package and at a superior power/performance envelope. The numbers are staggering, but at a cost. Sitting at the wrong end of a PCI bus, the long latencies and relatively low bandwidth demands very high data reuse and highly regular control flow to extract anything near their peak potential. And with program control residing with the general-purpose processors, the programming methods for such hybrid systems is not for the faint of heart or consistent with the mass of legacy codes upon which industry, science, and governments all rely upon and have invested in.

Thus, it is possible that such architectures as TSUBAME 2.0 are transitional in that they represent the beginnings of an empirical search that in a few years will resolve in a distinctly different system architecture, exploiting the best of both manycore and GPUs but in a balanced and well-integrated structure managed by a unified programming methodology. While many practitioners experiment, sometimes to good effect, with CUDA and the emerging OpenCL framework, many more codes and programmers remain wedded to more day-to-day productive means.

These are very exciting times but those who think they know the final answer are probably fooling themselves, if not the rest of us. After all, the new number one K supercomputer is not based on GPUs but is 3 times faster than the number two Tianhe-1A machine, which is.

The steady increase in delivered performance is also pushing the power envelope. One advantage of GPUs, when employed effectively, is a somewhat improved energy efficiency (joules/operations). But while clock rates remain relatively stable (although differing across a range of approximately 3X) the scale of the largest systems continues to grow as HPC approaches another milestone: a million cores. The tradeoff is complex, but grave concerns are warranted as the biggest machines top 10 megawatts.

This is the driving and principal constraint for ambitious projects to deliver sustained exaflops performance before the end of this decade. The International Exascale Software Project has a worldwide representation coordinating the development of a new software platform that will support exascale systems in their management and application in the next decade. Recognizing the long lead times for software and their corresponding almost prohibitive costs, the opportunity to combine investment of resources in mutually aligned directions would appear to be an essential strategy to achieve billion-way parallelism.

In the US, the DARPA sponsored UHPC program, while not expressly targeting exascale systems has initiated this year to develop suitable technologies for a petaflop in a rack at under 60 kilowatts. The European Exascale Software Initiative is to develop a roadmap to exaflops, and also in Europe, both Intel and separately, Cray, are engaged in collaborations with European researchers to drive towards exaflops. In Asia, both Japan and China have programs intended to move aggressively towards sustained exaflops for real world applications, perhaps as early as 2018. But with predictions of hundreds of megawatts required through extensions of conventional methods, what such systems will look like is far from certain, let alone how they will be programmed.

Driving the field of HPC towards new capabilities is the underlying technologies and the processor designs from which they are constructed. Intel, IBM, and AMD are all advancing their processor designs. 45 and 32 nanometer technologies are taking hold even as the number of cores per die and socket is increasing to deliver continuing increase in performance.

Intel’s Xeon E7-8870 Processor integrates 10 cores, operating at 2.7 GHz, with 30MB cache size and supporting 2 terabytes of DDR3 memory. Using Hafnium-based high-k metal gate silicon technology, the Intel chip burns 130 Watts.

Cooler is the 12-core 2.5 GHz AMD Opteron 6100 component at 45 nanometers. It draws 105 Watts and is based on their full-field EUV lithography technology. AMD plans on going to 16 cores by Q3 of this year based on 32 nanometers, while Intel is preparing their 22 nanometer Ivy-bridge processors based on 3-D TriGate transistors.

IBM’s heavy hitter continues to be the Power family with the 45 nanometer Power7 out last year, supporting a number of chip configurations between 4 and 8 cores. This will serve as the central component to the 10 petaflops Blue Waters machine to be deployed next year. Its successor, IBM Power8, is currently under development.

GPU designs continue to push the edge of the envelope in peak performance while enhancing their generality for greater utility. The NVIDIA Tesla 20-series family based on the Fermi architecture can integrate up to 512 CUDA cores with clock rates of between 1.15 and 1.4 GHz and deliver more than a half a teraflop of double precision performance. With comparable performance is the AMD FireStream 9370 series GPU based on the Cypress architecture. Both vendors are moving towards tighter system integration with AMD’s pushing its Fusion system architecture. In the software domain, it’s a head-to-head fight between CUDA and OpenCL, with strong advocates for each.

The underlying technologies are certainly not standing still. Recent graphene technology breakthroughs include UCLA reporting 300 GHz switching rates and UC Berkeley announcing new optical modulators, while IBM has implemented the first integrated circuit based on graphene transistors. 3-D stacking of dies by IBM, Xilinx, and other manufacturers is preparing HPC for higher density packaging with higher internal bandwidths and shorter latencies, while combining disparate functional components (e.g., cores, DRAM) into single integrated units.

Every year an attempt is made to capture a more meaningful representation of supercomputing based on the TOP500. The list provides extensive data but usually only discussed in terms of the highest rated machine, the lowest rated machine, and the sum of all 500 machines. But what about supercomputing for the common man; the mainstream form and capability. This year, although the top machines exhibit unique properties, the canonical system is the standard Linux commodity cluster with a peak performance of 72.4 Teraflops and a Linpack rating of 38.3 teraflops. Such a system incorporates Intel Xeon Nehalem-EP processors, integrated by IBM (HP is a close second), and interconnected with Gigabit Ethernet (InfiniBand has almost caught up). The system comprises 1,134 sockets of 6 cores each and burns 200 Kilowatts. The closest machine to this profile is number 288 on the TOP500 list.

Even though we still rate systems in teraflops, the Graph 500 list is emerging to represent a very different class of computing: data intensive processing, a domain in which the manipulation of the metadata dominates in lieu of floating point operations. Although yet to dominate, this emerging class of computing is important for many sparse problems as well as knowledge management and understanding problems that are expected to have increasing impact on the field of HPC.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Google Gets First Dibs on New Skylake Chips

February 27, 2017

As part of an ongoing effort to differentiate its public cloud services, Google made good this week on its intention to bring custom Xeon Skylake chips from Intel Corp. Read more…

By George Leopold

Thomas Sterling on CREST and Academia’s Role in HPC Research

February 27, 2017

The US advances in high performance computing over many decades have been a product of the combined engagement of research centers in industry, government labs, and academia. Read more…

By Thomas Sterling, Indiana University

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

Weekly Twitter Roundup (Feb. 23, 2017)

February 23, 2017

Here at HPCwire, we aim to keep the HPC community apprised of the most relevant and interesting news items that get tweeted throughout the week. Read more…

By Thomas Ayres

HPE Extreme Performance Solutions

Manufacturers Reaping the Benefits of Remote Visualization

Today’s manufacturers are operating in an ever-changing atmosphere, and finding new ways to boost productivity has never been more vital.

This is why manufacturers are ramping up their investments in high performance computing (HPC), a trend which has helped give rise to the “connected factory” and Industrial Internet of Things (IIoT) concepts that are proliferating throughout the industry today. Read more…

HPE Server Shows Low Latency on STAC-N1 Test

February 22, 2017

The performance of trade and match servers can be a critical differentiator for financial trading houses. Read more…

By John Russell

HPC Financial Update (Feb. 2017)

February 22, 2017

In this recurring feature, we’ll provide you with financial highlights from companies in the HPC industry. Check back in regularly for an updated list with the most pertinent fiscal information. Read more…

By Thomas Ayres

Rethinking HPC Platforms for ‘Second Gen’ Applications

February 22, 2017

Just what constitutes HPC and how best to support it is a keen topic currently. Read more…

By John Russell

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

Thomas Sterling on CREST and Academia’s Role in HPC Research

February 27, 2017

The US advances in high performance computing over many decades have been a product of the combined engagement of research centers in industry, government labs, and academia. Read more…

By Thomas Sterling, Indiana University

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Drug Developers Use Google Cloud HPC in the Fight Against ALS

February 16, 2017

Within the haystack of a lethal disease such as ALS (amyotrophic lateral sclerosis / Lou Gehrig’s Disease) there exists, somewhere, the needle that will pierce this therapy-resistant affliction. Read more…

By Doug Black

Azure Edges AWS in Linpack Benchmark Study

February 15, 2017

The “when will clouds be ready for HPC” question has ebbed and flowed for years. Read more…

By John Russell

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

US, China Vie for Supercomputing Supremacy

November 14, 2016

The 48th edition of the TOP500 list is fresh off the presses and while there is no new number one system, as previously teased by China, there are a number of notable entrants from the US and around the world and significant trends to report on. Read more…

By Tiffany Trader

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

D-Wave SC16 Update: What’s Bo Ewald Saying These Days

November 18, 2016

Tucked in a back section of the SC16 exhibit hall, quantum computing pioneer D-Wave has been talking up its new 2000-qubit processor announced in September. Forget for a moment the criticism sometimes aimed at D-Wave. This small Canadian company has sold several machines including, for example, ones to Lockheed and NASA, and has worked with Google on mapping machine learning problems to quantum computing. In July Los Alamos National Laboratory took possession of a 1000-quibit D-Wave 2X system that LANL ordered a year ago around the time of SC15. Read more…

By John Russell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

Leading Solution Providers

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

Nvidia Sees Bright Future for AI Supercomputing

November 23, 2016

Graphics chipmaker Nvidia made a strong showing at SC16 in Salt Lake City last week. Read more…

By Tiffany Trader

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

Dell Knights Landing Machine Sets New STAC Records

November 2, 2016

The Securities Technology Analysis Center, commonly known as STAC, has released a new report characterizing the performance of the Knight Landing-based Dell PowerEdge C6320p server on the STAC-A2 benchmarking suite, widely used by the financial services industry to test and evaluate computing platforms. The Dell machine has set new records for both the baseline Greeks benchmark and the large Greeks benchmark. Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

What Knights Landing Is Not

June 18, 2016

As we get ready to launch the newest member of the Intel Xeon Phi family, code named Knights Landing, it is natural that there be some questions and potentially some confusion. Read more…

By James Reinders, Intel

  • arrow
  • Click Here for More Headlines
  • arrow
Share This