What I Learned at the International Supercomputing Conference

By Michael Feldman

June 23, 2011

Flying halfway around the world to just gather news seems like a waste of time in the information age. But when it comes to supercomputing shows like ISC, being there in person cannot be duplicated by the remote experience, despite live streaming sessions, video blogs, and ISC twitter feeds.

Part of that has to do with the fact that information just seems to flow more freely under the chaotic conditions of a busy show floor. The other aspect is that exhibitors assume they’re talking to potential prospects, so the vendors tend to be a little looser lipped than I’m used to as a journalist.

For example, although Intel wasn’t willing to share with me over email last week that their first Many Integrated Core (MIC) product, aka Knights Corner, would support ECC memory, one person in the Intel booth at ISC did indeed confirm that MIC would be released with such support. (The Knights Ferry prototype is using a vanilla, i.e., non-ECC, graphics memory controller.) Like I mentioned in my original reporting of this week’s MIC news, it would be inconceivable not to have ECC support in this HPC product, so no big surprise here.

I also found out that the peak performance on the Knights Ferry prototype is 1.2 single precision (SP) teraflops. Given that the next year’s Knights Corner product will be on 22nm technology and will have about twice as many cores, I expect it will at least double that SP floating point teraflops, with maybe half the number for double precision (DP).

The GPU contingent from AMD won’t be intimidated from such floppery though. They told me that the next version of the FireStream HPC product will have twice the performance of the current model. The 9350 and 9370 products being shipped today deliver 528 DP gigaflops and 2.64 SP teraflops. The new FireStreams will be announced this fall — around SC11, I’m guessing — and will start shipping sometime in early 2012.

Meanwhile NVIDIA says it will deliver its next generation Kepler GPU architecture in 2012, At an ISC presentation by Nvidian Sumit Gupta, he estimated the new GPU will deliver about 5 DP gigaflops per watt, or maybe even better than that. “Kepler is going to be an amazing performance per watt GPU,” he promised.

If NVIDIA maintains the same thermal envelope as the current Fermi-class devices (225-250 watts), then the Kepler GPUs will be well north of a double precision teraflop. In fact all three 2012 HPC accelerators look to top one DP teraflop, but it is unlikely that any will reach 2 teraflops. With that kind of performance parity, the competitive differentiators may be energy efficiency and ease of programming.

In the latter case, Intel may have the edge. I heard a number of comments here in Hamburg that MIC is more straightforward to program than a GPU, at least to get an initial, non-optimized port — not just because it’s based on the x86 architecture, but because it lends itself more easily to standard multicore-style programming frameworks, like OpenMP. That indeed will warm the hearts of many application developers, inasmuch as a lots of code is already parallelized with OpenMP.

On the other hand, CUDA remains the more mature software environment for manycore acceleration at this point, and AMD said that the upcoming FireStream offerings will also include more advanced tools, libraries, and drivers. In any case, software development for accelerator programming is bound to get easier over the next year, but the devil will be in the details.

On the energy efficiency front, it looks like all three HPC accelerator offerings will need at least need 200 watts to hit a teraflop. It remains to be seen if Intel, NVIDIA, or AMD will have any appreciable edge.

On the broader topic of energy efficiency, there was lots of chatter at the conference about exascale power budgets. The current goal of US federal agencies is to have an exaflop fit into 20MW. That means to run such a system will cost about $20 million per year in the US and 20 million euros in Europe. Unfortunately, a number of people in the know at ISC thought that was quite an optimistic figure for the first exaflop systems. Estimates for these early machines ranged from as much 40MW (Cray CTO Steve Scott) to 200 MW (LSU prof Thomas Sterling).

The power problem is not a showstopper though. There are 100MW datacenters today and if the political will is there to fund power-sucking monsters at this scale, it could be done. Eventually exaflop systems will use 20MW, and less, but perhaps not the first crop of machines.

On a related note, Japan’s March 11 earthquake/tsunami disaster is already forcing that nation’s HPC community to deal with reduced power availability. Not that they weren’t already focused on energy efficiency. Japanese supercomputing has always had to adhere to strict power budgets since the nation lacks significant indigenous energy resources. But the situation is especially acute right now.

In a presentation at ISC, the University of Tsukuba’s Taisuke Boku told the audience that in the wake of the disaster, four one-gigawatt power plants are now offline. According to him, Tokyo residents, businesses, and other organizations (including HPC centers) will be required to cut their power usage by 15 percent this summer because of the downed plants.

Boku said this summer the university’s PACS-CS supercomputer will be shut down during the day, from 9:00 am to 9:00 pm, to deal with the power restriction shortage. And this is expected to continue for a number of years while Japan rebuilds its power plant infrastructure. The irony here is that PACS-CS uses low voltage Xeons, so is already is built for energy-efficient operation.

An even bigger irony is that the Japanese K Computer, which captured the number one spot on the TOP500 list is using about 10MW. The fact that an 8-petaflop machine uses half the 20MW that people are aiming for in an exaflop machine should be sobering enough. The bigger problem though is that power consumption for the top systems is increasing faster than gains in energy efficiency. As we say in the HPC biz, that doesn’t scale.

I actually have more to report from my Hamburg excursion, including some interesting developments to create net zero carbon HPC datacenters. But that will have to wait for another time.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

UCSD, AIST Forge Tighter Alliance with AI-Focused MOU

January 18, 2018

The rich history of collaboration between UC San Diego and AIST in Japan is getting richer. The organizations entered into a five-year memorandum of understanding on January 10. The MOU represents the continuation of a 1 Read more…

By Tiffany Trader

New Blueprint for Converging HPC, Big Data

January 18, 2018

After five annual workshops on Big Data and Extreme-Scale Computing (BDEC), a group of international HPC heavyweights including Jack Dongarra (University of Tennessee), Satoshi Matsuoka (Tokyo Institute of Technology), Read more…

By John Russell

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown and Spectre security updates on the performance of popular H Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE and NREL Take Steps to Create a Sustainable, Energy-Efficient Data Center with an H2 Fuel Cell

As enterprises attempt to manage rising volumes of data, unplanned data center outages are becoming more common and more expensive. As the cost of downtime rises, enterprises lose out on productivity and valuable competitive advantage without access to their critical data. Read more…

Fostering Lustre Advancement Through Development and Contributions

January 17, 2018

Six months after organizational changes at Intel's High Performance Data (HPDD) division, most in the Lustre community have shed any initial apprehension around the potential changes that could affect or disrupt Lustre Read more…

By Carlos Aoki Thomaz

UCSD, AIST Forge Tighter Alliance with AI-Focused MOU

January 18, 2018

The rich history of collaboration between UC San Diego and AIST in Japan is getting richer. The organizations entered into a five-year memorandum of understandi Read more…

By Tiffany Trader

New Blueprint for Converging HPC, Big Data

January 18, 2018

After five annual workshops on Big Data and Extreme-Scale Computing (BDEC), a group of international HPC heavyweights including Jack Dongarra (University of Te Read more…

By John Russell

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

Fostering Lustre Advancement Through Development and Contributions

January 17, 2018

Six months after organizational changes at Intel's High Performance Data (HPDD) division, most in the Lustre community have shed any initial apprehension aroun Read more…

By Carlos Aoki Thomaz

When the Chips Are Down

January 11, 2018

In the last article, "The High Stakes Semiconductor Game that Drives HPC Diversity," I alluded to the challenges facing the semiconductor industry and how that may impact the evolution of HPC systems over the next few years. I thought I’d lift the covers a little and look at some of the commercial challenges that impact the component technology we use in HPC. Read more…

By Dairsie Latimer

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

Momentum Builds for US Exascale

January 9, 2018

2018 looks to be a great year for the U.S. exascale program. The last several months of 2017 revealed a number of important developments that help put the U.S. Read more…

By Alex R. Larzelere

ANL’s Rick Stevens on CANDLE, ARM, Quantum, and More

January 8, 2018

Late last year HPCwire caught up with Rick Stevens, associate laboratory director for computing, environment and life Sciences at Argonne National Laboratory, f Read more…

By John Russell

Inventor Claims to Have Solved Floating Point Error Problem

January 17, 2018

"The decades-old floating point error problem has been solved," proclaims a press release from inventor Alan Jorgensen. The computer scientist has filed for and Read more…

By Tiffany Trader

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Leading Solution Providers

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

  • arrow
  • Click Here for More Headlines
  • arrow
Share This