QLogic Makes Case for Leaner, HPC-Centric InfiniBand

By Michael Feldman

July 26, 2011

It was a bit of a surprise when QLogic beat out Mellanox as the interconnect vendor on the National Nuclear Security Administration’s (NNSA’s) Tri-Lab Linux Capacity Cluster 2 contract in June. Not only was Mellanox the incumbent on the original Tri-Lab contract, but it is widely considered to have the more complete solution set for InfiniBand. Nevertheless, QLogic managed to win the day, and did so with somewhat unconventional technologies.

One of these is QLogic’s TrueScale InfiniBand architecture. TrueScale uses an on-load approach to networking in which the lion’s share of packet processing is passed off to the CPUs on the servers. That allows host channel adapters (HCAs) based on TrueScale chips to be much simpler in design than those used to offload those functions (in particular Mellanox ConnectX-based adapters), but at the cost of using CPU resources to do network tasks like packet processing.

That’s why offloading has been the traditional answer for computationally-burdened HPC systems, not just for lower-level packet manipulation, but for MPI processing as well. And it makes perfect sense. The less communication processing the CPUs have to do, the more time they can spend on the application.

But it doesn’t always work out that way in the real world. Especially for certain types of codes where the bottleneck is communication, rather than computation, being able to tap into host CPUs can be an advantage. This is especially true in modern-day clusters, which are filled with core-rich CPUs, not all of which can be fully utilized 100 percent of the time. In these situations, on-loading can exploit essentially free cycles and in a manner that scales naturally with the size of the cluster.

But even where the application is more computationally intensive, QLogic maintains that its on-load approach will still outrun Mellanox’s offloading approach. They attribute that to the other critical piece of their InfiniBand technology: Performance Scaled Messaging (PSM). PSM is QLogic’s communication library that it touts as their lightweight answer to InfiniBand Verbs. The latter was defined by the original InfiniBand spec designers to provide a general-purpose communication API that assumed RDMA and some sort of offloading in the network adapter.

QLogic came up with PSM as a leaner, meaner interface designed explicitly for high performance computing. And now that PSM has been turned over as open source and incorporated into the OpenFabrics Enterprise Distribution (OFED), the software can now be embraced by the wider HPC community. Like Verbs, PSM is supported in all major MPI implementations.

According to Joseph Yaworski, director of HPC Product and Solution Marketing at QLogic, PSM is what makes their InfiniBand offering so efficient for HPC environments. Both PSM and Verbs run on the server CPUs, but unlike Verbs, which was originally designed for handling of I/O requests in a datacenter environment (and later modified to support message passing when HPC became the primary user of InfiniBand), PSM was purpose-built for MPI from the start.

The difference is the nature of the communication for the two application areas. While I/O usually entails relatively large blocks of data to be sent across a limited number of nodes, MPI communication often requires tens of millions of relatively small messages to be passed between hundreds or even thousands of CPU cores.

“Verbs, due to its poor semantic match between MPI’s message passing requirements and the structure of the Verbs implementation, means that a heavy weight protocol must be traversed to handle each message,” says Yaworski. “This approach puts a significant burden on the host CPU and severely limits network performance, especially as a cluster is scaled.

QLogic points to a couple of ANSYS FLUENT benchmarks to show its InfiniBand performance on these common CFD codes. The tests were run on a 384-core server cluster, made up of 32 computational nodes and one NFS server node. Each server consisted of dual quad-core Intel Xeon 5670 “Westmere” 2.93GHz processors and 24GB of memory. Platform MPI was used with the MPI stats option turned on to collect the statistics for communications and CPU utilization. According to Yaworski, the same object code was used for the application for both on-loading and offloading runs.

The first test was the Eddy 417K cell model, which is relatively light on the computation side, but heavy on the communications. For this application, QLogic says on-loading with PSM delivers 366 percent more application performance than offloading with Verbs, claiming the difference is the more efficient use of the CPUs. With this model, just 76 percent of the CPU cycles were used for communication with on-loading/PSM versus 95 percent for offloading/Verbs.

The second FLUENT test case is the Truck 111M cell model, which is much more computationally intensive. In this case, the QLogic solution runs just 20 percent faster, since the overall communication burden is much less, although still taking up 53 percent of the CPU for on-loading with PSM and 61 percent for offloading with Verbs.

As one might suspect, Mellanox is having none of this. According to Gilad Shainer, senior director of HPC and Technical Computing at Mellanox, the offloading critique is unfounded, and benchmark tests such as the ones QLogic touts can be easily manipulated for the benefit particular outcomes. From his perspective, QLogic’s positioning of their InfiniBand on-load technology is a marketing ploy to make up for the lack of sophistication in the TrueScale silicon.

Shainer maintains that the rationale for offloading is straightforward: to be able to use system resources for what they do best, in this case, CPUs for computation and HCAs for network processing. According to him, that’s why most adapters use some form of offloading today, whether to support InfiniBand and MPI communication, Fibre Channel over Ethernet, TCP offload, or what have you.

On-loading also makes RDMA (Remote Direct Memory Access) impossible, which means data must be buffered by the CPU in certain situations, instead of being directly mapped by the HCA. In those cases, data transfer latencies are much higher — up to 7 times higher according to Mellanox — and throughput is lower.

This is especially true when InfiniBand is used to connect storage. Shainer says for file system applications like Lustre and GPFS, you can lose up to half the I/O bandwidth without RDMA (Yaworski concedes that Mellanox is currently better for InfiniBand-based storage but says QLogic is within “spitting distance” of its competitor on I/O performance.) Shainer also says RDMA gives Mellanox’s GPUDirect implementation a decided performance advantage, a claim disputed by QLogic.

On the other hand, says Shainer, just because the offload capability is on-chip, there is no requirement to use it. Mellanox supports network transport and MPI offload capabilities, but the user is able to switch those features on and off if so desired. In that sense, he points out, offloading is really a superset of on-loading.

Nevertheless, recent experience on some large clusters at Lawrence Livermore National Lab (LLNL) appear to back QLogic’s claims of scalability and performance, at least on some of the lab’s simulation codes. On Sierra, a 1,944-node HPC cluster at LLNL connected with QLogic InfiniBand adapters and switches, a multiphysics code was able to achieve 1 to 2 us of MPI latency across 24,000 cores and attain 27 to 30 million messages per second. Matt Leininger, deputy for advanced technology projects at LLNL, said that Sierra demonstrated better scaling than any of their other clusters, not to mention their older Blue Gene and Cray XT supercomputers. Leininger attributed the superior performance to the QLogic network.

At LLNL, QLogic InfiniBand now connects more than 4,000 nodes spread across Sierra and three smaller HPC clusters. The lab’s positive experience with the technology was almost certainly a factor that led the NNSA to select QLogic QDR InfiniBand over the Mellanox offering on the second Tri-Labs contract announced. With the win, QLogic gear will now be firmly entrenched at Sandia National Laboratories and Los Alamos National Laboratory, the other two labs in the Tri-Labs complex.

While Mellanox will continue to be a market leader in InfiniBand for the foreseeable future, QLogic may have found a technological strategy that enables it to expand its market share. Continuing to exploit that strategy is going to be tough going, given its competitor’s dominance in the InfiniBand market. But in Mellanox’s more all-encompassing RDMA offerings and QLogic’s more bare-bones HPC approach, the market may have found the differentiation needed to keep both InfiniBand product sets viable.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Data Vortex Users Contemplate the Future of Supercomputing

October 19, 2017

Last month (Sept. 11-12), HPC networking company Data Vortex held its inaugural users group at Pacific Northwest National Laboratory (PNNL) bringing together about 30 participants from industry, government and academia t Read more…

By Tiffany Trader

AI Self-Training Goes Forward at Google DeepMind

October 19, 2017

DeepMind, Google’s AI research organization, announced today in a blog that AlphaGo Zero, the latest evolution of AlphaGo (the first computer program to defeat a Go world champion) trained itself within three days to play Go at a superhuman level (i.e., better than any human) – and to beat the old version of AlphaGo – without leveraging human expertise, data or training. Read more…

By Doug Black

Researchers Scale COSMO Climate Code to 4888 GPUs on Piz Daint

October 17, 2017

Effective global climate simulation, sorely needed to anticipate and cope with global warming, has long been computationally challenging. Two of the major obstacles are the needed resolution and prolonged time to compute Read more…

By John Russell

HPE Extreme Performance Solutions

Transforming Genomic Analytics with HPC-Accelerated Insights

Advancements in the field of genomics are revolutionizing our understanding of human biology, rapidly accelerating the discovery and treatment of genetic diseases, and dramatically improving human health. Read more…

Student Cluster Competition Coverage New Home

October 16, 2017

Hello computer sports fans! This is the first of many (many!) articles covering the world-wide phenomenon of Student Cluster Competitions. Finally, the Student Cluster Competition coverage has come to its natural home: H Read more…

By Dan Olds

Data Vortex Users Contemplate the Future of Supercomputing

October 19, 2017

Last month (Sept. 11-12), HPC networking company Data Vortex held its inaugural users group at Pacific Northwest National Laboratory (PNNL) bringing together ab Read more…

By Tiffany Trader

AI Self-Training Goes Forward at Google DeepMind

October 19, 2017

DeepMind, Google’s AI research organization, announced today in a blog that AlphaGo Zero, the latest evolution of AlphaGo (the first computer program to defeat a Go world champion) trained itself within three days to play Go at a superhuman level (i.e., better than any human) – and to beat the old version of AlphaGo – without leveraging human expertise, data or training. Read more…

By Doug Black

Student Cluster Competition Coverage New Home

October 16, 2017

Hello computer sports fans! This is the first of many (many!) articles covering the world-wide phenomenon of Student Cluster Competitions. Finally, the Student Read more…

By Dan Olds

Intel Delivers 17-Qubit Quantum Chip to European Research Partner

October 10, 2017

On Tuesday, Intel delivered a 17-qubit superconducting test chip to research partner QuTech, the quantum research institute of Delft University of Technology (TU Delft) in the Netherlands. The announcement marks a major milestone in the 10-year, $50-million collaborative relationship with TU Delft and TNO, the Dutch Organization for Applied Research, to accelerate advancements in quantum computing. Read more…

By Tiffany Trader

Fujitsu Tapped to Build 37-Petaflops ABCI System for AIST

October 10, 2017

Fujitsu announced today it will build the long-planned AI Bridging Cloud Infrastructure (ABCI) which is set to become the fastest supercomputer system in Japan Read more…

By John Russell

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Intel Debuts Programmable Acceleration Card

October 5, 2017

With a view toward supporting complex, data-intensive applications, such as AI inference, video streaming analytics, database acceleration and genomics, Intel i Read more…

By Doug Black

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Leading Solution Providers

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

Intel Launches Software Tools to Ease FPGA Programming

September 5, 2017

Field Programmable Gate Arrays (FPGAs) have a reputation for being difficult to program, requiring expertise in specialty languages, like Verilog or VHDL. Easin Read more…

By Tiffany Trader

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

  • arrow
  • Click Here for More Headlines
  • arrow
Share This