IBM Specs Out Blue Gene/Q Chip

By Michael Feldman

August 22, 2011

At the Hot Chips conference in Santa Clara last week, IBM lifted the curtain on its Blue Gene/Q SoC, which will soon power some of the highest performing supercomputers in the world. Next year, two DOE labs are slated to boot up the most powerful Blue Gene systems ever deployed: the 10-petaflop “Mira” system at Argonne National Lab, and the 20-petaflop “Sequoia” super at Lawrence Livermore.  Both will employ the latest Blue Gene/Q processor described at the conference.

That, of course, is assuming IBM doesn’t back out of those projects as it did recently with its 10-petaflop Power7-based (PERCS) Blue Waters supercomputer for NCSA at the University of Illinois. The company terminated the contract to build and support the $300 million Blue Waters system based on financial considerations, leaving the NCSA and its NSF sponsor looking for another vendor to fill the void. The DOE is certainly not expecting to endure that fate for their Blue Gene/Q acquisitions.

The unveiling of the Blue Gene/Q SoC last week implies IBM is committed to those DOE machines as well as futures systems. And Unlike the Power7 CPU, which is being used for both enterprise and HPC systems, the Blue Gene technology has always been exclusively designed and built for supercomputing.

 

 

 

 

 

 

 

 

 

 

 

 

 

Both, the Power7 and new Blue Gene SoC use IBM’s 45 nm SOI technology, but the similarity end there. As described at Hot Chips, the BGQ processor is an 18-core CPU, 16 of which will be used for the application, one for the OS, and one held in reserve. And even though the chip is a custom design, it uses the PowerPC A2 core that IBM introduced last year at the International Solid-State Circuits Conference. The architecture represents yet another PowerPC variant, which in this case merges the functionality of network and server processors. IBM is using the A2 architecture to implement PowerEN chips for the more traditional datacenter applications such as edge-of-network processing, intelligent I/O devices in servers, network attached appliances, distributed computing, and streaming applications.

As such, the A2 architecture emphasizes throughput and energy efficiency, running at relatively modest clock speeds. In the case of the Blue Gene/Q implementation, the clock is just 1.6 GHz and consumes a modest 55 watts at peak. To further reduce power consumption, the chip makes extensive use of clock gating.

But thanks to the double-digit core count, support for up to four threads per core, and the quad floating-point unit, it delivers a very respectable 204 gigaflops per processor. Contrast that with the Power7, which at 3.5 GHz and 8 cores delivers about 256 gigaflops, but consumes a hefty 200 watts.

That gives the Blue Gene/Q chip nearly three times the energy efficiency per peak FLOP compared to the more computationally muscular Power7 (3.72 gigaflops/watt versus 1.28 gigaflops/watt). IBM has been able to capture most of that energy efficiency in the Blue Gene/Q servers. The current top-ranked system on the latest Green500 list is a prototype machine that measures 2.1 gigaflops/watt for Linpack, beating even the newest GPU-accelerated machines as well as the Sparc64 VIIIfx-based K supercomputer, the current champ of the TOP500.

Even compared to its Blue Gene predecessors, BGQ represents a step change in performance, thanks to a large bump in both core count and clock frequency. The Blue Gene/Q chip delivers a 15 times as many peak FLOPS its Blue Gene/P counterpart and a 36 times as many as the original Blue Gene/L SoC.

Version Core Architecture Core Count Clock Speed Peak Performance
Blue Gene/L PowerPC 440 2 700 MHz 5.6 Gigaflops
Blue Gene/P PowerPC 450 4 850 MHz 13.6 Gigaflops
Blue Gene/Q PowerPC A2 18 1600 MHz 204.8 Gigaflops

As with Blue Gene/L and P, the Q incarnation uses embedded DRAM (eDRAM), a dynamic random access memory architecture that is integrated onto the processor ASIC. The technology is employed for shared Level 2 cache, replacing the less performant SRAM technology used in traditional CPUs. In the case of Blue Gene/Q, 32 MB of L2 cache have been carved out.

What is brand new for the latest version is transactional memory. According an EE Times report, the addition of transactional memory will give IBM the distinction of becoming the first company to deliver commercial chips with such technology.

Transactional memory is a technology used to simplify parallel programming by protecting shared data from concurrent access. Basically it prevents data from being corrupted by multiple threads when they simultaneously want to read or write a particular item, and does so in a much more transparent way to the application than the traditional locking mechanism in common use today.

The technology can be implemented in both hardware, software, and a combination of the two. It has been studied by a number of vendors over the years, most notably Intel, Microsoft, and Sun Microsystems. According to the EE Times report, IBM’s implementation exploits the high performance on-chip eDRAM to achieve better latency compared to traditional locking schemes.

If everything goes according to plan, the new processor will elevate the Blue Gene franchise into the double-digit petaflops realm. The aforementioned Mira and Sequoia, taken together, represent 30 petaflops of supercomputing and will both be top 10 systems in 2012.  Sequoia, in particular, is positioned to be the top-ranked supercomputer next year, assuming no surprises from China or elsewhere.

Whether the BGQ architecture is the end of the line for the Blue Gene franchise is an open question. As of today, there is no R system on the roadmap and IBM seems to be leaning toward a Power-architecture-only strategy for its custom supercomputing lineup. Even if IBM is able to repurpose the cores of other PowerPC architectures, designing and implementing a custom SoC for a single niche market, albeit a high-margin one, is an expensive proposition.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

TACC Helps ROSIE Bioscience Gateway Expand its Impact

April 26, 2017

Biomolecule structure prediction has long been challenging not least because the relevant software and workflows often require high-end HPC systems that many bioscience researchers lack easy access to. Read more…

By John Russell

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

IBM, Nvidia, Stone Ridge Claim Gas & Oil Simulation Record

April 25, 2017

IBM, Nvidia, and Stone Ridge Technology today reported setting the performance record for a “billion cell” oil and gas reservoir simulation. Read more…

By John Russell

ASC17 Makes Splash at Wuxi Supercomputing Center

April 24, 2017

A record-breaking twenty student teams plus scores of company representatives, media professionals, staff and student volunteers transformed a formerly empty hall inside the Wuxi Supercomputing Center into a bustling hub of HPC activity, kicking off day one of 2017 Asia Student Supercomputer Challenge (ASC17). Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Remote Visualization Optimizing Life Sciences Operations and Care Delivery

As patients continually demand a better quality of care and increasingly complex workloads challenge healthcare organizations to innovate, investing in the right technologies is key to ensuring growth and success. Read more…

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of a new generation of chips designed specifically for deep learning workloads. Read more…

By Alex Woodie

Musk’s Latest Startup Eyes Brain-Computer Links

April 21, 2017

Elon Musk, the auto and space entrepreneur and severe critic of artificial intelligence, is forming a new venture that reportedly will seek to develop an interface between the human brain and computers. Read more…

By George Leopold

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

NERSC Cori Shows the World How Many-Cores for the Masses Works

April 21, 2017

As its mission, the high performance computing center for the U.S. Department of Energy Office of Science, NERSC (the National Energy Research Supercomputer Center), supports a broad spectrum of forefront scientific research across diverse areas that includes climate, material science, chemistry, fusion energy, high-energy physics and many others. Read more…

By Rob Farber

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

ASC17 Makes Splash at Wuxi Supercomputing Center

April 24, 2017

A record-breaking twenty student teams plus scores of company representatives, media professionals, staff and student volunteers transformed a formerly empty hall inside the Wuxi Supercomputing Center into a bustling hub of HPC activity, kicking off day one of 2017 Asia Student Supercomputer Challenge (ASC17). Read more…

By Tiffany Trader

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of a new generation of chips designed specifically for deep learning workloads. Read more…

By Alex Woodie

NERSC Cori Shows the World How Many-Cores for the Masses Works

April 21, 2017

As its mission, the high performance computing center for the U.S. Department of Energy Office of Science, NERSC (the National Energy Research Supercomputer Center), supports a broad spectrum of forefront scientific research across diverse areas that includes climate, material science, chemistry, fusion energy, high-energy physics and many others. Read more…

By Rob Farber

Hyperion (IDC) Paints a Bullish Picture of HPC Future

April 20, 2017

Hyperion Research – formerly IDC’s HPC group – yesterday painted a fascinating and complicated portrait of the HPC community’s health and prospects at the HPC User Forum held in Albuquerque, NM. HPC sales are up and growing ($22 billion, all HPC segments, 2016). Read more…

By John Russell

Knights Landing Processor with Omni-Path Makes Cloud Debut

April 18, 2017

HPC cloud specialist Rescale is partnering with Intel and HPC resource provider R Systems to offer first-ever cloud access to Xeon Phi "Knights Landing" processors. The infrastructure is based on the 68-core Intel Knights Landing processor with integrated Omni-Path fabric (the 7250F Xeon Phi). Read more…

By Tiffany Trader

CERN openlab Explores New CPU/FPGA Processing Solutions

April 14, 2017

Through a CERN openlab project known as the ‘High-Throughput Computing Collaboration,’ researchers are investigating the use of various Intel technologies in data filtering and data acquisition systems. Read more…

By Linda Barney

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of “quantum supremacy,” researchers are stretching the limits of today’s most advanced supercomputers. Read more…

By Tiffany Trader

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference phase of neural networks (NN). Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the campaign. Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its assets. Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Leading Solution Providers

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This