Dell to Build 10-Petaflop Supercomputer For Science

By Michael Feldman

September 22, 2011

The Texas Advanced Computing Center (TACC) has revealed plans to deploy a cutting-edge petascale supercomputer courtesy of a $27.5 million dollar NSF award. Built by Dell, the system will consist of 2 petaflops of Sandy Bridge-EP processors with an 8 petaflop boost from Intel’s Many Integrated Core (MIC) coprocessors. The machine is scheduled to boot up in late 2012 and be ready for production in January 2013.

Not only is this Dell’s first petascale system — at least the first one announced publicly — it will likely be the first deployment of Intel’s commercial MIC technology. In this case, the chips in question are pre-production versions of Knights Corner, the first commercial part in that product line. These early chips will be identical to the future production parts.

Stampede, as the system will be called, is meant to serve both traditional number crunching HPC applications and data-driven analytics applications within NSF’s eXtreme Digital (XD) user community. XD includes the Extreme Science and Engineering Discovery Environment (XSEDE) project, the sucessor to TeraGrid that encompasses more than a dozen universities and two research labs. At 10 teraflops, Stampede will be the most powerful resource for XD users.

According to Jay Boisseau, TACC Director and PI of the Stampede project, the system is expected to have several hundred projects running on it from day one. “We want to bring in users with big data sets that are doing large-scale analyses, as well as the simulations types of users,” he told HPCwire.

Data-intensive science applications include traditional ones like bioinformatics, but also codes from geosciences and astronomy — application domains that are already accumulating large amounts of digital data. Boisseau thinks as much as half of Stampede’s resources will be devoted to these types of applications.

The data-intensive support will bring in a new set of users, many of which are not as HPC savvy as the traditional simulations folks. For that, Boisseau is planning to develop a much richer software environment for this group, including new application portals and gateways, as was begun under the TeraGrid project. In addition, they will also look to bring in experts in statistics, data mining, data management, and so on, in order to support the data-driven application domain.

Some of the expertise and software resources are already built into the project via university collaborations. Besides The University of Texas at Austin, partner schools include Clemson University, University of Colorado at Boulder, Cornell University, Indiana University, Ohio State University, and The University of Texas at El Paso.

Hardware-wise, the foundation of Stampede is a 2 petaflop cluster with 6,400 x86 compute nodes, lashed together with FDR (56 Gbps) InfiniBand from Mellanox. Each node will house two of Intel’s 8-core Xeon E5 (aka Sandy Bridge-EP) and 32 GB of DRAM.

Stampede will also include 16 big memory nodes, each sporting 1 terabyte of DRAM and 2 NVIDIA GPUs. Memory-wise, that’s not exactly in SGI Altix UV territory, but it’s a respectable capacity for extra-large SMP applications. Boisseau says they’re also considering ScaleMP’s virtual SMP solution to construct a shared memory environment across all 16 TB. The shared memory sub-cluster is slated to be used for some of the big data analytics applications that Stampede will host.

The cluster will also be hooked up to to Lustre storage nodes, also suppled by Dell. It will consist of 14 PB of disk, and deliver an aggregated bandwidth of 150 GB/second. “Over the lifetime of the project we’re expecting that to grow substantially both in capacity and bandwidth over the lifetime of the system,” said Boisseau.

The Dell system was developed by its Data Center Solutions division, under the code-name Zeus. Although the technology will debut in Stampede, the company is expecting to make the Zeus product generally available for “hyperscale” supercomputing in 2012.

Stampede’s base cluster and storage nodes represent the lion’s share of the NSF funding at $25 million. The remaining $2.5 million will go toward 8 petaflops worth of MIC coprocessors, which will be hooked into the x86 nodes via PCIe 3.0 links. MIC is Intel’s x86-based manycore HPC architecture aimed at highly parallel codes, and competes head on with NVIDIA’s Tesla and AMD’s Firestream GPUS.

GPGPU enthusiasts were not completely slighted though. Besides the GPUs in the shared memory nodes, 128 of the 6,400 regular nodes will be outfitted with NVIDIA’s next-generation Kepler GPUs to support remote visualization. Kepler is the successor to Fermi, NVIDIA’s current GPU architecture. Tesla implementations of Kepler aimed at HPC servers should begin shipping sometime in 2012.

Intel has not announced an official launch date for the Knights Corner MIC product, but it should be generally available sometime in 2013, or perhaps late 2012 if Intel’s 22nm process technology ramps up more quickly. The actual number of MICs in Stampede is not public, but Intel has promised them enough to deliver 8 peak petaflops.

Using a little quick math, each MIC chip will probably need to deliver at least 1.3 to 1.5 double precision teraflops to hit the 8 petaflop performance target. Coincidentally, the NVIDIA’s Kepler GPU is also expected to deliver about 1.3 to 1.5 double precision teraflops. Note that the first MIC parts will be implemented with Intel’s Tri-Gate 22nm technology, while the Kepler GPUs will be manufactured on standard 28nm technology.

At this point, Boisseau is expecting to receive all the Intel MIC coprocessors sometime this fall, possibly in time for a Linpack run at the November’s TOP500. By that time, all the Sandy Bridge compute nodes should be fully deployed. If all goes according to plan, early access users should be able to start running codes on the machine by December 2012.

Although MIC will support a number of parallel computing models, the most straightforward one is OpenMP. This will be especially advantageous for users with hybrid MPI-OpenMP codes. The idea would be to just offload the OpenMP chunks to the coprocessors in order to parallelize those loops. Users with straight MPI codes will need to do more work to tap into MIC acceleration.

There is already an upgraded version of Stampede on the drawing board. About two years into the project, TACC is planning to deploy the second generation MIC coprocessors, with another (smaller) batch of chips. The goal is to add 5 more petaflops to the system, bringing its grand total to 15 peak petaflops sometime around the middle of the decade.

The NSF is will be funding Stampede for at least four years. Besides the inital $27.5 million outlay to build and install the system, an additional $24 million or so for system operation and support is expected to be on the table soon, bringing the total Stampede investment to more than $50 million. The project also includes an option for renewal in 2017, which would result in the deployment of an even larger and more powerful machine toward the end of the decade.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 13), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue’s max capacity and doubling 2016 attendee numbers), the one Read more…

By Tiffany Trader

Machine Learning at HPC User Forum: Drilling into Specific Use Cases

September 22, 2017

The 66th HPC User Forum held September 5-7, in Milwaukee, Wisconsin, at the elegant and historic Pfister Hotel, highlighting the 1893 Victorian décor and art of “The Grand Hotel Of The West,” contrasted nicely with Read more…

By Arno Kolster

Google Cloud Makes Good on Promise to Add Nvidia P100 GPUs

September 21, 2017

Google has taken down the notice on its cloud platform website that says Nvidia Tesla P100s are “coming soon.” That's because the search giant has announced the beta launch of the high-end P100 Nvidia Tesla GPUs on t Read more…

By George Leopold

HPE Extreme Performance Solutions

HPE Prepares Customers for Success with the HPC Software Portfolio

High performance computing (HPC) software is key to harnessing the full power of HPC environments. Development and management tools enable IT departments to streamline installation and maintenance of their systems as well as create, optimize, and run their HPC applications. Read more…

Cray Wins $48M Supercomputer Contract from KISTI

September 21, 2017

It was a good day for Cray which won a $48 million contract from the Korea Institute of Science and Technology Information (KISTI) for a 128-rack CS500 cluster supercomputer. The new system, equipped with Intel Xeon Scal Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 13), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Machine Learning at HPC User Forum: Drilling into Specific Use Cases

September 22, 2017

The 66th HPC User Forum held September 5-7, in Milwaukee, Wisconsin, at the elegant and historic Pfister Hotel, highlighting the 1893 Victorian décor and art o Read more…

By Arno Kolster

Stanford University and UberCloud Achieve Breakthrough in Living Heart Simulations

September 21, 2017

Cardiac arrhythmia can be an undesirable and potentially lethal side effect of drugs. During this condition, the electrical activity of the heart turns chaotic, Read more…

By Wolfgang Gentzsch, UberCloud, and Francisco Sahli, Stanford University

PNNL’s Center for Advanced Tech Evaluation Seeks Wider HPC Community Ties

September 21, 2017

Two years ago the Department of Energy established the Center for Advanced Technology Evaluation (CENATE) at Pacific Northwest National Laboratory (PNNL). CENAT Read more…

By John Russell

Exascale Computing Project Names Doug Kothe as Director

September 20, 2017

The Department of Energy’s Exascale Computing Project (ECP) has named Doug Kothe as its new director effective October 1. He replaces Paul Messina, who is stepping down after two years to return to Argonne National Laboratory. Kothe is a 32-year veteran of DOE’s National Laboratory System. Read more…

Takeaways from the Milwaukee HPC User Forum

September 19, 2017

Milwaukee’s elegant Pfister Hotel hosted approximately 100 attendees for the 66th HPC User Forum (September 5-7, 2017). In the original home city of Pabst Blu Read more…

By Merle Giles

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakthrough Science at the Exascale” at the ACM Europe Conference in Barcelona. In conjunction with her presentation, Yelick agreed to a short Q&A discussion with HPCwire. Read more…

By Tiffany Trader

DARPA Pledges Another $300 Million for Post-Moore’s Readiness

September 14, 2017

The Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States can sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s Law technologies. Read more…

By Tiffany Trader

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Leading Solution Providers

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

GlobalFoundries: 7nm Chips Coming in 2018, EUV in 2019

June 13, 2017

GlobalFoundries has formally announced that its 7nm technology is ready for customer engagement with product tape outs expected for the first half of 2018. The Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This