Arm Yourselves for Exascale, Part 1

By Michael Wolfe

November 9, 2011

Today’s largest HPC systems are dominated (492 of the Top 500) by processors using two instruction sets (x86, Power) from three vendors (Intel, AMD, IBM). These processors have been typically designed for the highest single thread performance, but suffer from high cost (several hundred dollars to over $1500) and power demand (around 60-100W). As we build even larger and higher performance systems moving towards exascale, we might explore other avenues for delivering cost-efficient compute performance and reducing the power consumed by these systems.

In particular, there are at least three good reasons to explore whether processors designed for mobile systems can play a role in HPC, which I call innovation, federation and customization. Innovation, because the future of computing innovation is not on the desktop or in servers, but in ubiquitous computing, the internet of things. Federation, because embedded processors, like ARM-architecture devices, are available from a variety of vendors, thus freeing customers from single suppliers, allowing outstanding price and feature competition and increased innovation and flexibility. Customization, because the mobile market thrives on various manifestations of customization, and we in HPC might be able to take advantage of that.

Here, we use ARM-architecture processors as representative of mobile system processors, if only because ARM so dominates that space, though other possible processors include x86 (Intel Atom and AMD Geode), IBM PowerPC, MIPS, even embedded SPARC.

Innovation in the Post-PC World

In 2007, Steve Jobs predicted an upcoming explosion of “post-PC devices,” using the iPod as an example. He didn’t mean to suggest that the PC was dying or was doomed to eventual extinction, any more than PCs killed off workstations or mainframes. He meant that the growth seen in the PC industry was unlikely to continue at the same pace, and, as we’ve seen recently, the new growth path has been moving to phones, tablets, and other mobile, untethered, networked devices. This means that the innovators which have driven the PC world to ever greater capabilities have been moving to these new post-PC devices and ubiquitous computing. Hardware innovation is tending towards smaller, lower power devices.

Why do we care? Historically, supercomputers have been built with the devices available at the time. The first Cray-1 used four types of semiconductor chips: two types of NOR gates (fast for logic, bigger but slower for memory fanout), and two types of static RAM (fast for registers, slower but bigger for memory), and lots of wire. Contemporary supercomputers were built with essentially mainframe technology, mostly by the mainframe manufacturers.

A number of research parallel processors were designed, built and productively used in the 1980s using essentially workstation technology: printed circuit boards usually populated with commodity processors and connected by a high speed network. By the mid-1990s, massively parallel processors using RISC chips dominated the Top 500 supercomputer list.

In 2000, Intel introduced the Pentium 4, adding the double precision vector SSE2 instructions to the x86 family. This made the x86 a viable candidate for real supercomputing. Given the cost advantages of using high volume parts, more parallel supercomputers were designed using Intel and AMD processors. Within four years, over half the Top 500 supercomputers used some flavor of x86 processors, and that number is now close to 90%.

The cost of developing viable processors customized for general-purpose HPC is prohibitive, requiring system architects to use the best available commodity processors. Perhaps the one exception to that rule is IBM, which designed a special PowerPC chip for Blue Gene, though they adapted an existing commodity embedded processor rather than building a bespoke processor. When commodity innovation moves to the mobile world, we in the HPC industry may have to look at mobile processors as potentially the most cost effective solutions to our compute problems.

The Federation vs. the Empire

ARM, Ltd. doesn’t actually produce and sell chips. ARM licenses the core IP to vendors who include ARM cores in their own products. Most of these designs are Systems-on-chip (SOCs), including much of the glue logic on the same chip as the processor, as well as application-specific logic. This makes for better integration and lower part count for the eventual customer.

An SOC for a cell phone might include a DSP or two for audio encode/decode, a graphics driver for the display, interface for the keyboard, and radio components in addition to the main processor. An SOC for automotive electronic stability control might have interfaces for wheel speed sensors, accelerometers, an interface to control the brakes, and perhaps even a temperature sensor.

ARM processor deliveries are far ahead of x86 and PowerPC processor deliveries each year in units. The architecture is solid and viable. Moreover, there are a number of chip vendors building and supplying parts with ARM architecture cores, giving customers a broad choice of supplier. No one vendor can control availability or price, and there’s no fear of depending on a single source that may choose to change direction or that may not survive the long term. The ARM architecture may be the only viable candidate for an alternative processor to x86 and Power.

In the mobile world, standardization on ARM cores as the control processor has produced the same benefits that standardization on x86 has given the desktop. There are many choices for software ranging from operating systems, tools and applications ready to use for ARM processors. There is an army of trained programmers comfortable with programming, optimizing and tuning for ARM processors. There are a plethora of hardware devices that have been designed to work with ARM processors, though most of these would be integrated on the SOC.

There are two types of ARM licensees. Most vendors take the ARM core IP and integrate it directly into their own products; such an ARM core will be instruction-set compatible regardless of the vendor. Some vendors acquire an ARM architecture license, allowing them to augment their own ARM implementations. This gives them additional freedom to innovate or add extensions for particular target markets.

Customization for HPC

Within the ARM world, there is a high level of architectural variety. Among the more than 250 ARM microcontrollers in its catalog, STMicroelectronics, PGI’s parent company, offers one 32-bit ARM microcontroller that draws about 10 milliamps when running at its full speed (32 MHz), and can be scaled to lower clocks and voltages to draw even less current.

The latest high end ARM Cortex-A15 design supports one to four cores, SIMD floating point, up to 4MB level 2 cache, and up to 1TB (40 bits) of memory address space. Note there are no Cortex A15 MCUs available yet, though several are in the works. This architectural variety is a real strength of ARM in the mobile market; a designer can choose a version with all the necessary features, and without any unnecessary baggage, and keep within a desired size or power envelope.

As specific examples, let’s look at two current ARM processor offerings. One is the SPEAr chip from STMicroelectronics. The high end SPEAr 1340 has two ARM Cortex-A9 cores with up to 600MHz clock, 512KB level 2 cache, a Gigabit Ethernet port, a PCIe link, one SATA port, 2 USB ports, controllers for flash memory, interfaces for memory card, touch screen, small (6×6) keyboard, 7.1 channel sound, LCD controller, HD video decoders, digital video input, cryptographic accelerator, analog-digital converters, and various other IO features. The SPEAr is clearly designed for use in a multimedia device, and is optimized for low power.

The second is the ARMADA XP from Marvell; Marvell acquired the XScale business from Intel in 2006. The ARMADA XP is a relatively new product aimed directly at cloud computing. This chip has up to four ARM cores, up to 1.6GHz clock, 2MB shared level 2 cache, interface to DDR2 or DDR3 memory, four Gigabit Ethernet ports, four PCI-E ports, three USB 2.0 ports, two SATA ports, LCD controller, flash memory interface, UART, and more.

You could design either of those ARM chips right onto a small motherboard with memory and a disk and package a bunch of them into a 1U rack mount server. However, in the HPC space, do we really need USB ports, touch screen interfaces, and LCD controllers? Removing those from the chip might allow more room for more cores, or something more interesting.

The real potential for ARM architecture in HPC, and the third important reason to explore ARM, is the possibility to generate custom parts. Perhaps we could design the InfiniBand drivers right on the chip. Maybe we could add hardware support for quad-precision, which David Bailey and his colleagues predicted we’d want ten years or more ago. There may be an ability to add operations specific to certain markets, such as bioinformatics or financial.

Some of the more exciting systems over the past decade are custom designs, including Anton at D.E. Shaw Research, and the MDGRAPE-3 machine at RIKEN in Japan. In each case, custom design gives a significant performance advantage, but at high development cost, including fully custom software. Imagine if we could achieve similar performance advantages for specific applications, but retain most of the design and software development cost advantages of using standard chips.

In the mobile ARM space, there are different levels of customization. A fully custom chip would have a number of ARM cores, caches, memory interfaces, perhaps Ethernet or other ports, and maybe even some custom logic. The ARM architecture supports a coprocessor interface, so custom logic could be configured and controlled directly from software, just like early floating point units were. Even the ARM cores themselves can be customized by selecting a specific ARM version, or adding extensions like the NEON SIMD instructions.

The design of such a chip is easy on paper, but requires a long sequence of steps and perhaps a year or more before it comes out of fabrication and packaging. The design must be turned into RTL, laid out, verified, qualified on the technology to be used, a mask created, the chip fabricated and then tested. This takes both considerable time and money.

In the mobile space, the time and money is justified by very high volumes. Consider that Apple sold over 20 million iPhones and 9 million iPads in a single quarter this year. A custom chip in an iPhone or iPad would be justified based on that volume.

A second level is exemplified by the STMicroelectronics SPEAr chip mentioned above. ST offers these with a customizable logic block. During development, the customer would design and experiment with FPGA logic. When ready, the RTL from the FPGA is used to customize the on-chip logic. Because the chip is already designed with the custom logic block in place, validation is only required for the logic block, which takes only a few months.

A third level will be supported with the advent of through-silicon vias (TSVs). One obvious use for TSVs is to stack a memory chip on a processor chip, allowing lower latency, and higher bandwidth with many chip interconnections. But another important possibility is the ability to stack an FPGA or custom logic chip between a processor and memory, to be used like a coprocessor.

Summary

It’s a good time to explore alternatives to current standard processors for HPC, for at least three reasons. First, the HPC market can’t afford to develop its own processors, so it has to adopt the best of the commodity market, and the innovation in that market is moving to mobile. Second, ARM processors are by far the most popular 32-bit processors today and will soon have 64-bit versions available; moreover, there are many suppliers of ARM architecture processors, so if we’re going to look for a viable alternative, ARM is the leading (perhaps the only) candidate. Third, the potential for customization either broadly for the HPC market, or narrowly for specific applications, could give significant benefits to HPC that we simply can’t get from current commodity offerings. Add to these the potential cost and power advantages, and we’d be negligent if we don’t study this now.

This doesn’t mean that it’s inevitable, or an easy decision. There are several challenges and missing pieces that need to be filled in along the way. That will be the topic of my next article.

About the Author

Michael Wolfe has developed compilers for over 30 years in both academia and industry, and is now a senior compiler engineer at The Portland Group, Inc. (www.pgroup.com), a wholly-owned subsidiary of STMicroelectronics, Inc. The opinions stated here are those of the author, and do not represent opinions of The Portland Group, Inc. or STMicroelectronics, Inc.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

2022 Road Trip: NASA Ames Takes Off

November 25, 2022

I left Dallas very early Friday morning after the conclusion of SC22. I had a race with the devil to get from Dallas to Mountain View, Calif., by Sunday. According to Google Maps, this 1,957 mile jaunt would be the longe Read more…

2022 Road Trip: Sandia Brain Trust Sounds Off

November 24, 2022

As the 2022 Great American Supercomputing Road Trip carries on, it’s Sandia’s turn. It was a bright sunny day when I rolled into Albuquerque after a high-speed run from Los Alamos National Laboratory. My interview su Read more…

2022 HPC Road Trip: Los Alamos

November 23, 2022

With SC22 in the rearview mirror, it’s time to get back to the 2022 Great American Supercomputing Road Trip. To refresh everyone’s memory, I jumped in the car on November 3rd and headed towards SC22 in Dallas, stoppi Read more…

Chipmakers Looking at New Architecture to Drive Computing Ahead

November 23, 2022

The ability to scale current computing designs is reaching a breaking point, and chipmakers such as Intel, Qualcomm and AMD are putting their brains together on an alternate architecture to push computing forward. The chipmakers are coalescing around the new concept of sparse computing, which involves bringing computing to data... Read more…

QuEra’s Quest: Build a Flexible Neutral Atom-based Quantum Computer

November 23, 2022

Last month, QuEra Computing began providing access to its 256-qubit, neutral atom-based quantum system, Aquila, from Amazon Braket. Founded in 2018, and built on technology developed at Harvard and MIT, QuEra, is one of Read more…

AWS Solution Channel

Shutterstock 1648511269

Avoid overspending with AWS Batch using a serverless cost guardian monitoring architecture

Pay-as-you-go resources are a compelling but daunting concept for budget conscious research customers. Uncertainty of cloud costs is a barrier-to-entry for most, and having near real-time cost visibility is critical. Read more…

 

shutterstock_1431394361

AI and the need for purpose-built cloud infrastructure

Modern AI solutions augment human understanding, preferences, intent, and even spoken language. AI improves our knowledge and understanding by delivering faster, more informed insights that fuel transformation beyond anything previously imagined. Read more…

SC22’s ‘HPC Accelerates’ Plenary Stresses Need for Collaboration

November 21, 2022

Every year, SC has a theme. For SC22 – held last week in Dallas – it was “HPC Accelerates”: a theme that conference chair Candace Culhane said reflected “how supercomputing is continuously changing the world by Read more…

Chipmakers Looking at New Architecture to Drive Computing Ahead

November 23, 2022

The ability to scale current computing designs is reaching a breaking point, and chipmakers such as Intel, Qualcomm and AMD are putting their brains together on an alternate architecture to push computing forward. The chipmakers are coalescing around the new concept of sparse computing, which involves bringing computing to data... Read more…

QuEra’s Quest: Build a Flexible Neutral Atom-based Quantum Computer

November 23, 2022

Last month, QuEra Computing began providing access to its 256-qubit, neutral atom-based quantum system, Aquila, from Amazon Braket. Founded in 2018, and built o Read more…

SC22’s ‘HPC Accelerates’ Plenary Stresses Need for Collaboration

November 21, 2022

Every year, SC has a theme. For SC22 – held last week in Dallas – it was “HPC Accelerates”: a theme that conference chair Candace Culhane said reflected Read more…

Quantum – Are We There (or Close) Yet? No, Says the Panel

November 19, 2022

For all of its politeness, a fascinating panel on the last day of SC22 – Quantum Computing: A Future for HPC Acceleration? – mostly served to illustrate the Read more…

RISC-V Is Far from Being an Alternative to x86 and Arm in HPC

November 18, 2022

One of the original RISC-V designers this week boldly predicted that the open architecture will surpass rival chip architectures in performance. "The prediction is two or three years we'll be surpassing your architectures and available performance with... Read more…

Gordon Bell Special Prize Goes to LLM-Based Covid Variant Prediction

November 17, 2022

For three years running, ACM has awarded not only its long-standing Gordon Bell Prize (read more about this year’s winner here!) but also its Gordon Bell Spec Read more…

2022 Gordon Bell Prize Goes to Plasma Accelerator Research

November 17, 2022

At the awards ceremony at SC22 in Dallas today, ACM awarded the 2022 ACM Gordon Bell Prize to a team of researchers who used four major supercomputers – inclu Read more…

Gordon Bell Nominee Used LLMs, HPC, Cerebras CS-2 to Predict Covid Variants

November 17, 2022

Large language models (LLMs) have taken the tech world by storm over the past couple of years, dominating headlines with their ability to generate convincing hu Read more…

Nvidia Shuts Out RISC-V Software Support for GPUs 

September 23, 2022

Nvidia is not interested in bringing software support to its GPUs for the RISC-V architecture despite being an early adopter of the open-source technology in its GPU controllers. Nvidia has no plans to add RISC-V support for CUDA, which is the proprietary GPU software platform, a company representative... Read more…

RISC-V Is Far from Being an Alternative to x86 and Arm in HPC

November 18, 2022

One of the original RISC-V designers this week boldly predicted that the open architecture will surpass rival chip architectures in performance. "The prediction is two or three years we'll be surpassing your architectures and available performance with... Read more…

AWS Takes the Short and Long View of Quantum Computing

August 30, 2022

It is perhaps not surprising that the big cloud providers – a poor term really – have jumped into quantum computing. Amazon, Microsoft Azure, Google, and th Read more…

Chinese Startup Biren Details BR100 GPU

August 22, 2022

Amid the high-performance GPU turf tussle between AMD and Nvidia (and soon, Intel), a new, China-based player is emerging: Biren Technology, founded in 2019 and headquartered in Shanghai. At Hot Chips 34, Biren co-founder and president Lingjie Xu and Biren CTO Mike Hong took the (virtual) stage to detail the company’s inaugural product: the Biren BR100 general-purpose GPU (GPGPU). “It is my honor to present... Read more…

Tesla Bulks Up Its GPU-Powered AI Super – Is Dojo Next?

August 16, 2022

Tesla has revealed that its biggest in-house AI supercomputer – which we wrote about last year – now has a total of 7,360 A100 GPUs, a nearly 28 percent uplift from its previous total of 5,760 GPUs. That’s enough GPU oomph for a top seven spot on the Top500, although the tech company best known for its electric vehicles has not publicly benchmarked the system. If it had, it would... Read more…

AMD Thrives in Servers amid Intel Restructuring, Layoffs

November 12, 2022

Chipmakers regularly indulge in a game of brinkmanship, with an example being Intel and AMD trying to upstage one another with server chip launches this week. But each of those companies are in different positions, with AMD playing its traditional role of a scrappy underdog trying to unseat the behemoth Intel... Read more…

JPMorgan Chase Bets Big on Quantum Computing

October 12, 2022

Most talk about quantum computing today, at least in HPC circles, focuses on advancing technology and the hurdles that remain. There are plenty of the latter. F Read more…

UCIe Consortium Incorporates, Nvidia and Alibaba Round Out Board

August 2, 2022

The Universal Chiplet Interconnect Express (UCIe) consortium is moving ahead with its effort to standardize a universal interconnect at the package level. The c Read more…

Leading Solution Providers

Contributors

Using Exascale Supercomputers to Make Clean Fusion Energy Possible

September 2, 2022

Fusion, the nuclear reaction that powers the Sun and the stars, has incredible potential as a source of safe, carbon-free and essentially limitless energy. But Read more…

Nvidia, Qualcomm Shine in MLPerf Inference; Intel’s Sapphire Rapids Makes an Appearance.

September 8, 2022

The steady maturation of MLCommons/MLPerf as an AI benchmarking tool was apparent in today’s release of MLPerf v2.1 Inference results. Twenty-one organization Read more…

Not Just Cash for Chips – The New Chips and Science Act Boosts NSF, DOE, NIST

August 3, 2022

After two-plus years of contentious debate, several different names, and final passage by the House (243-187) and Senate (64-33) last week, the Chips and Science Act will soon become law. Besides the $54.2 billion provided to boost US-based chip manufacturing, the act reshapes US science policy in meaningful ways. NSF’s proposed budget... Read more…

SC22 Unveils ACM Gordon Bell Prize Finalists

August 12, 2022

Courtesy of the schedule for the SC22 conference, we now have our first glimpse at the finalists for this year’s coveted Gordon Bell Prize. The Gordon Bell Pr Read more…

Intel Is Opening up Its Chip Factories to Academia

October 6, 2022

Intel is opening up its fabs for academic institutions so researchers can get their hands on physical versions of its chips, with the end goal of boosting semic Read more…

AMD Previews 400 Gig Adaptive SmartNIC SOC at Hot Chips

August 24, 2022

Fresh from finalizing its acquisitions of FPGA provider Xilinx (Feb. 2022) and DPU provider Pensando (May 2022) ), AMD previewed what it calls a 400 Gig Adaptive smartNIC SOC yesterday at Hot Chips. It is another contender in the increasingly crowded and blurry smartNIC/DPU space where distinguishing between the two isn’t always easy. The motivation for these device types... Read more…

Google Program to Free Chips Boosts University Semiconductor Design

August 11, 2022

A Google-led program to design and manufacture chips for free is becoming popular among researchers and computer enthusiasts. The search giant's open silicon program is providing the tools for anyone to design chips, which then get manufactured. Google foots the entire bill, from a chip's conception to delivery of the final product in a user's hand. Google's... Read more…

AMD’s Genoa CPUs Offer Up to 96 5nm Cores Across 12 Chiplets

November 10, 2022

AMD’s fourth-generation Epyc processor line has arrived, starting with the “general-purpose” architecture, called “Genoa,” the successor to third-gen Eypc Milan, which debuted in March of last year. At a launch event held today in San Francisco, AMD announced the general availability of the latest Epyc CPUs with up to 96 TSMC 5nm Zen 4 cores... Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire