Intel Sets High Water Mark of One Teraflop with ‘Knights Corner’

By Michael Feldman

November 16, 2011

At SC11 in Seattle, Intel showed off an early silicon version of Intel’s Many Integrated Core (MIC) “Knight Corner,” the codename for its first commercial product based on their MIC architecture. The demonstration was performed for the benefit of reporters and analysts, who got to see the new chip in action at a press briefing here on Tuesday afternoon. The jury-rigged test setup had the chip running DGEMM (the double precision floating point version of the general matrix multiply algorithm) at a rather amazing one teraflop/second.

Rajeeb Hazra, GM of Intel’s Technical Computing, Datacenter and Connected Systems Group, waved one of the pre-production chip in front of audience, saying that they had produced “a few tens of chips” for early testing. According to Hazra, they were manufactured at one of their fabs using their 22nm process technology.

He was less forthcoming about other details on the chip however, dodging questions about core counts (once again reiterating that it will be more than 50), processor clock speed, and power consumption. On that last point, it’s likely that TDP is likely to be in the GPU-like 200 to 275 watt range, inasmuch as the coprocessors are destined for servers and workstations, which only have so much leeway with regard to power envelopes.

I did manage to find out the Knight Corner does indeed support ECC memory, although it wasn’t turned on for the DGEMM demo. According to the attending engineer, it doesn’t effect the flops on that code, but will lower performance somewhat on more general applications.

As Hazra pointed out in the briefing, this is the first general-purpose chip in history that is able to hit the one teraflop mark. And while that is true, it should be noted that NVIDIA’s “Kepler” GPU, which is likely to be in production prior to Knights Corner, will probably deliver somewhere between 1.2 to 1.4 double precision teraflops, or about twice that of the current Fermi-class Tesla GPUs.

Nonetheless, the early edition Knight Corner is a remarkable achievement by Intel, and something of a watershed moment for x86 chip making. In 1997, ASCI Red, an Pentium II Xeon-based supercomputer, needed 9,298 processor to hit this same one teraflop mark. And that machine, which was spread out over 72 cabinets, sucked up 800 KW of power.

The production Knights Corner chips delivered in a year or so may actually end up delivering something north of one teraflop, so it’s not a given that NVIDIA will win the flops battle in 2012. In any case, Intel is probably not overly concerned about absolute performance. It’s made a good case that the programming model for MIC will be the real differentiator here.

For some time Intel has been touting that its own x86 parallel compiler and development tools will offer complete support for MIC coprocessors, making the application porting effort much more productive than CUDA. When the code in question incorporates MIC-friendly parallel frameworks like OpenMP, initial porting may amount to no more than a recompile and a re-link. If that pans out as advertised, the ease-of-programming feature will ultimately be the deciding factor in MIC’s favor.

During the press briefing, R. Glenn Brook, a computational scientist at the National Institute for Computational Sciences, University of Tennessee, reported that his team had ported tens of million of lines of legacy science codes to MIC (on prototype “Knights Ferry” coprocessor-powered clusters) in under three months. According to Brook, some of these applications will probably never be ported to GPUs because the complexity of these codes would make the endeavor too onerous.

Clearly, Intel sees their manycore architecture as a path to exascale. In this realm power efficiency is the whole ball game, and MIC is inherently superior to more traditional x86 CPUs in this regard. If we assume Knights Corner is a 250 watt part, it will be able to deliver 4 gigaflops/watt today. That still a far cry from the 50 gigaflops/watt target for an exaflop system (which also has to include memory, interconnects, power supplies, etc.), but the performance/watt trajectory is much more in line with exascale efficiency compared Intel’s mainstream Xeon line.

Speaking of which, Hazra offered up some interesting performance stats on their new Xeon E5 (Sandy Bridge EP) processors. According to Intel testing, the Xeon E5-2680 chip delivers 172 gigaflops of peak performance. And while that bests any of the AMD Opteron 6200 series processors, it’s still well under 2 gigaflops/watt (hard to tell exactly since Intel hasn’t provided TDPs on these pre-launched parts). From that perspective, a traditional Xeon, at least without an on-chip MIC coprocessor, has a rather uncertain future in the exascale era.

But at least for the early petascale era, the Xeon processor is doing just fine. The previous generation Xeon 5600 line is in 223 of the top 500 supercomputers in the world. And the aforementioned Xeon E5 is already in 10 systems, despite the fact that the product won’t be officially launched until the first half of 2012 (which, to my mind, makes the term launch kind of meaningless).

In addition, the E5 will also be making an appearance in future top 10 systems, like GENCI’s 2-petaflop “Curie” super. It is also the CPU of choice for TACC’s 10-petaflop “Stampede” supercomputer, which is scheduled for deployment in early 2013. In this case though, the E5 will be eclipsed by the Knights Corner coprocessors, which will provide 8 of those 10 petaflops. If that trend holds, then MIC will indeed be Intel’s dominant supercomputing architecture for the second half the decade.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Neural Networking Shows Promise in Earthquake Monitoring

February 21, 2018

A team of Harvard University and MIT researchers report their new neural networking method for monitoring earthquakes is more accurate and orders of magnitude faster than traditional approaches. Read more…

By John Russell

HPE Wins $57 Million DoD Supercomputing Contract

February 20, 2018

Hewlett Packard Enterprise (HPE) today revealed details of its massive $57 million HPC contract with the U.S. Department of Defense (DoD). The deal calls for HPE to provide the DoD High Performance Computing Modernizatio Read more…

By Tiffany Trader

Topological Quantum Superconductor Progress Reported

February 20, 2018

Overcoming sensitivity to decoherence is a persistent stumbling block in efforts to build effective quantum computers. Now, a group of researchers from Chalmers University of Technology (Sweden) report progress in devisi Read more…

By John Russell

HPE Extreme Performance Solutions

Safeguard Your HPC Environment with the World’s Most Secure Industry Standard Servers

Today’s organizations operate in an environment with ever-evolving threats, and in order to protect themselves they must continuously bolster their security strategy. Hewlett Packard Enterprise (HPE) and Intel® are addressing modern security challenges with the world’s most secure industry standard servers powered by the latest generation of Intel® Xeon® Scalable processors. Read more…

Fluid HPC: How Extreme-Scale Computing Should Respond to Meltdown and Spectre

February 15, 2018

The Meltdown and Spectre vulnerabilities are proving difficult to fix, and initial experiments suggest security patches will cause significant performance penalties to HPC applications. Even as these patches are rolled o Read more…

By Pete Beckman

Neural Networking Shows Promise in Earthquake Monitoring

February 21, 2018

A team of Harvard University and MIT researchers report their new neural networking method for monitoring earthquakes is more accurate and orders of magnitude faster than traditional approaches. Read more…

By John Russell

Fluid HPC: How Extreme-Scale Computing Should Respond to Meltdown and Spectre

February 15, 2018

The Meltdown and Spectre vulnerabilities are proving difficult to fix, and initial experiments suggest security patches will cause significant performance penal Read more…

By Pete Beckman

Brookhaven Ramps Up Computing for National Security Effort

February 14, 2018

Last week, Dan Coats, the director of Director of National Intelligence for the U.S., warned the Senate Intelligence Committee that Russia was likely to meddle in the 2018 mid-term U.S. elections, much as it stands accused of doing in the 2016 Presidential election. Read more…

By John Russell

AI Cloud Competition Heats Up: Google’s TPUs, Amazon Building AI Chip

February 12, 2018

Competition in the white hot AI (and public cloud) market pits Google against Amazon this week, with Google offering AI hardware on its cloud platform intended Read more…

By Doug Black

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

The Food Industry’s Next Journey — from Mars to Exascale

February 12, 2018

Global food producer and one of the world's leading chocolate companies Mars Inc. has a unique perspective on the impact that exascale computing will have on the food industry. Read more…

By Scott Gibson, Oak Ridge National Laboratory

Singularity HPC Container Start-Up – Sylabs – Emerges from Stealth

February 8, 2018

The driving force behind Singularity, the popular HPC container technology, is bringing the open source platform to the enterprise with the launch of a new vent Read more…

By George Leopold

Dell EMC Debuts PowerEdge Servers with AMD EPYC Chips

February 6, 2018

AMD notched another EPYC processor win today with Dell EMC’s introduction of three PowerEdge servers (R6415, R7415, and R7425) based on the EPYC 7000-series p Read more…

By John Russell

Inventor Claims to Have Solved Floating Point Error Problem

January 17, 2018

"The decades-old floating point error problem has been solved," proclaims a press release from inventor Alan Jorgensen. The computer scientist has filed for and Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

Leading Solution Providers

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

V100 Good but not Great on Select Deep Learning Aps, Says Xcelerit

November 27, 2017

Wringing optimum performance from hardware to accelerate deep learning applications is a challenge that often depends on the specific application in use. A benc Read more…

By John Russell

SC17: Singularity Preps Version 3.0, Nears 1M Containers Served Daily

November 1, 2017

Just a few months ago about half a million jobs were being run daily using Singularity containers, the LBNL-founded container platform intended for HPC. That wa Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This