Ten Ways to Fool the Masses When Giving Performance Results on GPUs

By Scott Pakin

December 13, 2011

The performance potential of GPU computing has produced significant excitement in the HPC community. However, as was the case with the advent of parallel computing decades ago, the nascent technology does not equally benefit all applications — or even all components of a single application. Alas, modest speedups from GPU acceleration are rarely publication-worthy, a fact that occasionally leads GPU zealots to adopt scientifically dubious techniques to artificially inflate the performance benefit of GPU computing to more impressive levels.

In this modern revival of David Bailey’s classic report, “Twelve Ways to Fool the Masses When Giving Performance Results on Parallel Computers,” I present ten forms of experimental sloppiness I’ve encountered repeatedly in scientific publications, all of which can be used to chicane GPU rookies (and pointy-haired bosses) into believing that GPUs can magically improve any application’s performance by multiple orders of magnitude. With this list as their vade mecum, readers will learn to be skeptical of exaggerated GPU performance claims.

Ready to boost your reported GPU performance results without boosting your actual GPU performance? Read on…

1. Quote performance results only with 32-bit floating-point arithmetic, not 64-bit arithmetic.

GPUs get double the performance when using single-precision arithmetic. Who needs more than eight decimal digits of precision, anyway? It goes without saying that the CPU version of the code you compare against should use exclusively 64-bit arithmetic because, well, that’s how people write CPU code (even though CPUs also double their flop rate when utilizing 32-bit SIMD arithmetic).

2. Don’t time data movement or kernel-invocation overhead.

Copying data between CPU memory and GPU memory is slow and cuts into the amount of GPU performance that one can claim. Hence, to make GPUs look good, be sure to start the clock after all of the program’s data have already been transferred to GPU memory and the kernel has already been launched and stop the clock before the results are copied back to CPU memory. There are two corollaries to this rule:

Corollary 1: Never, ever report the performance of an application running across more than one GPU-accelerated node. Doing so requires all sorts of CPU-managed communication, and *that* requires data movement and additional kernel invocations — bad for speedup numbers.

Corollary 2: Always report performance of single kernels, not of complete applications. This is especially true of applications containing important but hard-to-accelerate subroutines.

3. Quote GPU cost and ubiquity for low-end parts. Measure performance on high-end parts.

Here’s some text you can adapt as necessary: “GPUs are an important platform to target because they cost under $100 and come standard with all modern computer systems. For our experiments we measured performance on an NVIDIA Tesla M2090…”

4. Quote memory bandwidth only to/from on-board GPU memory, not to/from main memory.

Impress your audience with your high-end GPU’s ability to do memory transfers at 177 GB/s. As long as you never need to store, transfer, or utilize the result of your computations, that’s a perfectly honest number to quote.

5. Disable ECC checks on memory.

GPUs run faster — and provide more usable memory capacity — when they don’t have to try so hard to produce correct data. Besides, what GPU kernel runs long enough that this should be an issue?

6. Compare full (or even multiple) GPU performance to a single CPU core.

Always compare what you started with (a sequential CPU program) with what you ended up producing (a parallel GPU program). A 10x speedup of GPU code over CPU code sure seems a lot more impressive when you neglect to mention that your host system contains two sockets of eight-core CPUs, which you *could* have used instead.

7. Compare heavily optimized GPU code to unoptimized CPU code.

Naturally, you’ve made sure the GPU code runs as fast as possible by restructuring it to exploit data parallelism, memory locality, and other GPU-friendly program characteristics. Now be sure to compare it only against the original, naive CPU code, not a version that exploits the CPU’s SIMD instructions, properly blocks for cache, optimally aligns data structures, or includes any of the other performance optimizations that CPU programmers rarely bother with. Definitely don’t backport your GPU modifications to the CPU, or the reported speedup will be disappointingly less.

8. Scale the problem size to fit within GPU memory.

This recommendation goes both ways. If your GPU has 6 GB of on-board memory and your application’s problem size is larger than that, then scale it down to 6 GB so you can avoid all the expensive synchronization and messy double-buffering that large problem sizes entail. If your GPU has 6 GB of on-board memory and your application’s problem size is significantly smaller than that, then weak-scale the problem size, even beyond meaningful bounds, so you can reap the performance benefits of increased data parallelism. The following recommendation further develops this point:

9. Sacrifice meaningful numerics for GPU performance.

GPUs are renowned for their computational throughput. However, reaching peak performance requires amortizing that nasty startup cost of moving kernels and data to the GPU. Hence, to demonstrate good GPU performance, always run far more iterations than are typical, necessary, practical, or even meaningful for real-world usage, numerics be damned!

10. Select algorithms that favor GPUs.

The best CPU algorithms often don’t make the best GPU algorithms and vice versa. Consequently, you should always take whatever algorithm works best on the GPU and benchmark that against a CPU version. What’s great about this approach over comparing the performance of the best CPU algorithm to that of the best GPU algorithm is that it leads to a “fair” comparison. After all, you ran the same algorithm on both systems — fair, right?

Parting thoughts

The good news is that advances in GPU technology are alleviating some of the costs that the preceding trickery attempts to hide. While parts of my list may soon appear anachronistic, there should still be enough deviousness remaining to please even the most discerning GPU fanboy.

As a final, largely unrelated comment, can we please eliminate the oxymoronic noun “GPGPU” from our collective lexicon? If a processor is specialized for graphics processing, then it’s not really a general-purpose device, is it?

Further reading

[Bai91] David H. Bailey. “Highly parallel perspective: Twelve ways to fool the masses when giving performance results on parallel computers”. Supercomputing Review, 4(8):54-55, August, 1991. ISSN: 1048-6836. Also appears as NASA Ames RNR Technical Report RNR-91-020.

[BBR10] Rajesh Bordawekar, Uday Bondhugula, and Ravi Rao. “Can CPUs match GPUs on performance with productivity?: Experiences with optimizing a FLOP-intensive application on CPUs and GPU”. IBM T. J. Watson Research Center Technical Report RC25033 (W1008-020). August 5, 2010.

[LKC+10] Victor W. Lee, Changkyu Kim, Jatin Chhugani, Michael Deisher, Daehyun Kim, Anthony D. Nguyen, Nadathur Satish, Mikhail Smelyanskiy, Srinivas Chennupaty, Per Hammarlund, Ronak Singhal, and Pradeep Dubey. “Debunking the 100X GPU vs. CPU myth: An evaluation of throughput computing on CPU and GPU”, Proceedings of the 37th Annual International Symposium on Computer Architecture (ISCA 2010), Saint-Malo, France, June 19-23, 2010. ISBN: 978-1-4503-0053-7, DOI: 10.1145/1815961.1816021.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Battle Brews over Trump Intentions for Funding Science

February 27, 2017

The battle over science funding – how much and for what kinds of science – Read more…

By John Russell

Google Gets First Dibs on New Skylake Chips

February 27, 2017

As part of an ongoing effort to differentiate its public cloud services, Google made good this week on its intention to bring custom Xeon Skylake chips from Intel Corp. Read more…

By George Leopold

Thomas Sterling on CREST and Academia’s Role in HPC Research

February 27, 2017

The US advances in high performance computing over many decades have been a product of the combined engagement of research centers in industry, government labs, and academia. Read more…

By Thomas Sterling, Indiana University

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

HPE Extreme Performance Solutions

Manufacturers Reaping the Benefits of Remote Visualization

Today’s manufacturers are operating in an ever-changing atmosphere, and finding new ways to boost productivity has never been more vital.

This is why manufacturers are ramping up their investments in high performance computing (HPC), a trend which has helped give rise to the “connected factory” and Industrial Internet of Things (IIoT) concepts that are proliferating throughout the industry today. Read more…

Weekly Twitter Roundup (Feb. 23, 2017)

February 23, 2017

Here at HPCwire, we aim to keep the HPC community apprised of the most relevant and interesting news items that get tweeted throughout the week. Read more…

By Thomas Ayres

HPE Server Shows Low Latency on STAC-N1 Test

February 22, 2017

The performance of trade and match servers can be a critical differentiator for financial trading houses. Read more…

By John Russell

HPC Financial Update (Feb. 2017)

February 22, 2017

In this recurring feature, we’ll provide you with financial highlights from companies in the HPC industry. Check back in regularly for an updated list with the most pertinent fiscal information. Read more…

By Thomas Ayres

Rethinking HPC Platforms for ‘Second Gen’ Applications

February 22, 2017

Just what constitutes HPC and how best to support it is a keen topic currently. Read more…

By John Russell

Thomas Sterling on CREST and Academia’s Role in HPC Research

February 27, 2017

The US advances in high performance computing over many decades have been a product of the combined engagement of research centers in industry, government labs, and academia. Read more…

By Thomas Sterling, Indiana University

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Drug Developers Use Google Cloud HPC in the Fight Against ALS

February 16, 2017

Within the haystack of a lethal disease such as ALS (amyotrophic lateral sclerosis / Lou Gehrig’s Disease) there exists, somewhere, the needle that will pierce this therapy-resistant affliction. Read more…

By Doug Black

Azure Edges AWS in Linpack Benchmark Study

February 15, 2017

The “when will clouds be ready for HPC” question has ebbed and flowed for years. Read more…

By John Russell

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

US, China Vie for Supercomputing Supremacy

November 14, 2016

The 48th edition of the TOP500 list is fresh off the presses and while there is no new number one system, as previously teased by China, there are a number of notable entrants from the US and around the world and significant trends to report on. Read more…

By Tiffany Trader

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

D-Wave SC16 Update: What’s Bo Ewald Saying These Days

November 18, 2016

Tucked in a back section of the SC16 exhibit hall, quantum computing pioneer D-Wave has been talking up its new 2000-qubit processor announced in September. Forget for a moment the criticism sometimes aimed at D-Wave. This small Canadian company has sold several machines including, for example, ones to Lockheed and NASA, and has worked with Google on mapping machine learning problems to quantum computing. In July Los Alamos National Laboratory took possession of a 1000-quibit D-Wave 2X system that LANL ordered a year ago around the time of SC15. Read more…

By John Russell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

Leading Solution Providers

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

Nvidia Sees Bright Future for AI Supercomputing

November 23, 2016

Graphics chipmaker Nvidia made a strong showing at SC16 in Salt Lake City last week. Read more…

By Tiffany Trader

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

Dell Knights Landing Machine Sets New STAC Records

November 2, 2016

The Securities Technology Analysis Center, commonly known as STAC, has released a new report characterizing the performance of the Knight Landing-based Dell PowerEdge C6320p server on the STAC-A2 benchmarking suite, widely used by the financial services industry to test and evaluate computing platforms. The Dell machine has set new records for both the baseline Greeks benchmark and the large Greeks benchmark. Read more…

By Tiffany Trader

Intel and Trump Announce $7B for Fab 42 Targeting 7nm

February 8, 2017

In what may be an attempt by President Trump to reset his turbulent relationship with the high tech industry, he and Intel CEO Brian Krzanich today announced plans to invest more than $7 billion to complete Fab 42. Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This