Designer of Microprocessor-Memory Chip Aims to Topple Memory and Power Walls

By Michael Feldman

January 17, 2012

Whether you’re talking about high performance computers, enterprise servers, or mobile devices, the two biggest impediments to application performance in computing today are the memory wall and the power wall. Venray Technology is aiming to knock down those walls with a unique approach that puts CPU cores and DRAM on the same die. The company has been in semi-stealth mode since it inception seven years ago, but is now trying to get the word out about its technology as it searches for a commercial buyer.

Dallas-based Venray is the brainchild of Russell Fish, who made himself the CTO (there is no CEO listed on the website) and the principal architect. Fish is co-designer of the Sh-Boom Processor, and holder of multiple microprocessor patents. These patents turned out to be fundamental to the operation of modern microprocessors and have been licensed by practically every computer and semiconductor manufacturer on the planet. The proceeds from those patents are being used to fund Venray.

Since 2007, Fish and company have been engaged in the design and marketing of a novel CPU-DRAM technology, known as TOMI, which stands for Thread Optimized Multiprocessor. With TOMI, the company aims to do what no other chip maker has done before, namely embed a general-purpose processor in vanilla DRAM. The idea is to use the physical proximity of the CPU and memory, as well as extra-wide busses (4,096 bits, in the case of the first TOMI designs), to flatten the memory wall.

The memory wall is huge problem in high performance computing and big data applications today and will soon limit computing across all segments. The problem was brought home by a 2008 study of multicore performance at Sandia National Labs, in which researchers demonstrated that for certain classes of data-intensive applications, the use of extra cores to increase performance is counter-productive.

For these application profiles, performance basically flattened between four and eight cores, and actually declined beyond that. The problem was that as more cores were added, they were starved for the limited amount of memory bandwidth available, and after a certain point, the overhead of memory contention actually decreased performance. Prospective solutions, such as memory chip stacking (for example, Micron’s Hybrid Memory Cube) are unproven and have yet to find their way into the commercial market.

Some microprocessor-memory integration has been attempted with embedded DRAM (eDRAM), a technology that promises a lot more capacity than can be delivered by on-chip cache memory. It has been used as a foundation for some integrated SoC devices including IBM’s Power7 CPU and Blue Gene ASIC, as well as for many of the processors that power game console devices, such as the Sony PlayStation. Embedded DRAM was also the memory technology of choice for the 2000-era IRAM research effort, which aimed to integrate a 256-bit vector microprocessor with 16MB of memory.

But even though eDRAM is much denser than cache memory, it can’t provide the storage capacity of conventional DRAM. It is also hundreds of times as expensive as regular memory. “The people that have tried to combine CPUs and memory before have usually erred on the side of having the CPUs too big and the memory too small,” says Fish. “They did not understand the difference between embedding DRAM in CPUs and making CPUs in DRAMs.”

The challenge of melding CPUs with DRAM is that microprocessors are much more complex beasts than memories, and as a result, are manufactured with entirely different semiconductor processes. Typically semiconductor logic require ten or more layers of material to be laid down on the die, compared to just three for DRAM. However, if a microprocessor can be designed much more simply, reducing the number and complexity of logic gate connections, it is possible to more or less flatten the layout and use just three layers.

That is the fundamental magic used by TOMI. Its second-generation design, named Borealis, consists of an 8-core RISC CPU built using the three-layer DRAM process. The CPU itself is made up of just 22 thousand transistors (not including cache and the memory controller), embedded in a 1 Gbit DRAM chip. On the 42nm process node, the CPU takes up just 14 percent of the die.

It is possible to use the TOMI technology to implement legacy microprocessor architectures, but big CPUs, in particular, would not be able to squeeze onto their DRAM process technology — at least not at current CMOS geometries. In any case, Fish seem to think the optimal mix of memory to logic is around 5 to 1.

To get to that level, Fish and company pared down its CPU to just the basics: 32-bit integer hardware, and a small set of instructions (forgoing less useful instructions like auto-index and auto-decrement). The lack of floating point hardware, which tend to suck up a lot of silicon real estate, doesn’t rule out for support for those operations; they are just emulated via software libraries.

A very useful side effect of using the simpler DRAM processes is that it’s much cheaper to produce a CPU this way. The cost of manufacturing a billion DRAM transistors is less than a dollar versus more than $300 for a microprocessor. But another big savings is in power draw. The Borealis CPU at 2.1 GHz draws a measly 98 mW. Compare that to the 100-plus watts for an x86 CPU sporting a billion transistors.

Of course, the Borealis microprocessor is much less performant than a billion transistor CPU in raw compute power. It’s specifically built to maximize the throughput of analytics applications chewing on large datasets, aka big data. “We’ve probably built the most efficient big data processor in existence,” claims Fish.

To prove their point, Venray benchmarked their hardware with Sandia Labs’ MapReduce-MPI software and an unstructured data application running on their hardware — a circuit board with 16 Borealis chips (128 cores, 16GB of DRAM). According to the company, the TOMI system was able to achieve nearly 12 times the performance and use less than 1/10 the power compared to the same code running on an Intel Xeon-based cluster. Venray says the hardware would cost about $35 thousand versus $1.65 million for the equivalent x86 system.

Beyond benchmarks, TOMI is built for all sorts of data mining, high-end analytics, and pattern recognition software. To Fish, these are the killer applications that will drive the industry in the future. And since the architecture is naturally energy efficient, TOMI would be equally at home in mobile devices and in cloud servers.

The downside, of course, is that unlike x86 and ARM, the architecture has no vast ecosystem behind it. But according to Fish, by providing a C/C++ compiler via gcc, the whole Linux toolchain can be leveraged. For legacy applications, the bigger problem is the recoding that would have to be done. Most applications assume powerful single-threaded CPUs and small memory footprints, rather than the inverse. None of this deters Fish, who sees the legacy CPU architectures as a dead end, especially for big data applications that is poised to drive a lot of growth in the IT sector.

At this point, Fish and his cohorts are actively in search of a single buyer for TOMI, most likely a computer manufacturer of some sort. According to him, the advantage of the technology is wrapped up in its exclusivity, so licensing the IP would dilute the value to prospective customers. To date, they have received the most attention from buyers outside the US. One overseas group was ready to write “a large check,” but Fish declined, wanting to give US-based companies a shot. According to him, in the past five or six months, prospective buyers in the US have shown increased interest. “Lots of people want to be our friends right now,” he says.

Related articles

IBM Will Chip in on Micron’s 3D Hybrid Memory Cube

Up Against the Memory Wall

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Tribute: Dr. Bob Borchers, 1936-2018

June 21, 2018

Dr. Bob Borchers, a leader in the high performance computing community for decades, passed away peacefully in Maui, Hawaii, on June 7th. His memorial service will be held on June 22nd in Reston, Virginia. Dr. Borchers Read more…

By Ann Redelfs

ISC 2018 Preview from @hpcnotes

June 21, 2018

Prepare for your social media feed to be saturated with #HPC, #ISC18, #Top500, etc. Prepare for your mainstream media to talk about supercomputers (in between the hourly commentary on Brexit, the FIFA World Cup, or US pr Read more…

By Andrew Jones

AMD’s EPYC Road to Redemption in Six Slides

June 21, 2018

A year ago AMD returned to the server market with its EPYC processor line. The earth didn’t tremble but folks took notice. People remember the Opteron fondly but later versions of the Bulldozer line not so much. Fast f Read more…

By John Russell

HPE Extreme Performance Solutions

HPC and AI Convergence is Accelerating New Levels of Intelligence

Data analytics is the most valuable tool in the digital marketplace – so much so that organizations are employing high performance computing (HPC) capabilities to rapidly collect, share, and analyze endless streams of data. Read more…

IBM Accelerated Insights

Preview the World’s Smartest Supercomputer at ISC 2018

Introducing an accelerated IT infrastructure for HPC & AI workloads Read more…

Why Student Cluster Competitions are Better than World Cup

June 21, 2018

My last article about the ISC18 Student Cluster Competition, titled “World Cup is Lame Compared to This Competition”, may have implied that I believe Student Cluster Competitions are better than World Cup soccer in s Read more…

By Dan Olds

ISC 2018 Preview from @hpcnotes

June 21, 2018

Prepare for your social media feed to be saturated with #HPC, #ISC18, #Top500, etc. Prepare for your mainstream media to talk about supercomputers (in between t Read more…

By Andrew Jones

AMD’s EPYC Road to Redemption in Six Slides

June 21, 2018

A year ago AMD returned to the server market with its EPYC processor line. The earth didn’t tremble but folks took notice. People remember the Opteron fondly Read more…

By John Russell

European HPC Summit Week and PRACEdays 2018: Slaying Dragons and SHAPEing Futures One SME at a Time

June 20, 2018

The University of Ljubljana in Slovenia hosted the third annual EHPCSW18 and fifth annual PRACEdays18 events which opened May 29, 2018. The conference was chair Read more…

By Elizabeth Leake (STEM-Trek for HPCwire)

Cray Introduces All Flash Lustre Storage Solution Targeting HPC

June 19, 2018

Citing the rise of IOPS-intensive workflows and more affordable flash technology, Cray today introduced the L300F, a scalable all-flash storage solution whose p Read more…

By John Russell

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

The Machine Learning Hype Cycle and HPC

June 14, 2018

Like many other HPC professionals I’m following the hype cycle around machine learning/deep learning with interest. I subscribe to the view that we’re probably approaching the ‘peak of inflated expectation’ but not quite yet starting the descent into the ‘trough of disillusionment. This still raises the probability that... Read more…

By Dairsie Latimer

Xiaoxiang Zhu Receives the 2018 PRACE Ada Lovelace Award for HPC

June 13, 2018

Xiaoxiang Zhu, who works for the German Aerospace Center (DLR) and Technical University of Munich (TUM), was awarded the 2018 PRACE Ada Lovelace Award for HPC for her outstanding contributions in the field of high performance computing (HPC) in Europe. Read more…

By Elizabeth Leake

U.S Considering Launch of National Quantum Initiative

June 11, 2018

Sometime this month the U.S. House Science Committee will introduce legislation to launch a 10-year National Quantum Initiative, according to a recent report by Read more…

By John Russell

MLPerf – Will New Machine Learning Benchmark Help Propel AI Forward?

May 2, 2018

Let the AI benchmarking wars begin. Today, a diverse group from academia and industry – Google, Baidu, Intel, AMD, Harvard, and Stanford among them – releas Read more…

By John Russell

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

US Plans $1.8 Billion Spend on DOE Exascale Supercomputing

April 11, 2018

On Monday, the United States Department of Energy announced its intention to procure up to three exascale supercomputers at a cost of up to $1.8 billion with th Read more…

By Tiffany Trader

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Hennessy & Patterson: A New Golden Age for Computer Architecture

April 17, 2018

On Monday June 4, 2018, 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Sympo Read more…

By Staff

Leading Solution Providers

SC17 Booth Video Tours Playlist

Altair @ SC17

Altair

AMD @ SC17

AMD

ASRock Rack @ SC17

ASRock Rack

CEJN @ SC17

CEJN

DDN Storage @ SC17

DDN Storage

Huawei @ SC17

Huawei

IBM @ SC17

IBM

IBM Power Systems @ SC17

IBM Power Systems

Intel @ SC17

Intel

Lenovo @ SC17

Lenovo

Mellanox Technologies @ SC17

Mellanox Technologies

Microsoft @ SC17

Microsoft

Penguin Computing @ SC17

Penguin Computing

Pure Storage @ SC17

Pure Storage

Supericro @ SC17

Supericro

Tyan @ SC17

Tyan

Univa @ SC17

Univa

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

Google I/O 2018: AI Everywhere; TPU 3.0 Delivers 100+ Petaflops but Requires Liquid Cooling

May 9, 2018

All things AI dominated discussion at yesterday’s opening of Google’s I/O 2018 developers meeting covering much of Google's near-term product roadmap. The e Read more…

By John Russell

Nvidia Ups Hardware Game with 16-GPU DGX-2 Server and 18-Port NVSwitch

March 27, 2018

Nvidia unveiled a raft of new products from its annual technology conference in San Jose today, and despite not offering up a new chip architecture, there were still a few surprises in store for HPC hardware aficionados. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Franci Read more…

By John Russell

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Google Charts Two-Dimensional Quantum Course

April 26, 2018

Quantum error correction, essential for achieving universal fault-tolerant quantum computation, is one of the main challenges of the quantum computing field and it’s top of mind for Google’s John Martinis. At a presentation last week at the HPC User Forum in Tucson, Martinis, one of the world's foremost experts in quantum computing, emphasized... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This