SeaMicro Launches High-End Microserver

By Michael Feldman

February 1, 2012

Server maker SeaMicro has unveiled the SM10000-XE, a new microserver aimed squarely at the burgeoning ultra-scale datacenter market. The company is best known for pioneering the microserver space using Intel’s power-sipping Atom CPUs, but in this latest offering, SeaMicro has opted for high powered, low-wattage Sandy Bridge Xeons, which expands the application horizons of microservers considerably.

Microservers were originally invented to drastically shrink the power and space associated with large-scale computing. Up until now though, microservers have been powered by relatively low performance processors, such as the Atom CPU and 32-bit ARM chips. By necessity, that meant the application set was limited to light-weight workloads that could be highly parallelized, such as web serving and batch analytics.

With the addition of low-wattage but more performant Xeons into the mix, SeaMicro is looking to expand the microserver business into what it calls “brawny applications.” That includes more traditional enterprise workloads like Java, PHP, MemCacheD, and NoSQL, as well as web-based database processing. SeaMicro CEO Andrew Feldman characterized the new Xeon-powered SM10000-XE as the “the mainstreaming of the microserver.”

The SM10000-XE, which lists for $138,000, is a chassis that houses 64 single-socket compute nodes. Each node consists of a 45W quad-core Xeon (E3-1260L) and up to 32 GB of Samsung’s power-efficient DRAM (1.35V, 30nm process technology). A SATA slot is available for an optional hard disk or SSD and Ethernet uplinks of either the GigE or 10GigE variety are available to connect the box to the outside world.

The microserver nodes are strung together in a 3D torus with SeaMicro’s high bandwidth, low latency “Freedom Supercompute Fabric.” It provide a whopping 10 GigE bandwidth to each socket — 1.28 terabits across the whole chassis. As such, it replaces around 1,000 GigE switches, which saves hundreds of thousands of dollars in up-front cost, as well as substantial energy costs over the system’s lifetime.

The 64-node chassis fits in a 10U form factor and draws a modest 3.5 KW. According to Feldman that’s about three times the density and one half the power of competing x86 solutions. And thanks to the interprocessor fabric, the CPUs have access to 12 times the external bandwidth of a conventional server. Feldman says 20 of these SM10000-XE chassis have enough computational muscle to run Amazon’s entire web e-retail business. “This is quite simply the most efficient Xeon server ever built,” he claims.

Such density is achieved with the help of SeaMicro’s own Freedom ASIC, the technology that distinguishes the company’s microserver from its competitors. The ASIC encapsulates not only the Freedom fabric interconnect, but also I/O virtualization logic which SeaMicro says replaces 90 percent of the motherboard components, including external I/O and network interface chips. Also included on the ASIC is something called TIO (Turn It Off), which can shut down unused logic blocks on the CPU, further reducing the power draw.

Because of all this consolidation, only three components remain on the motherboard: the CPU (plus CPU chipset), the DRAM chips, and SeaMicro’s ASIC. The entire chipset fits onto an 11-by-5.5-inch card, but that doesn’t include a SATA drive or SSD if the customer opts for such storage.

Although Feldman claims that the SM10000-XE will propel the microserver into “every nook and cranny of the scale-out datacenter,” at no time did he mention high performance computing, an application area that also becoming space and power limited. But many embarrassing parallel applications, scientific or otherwise, are actually well suited to this architecture. That’s assuming the code can be sliced up in such a way that its memory requirements per node don’t exceed the relatively modest 32GB limit. Unfortunately, there is no cache coherency across nodes.

Applications fitting this profile would be things like genomic analysis, certain types of seismic analysis, large-scale image rendering, and all sorts of scientific data mining. The fact that the low latency Freedom fabric can feed each CPU with 10GigE (2.5 gigabits/second per core) suggests MPI-based applications should fare rather well on this architecture.

Keep in mind that the low-wattage Xeon E3-1260L used in the SM10000-XE provides quite respectable performance. Since the chip is part of the Sandy Bridge family, it supports the new AVX floating point instructions, which means each core can execute 8 double precision FP instructions per clock cycle. So at 2.4GHz, the quad-core E3-1260L delivers a peak performance of 76.8 gigaflops (4.9 teraflops for the entire chassis). That works out to about 1400 megaflops/watt, which could place an SM10000-XE system in the top ten of the latest Green500 list.

The nice thing about the SeaMicro fabric and I/O virtualization technology is that it is designed to be chip agnostic. The ease which the company can do that is enabled by hooking the fabric into the standard PCIe interface on the host processor. If other low-power processors come along (think 64-bit ARM), SeaMicro should be able to build microservers around those chips in fairly short order.

Because the Xeon is the mainstream chip in commercial clusters today, SeaMicro intends to sell more of these boxes than they did with their Atom-based offerings. Even without the SM10000-XE though, the company has been doing “phenomenal,” according to Feldman.  Although he didn’t offer how much revenue his company collected during their first year of business (2011), Feldman says it was more than the combined sales of Riverbed, 3PAR, Aruba Networks and Data Domain combined during their first year. “It looks pretty bright out there right now,” he says.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Dell Strikes Reseller Deal with Atos; Supplants SGI

August 22, 2017

Dell EMC and Atos announced a reseller deal today in which Dell will offer Atos’ high-end 8- and 16-socket Bullion servers. Some move from Dell had been expected following Hewlett Packard Enterprise’s purchase of SGI Read more…

By John Russell

Glimpses of Today’s Total Solar Eclipse

August 21, 2017

Here are a few arresting images posted by NASA of today’s total solar eclipse. Such astronomical events have always captured our imagination and it’s not hard to understand why such occurrences were often greeted wit Read more…

By John Russell

Tech Giants Outline Battle Plans for Future HPC Market

August 21, 2017

Four companies engaged in a cage fight for leadership in the emerging HPC market of the 2020s are, despite deep differences in some areas, in violent agreement on at least one thing: the power consumption and latency pen Read more…

By Doug Black

HPE Extreme Performance Solutions

Leveraging Deep Learning for Fraud Detection

Advancements in computing technologies and the expanding use of e-commerce platforms have dramatically increased the risk of fraud for financial services companies and their customers. Read more…

Geospatial Data Research Leverages GPUs

August 17, 2017

MapD Technologies, the GPU-accelerated database specialist, said it is working with university researchers on leveraging graphics processors to advance geospatial analytics. The San Francisco-based company is collabor Read more…

By George Leopold

Tech Giants Outline Battle Plans for Future HPC Market

August 21, 2017

Four companies engaged in a cage fight for leadership in the emerging HPC market of the 2020s are, despite deep differences in some areas, in violent agreement Read more…

By Doug Black

Microsoft Bolsters Azure With Cloud HPC Deal

August 15, 2017

Microsoft has acquired cloud computing software vendor Cycle Computing in a move designed to bring orchestration tools along with high-end computing access capabilities to the cloud. Terms of the acquisition were not disclosed. Read more…

By George Leopold

HPE Ships Supercomputer to Space Station, Final Destination Mars

August 14, 2017

With a manned mission to Mars on the horizon, the demand for space-based supercomputing is at hand. Today HPE and NASA sent the first off-the-shelf HPC system i Read more…

By Tiffany Trader

AMD EPYC Video Takes Aim at Intel’s Broadwell

August 14, 2017

Let the benchmarking begin. Last week, AMD posted a YouTube video in which one of its EPYC-based systems outperformed a ‘comparable’ Intel Broadwell-based s Read more…

By John Russell

Deep Learning Thrives in Cancer Moonshot

August 8, 2017

The U.S. War on Cancer, certainly a worthy cause, is a collection of programs stretching back more than 40 years and abiding under many banners. The latest is t Read more…

By John Russell

IBM Raises the Bar for Distributed Deep Learning

August 8, 2017

IBM is announcing today an enhancement to its PowerAI software platform aimed at facilitating the practical scaling of AI models on today’s fastest GPUs. Scal Read more…

By Tiffany Trader

IBM Storage Breakthrough Paves Way for 330TB Tape Cartridges

August 3, 2017

IBM announced yesterday a new record for magnetic tape storage that it says will keep tape storage density on a Moore's law-like path far into the next decade. Read more…

By Tiffany Trader

AMD Stuffs a Petaflops of Machine Intelligence into 20-Node Rack

August 1, 2017

With its Radeon “Vega” Instinct datacenter GPUs and EPYC “Naples” server chips entering the market this summer, AMD has positioned itself for a two-head Read more…

By Tiffany Trader

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Leading Solution Providers

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This