Intel Releases Sandy Bridge Server CPUs Into the Wild

By Michael Feldman

March 7, 2012

Intel officially launched its new Xeon E5-2600 processor family on Tuesday, months after the chips had been deployed in supercomputers at several major HPC sites around the world. The new CPU represents the company’s latest Xeon offering for dual-socket servers, and boasts a number of new features including better performance, a new floating point instruction set in AVX, and integrated I/O. The processor will be a formidable competitor in the server chip battle with AMD.

Intel is touting 80 percent better performance for the E5-2600 CPUs (aka Sandy Bridge-EP) compared to the older Xeon 5600 (Westmere-EP) parts, and is promising better energy efficiency as well. In fact, according to Diane Bryant, the new vice president, general manager of Intel’s, Datacenter and Connected Systems Group, the E5-2600 family is tops in squeezing ops from watts. “We continue to deliver the best performance per watt,” she told a crowd of press and analysts at the E5 launch on Tuesday.

AMD might take issue with that, not to mention NVIDIA, Fujitsu, Tilera, and IBM, who also offer energy-sipping chips for the server space. For delivering raw flops, IBM’s Blue Gene/Q ASIC, is probably the most energy-efficient chip on the planet right now. That aside, in the x86 server universe, the new Xeon will be hard to beat.

The E5-2600 represents a microarchitecture refresh for the Xeon line, replacing the Nehalem-architected chips with the new Sandy Bridge design — a “tock” in Intel’s tick-tock vernacular. Maximum core count has been increased to 8, with 2-, 4-, and 6-core flavors offered as well. The fastest clock is achieved by the quad-core E5-2643, which runs at 3.3 GHz. That’s actually a retreat from the older Xeon 5600 CPUs, which topped out at 3.6 GHz, but thanks to the Turbo Boost technology, maximum clock frequencies are pretty much on par.

The memory subsystem was likewise enhanced. To boost bandwidth, Intel added a 4th memory channel and support for faster memory modules (1600 MHz). The design also allows for up to 12 DIMMs per socket, and since 32GB DIMM support has been added, a dual-socket server could be outfitted with as much as 768 GB. The older Westmere dual-socket servers topped out at 288 GB.

Of course, with modern microprocessors, the goal is to keep as much data in cache as possible to avoid CPU stalls when accessing main memory. With that in mind, Intel increased cache capacity on both an absolute and per-core basis.

The new 8-core E5-2600 parts are outfitted with 20 MB of last level cache versus 12 MB on the 6-core 5600 Xeons. In general, Intel used a cache/core ratio of 2.5:1 for the E5-2600 design: the 6-core, 4-core, and 2-core CPUs come with 15 (or 12), 10, and 5 MB of cache, respectively. That doesn’t necessarily mean the new Xeons are more cache-rich in every case. You can still buy some quad-core Xeon 5600 products that sports 12 MB of cache, which works out to 3 MB per core.

With regard to I/O, Intel did some consolidation here, bringing what used to be discrete chips onto the processor. For example, the new Xeon integrates 40 lanes of PCIe 3.0 onto the die. Not only does 3.0 double the bandwidth of PCIe 2.0, but since Intel incorporated the functionality on-chip, device-to-processor communication latency will be much reduced.

The E5-2600 also puts the I/O hub onto the CPU, which now includes something called “Data Direct I/O,” a capability that allows Ethernet and InfiniBand adapters to route traffic directly to the cache, bypassing the trip to main memory. According to Intel, this setup reduces I/O latency by as much as 30 percent, while also lowering the power draw.

To boost floating point (FP) performance, Intel came up with AVX (Advanced Vector Extensions), a 256-bit instruction set that effectively doubles FP throughput. This will be especially useful for HPC codes like scientific simulations and financial analytics, but also for applications in image, audio, and video processing for pattern recognition and signal processing.

Legacy codes won’t automatically realize AVX performance gains out of the box, though. At the very least, source code will have to be recompiled, hopefully with a compiler capable of auto-vectorization that can deal with the double-wide vectors. In some cases though, the code itself will need to be modified to squeeze the most performance from AVX.

The goal behind all these hardware enhancements — more cores, memory, and cache, AVX, and integrated I/O — is to deliver a much faster chip. As mentioned before, Intel is saying the E5-2600 delivers 80 percent better performance than the older Xeons. However, that metric is based on the SPECfp_rate_base2006 floating point benchmark, so obviously your mileage will vary.

DreamWorks Animation, for example, has seen a 35 percent speed boost for their rendering application compared to the older Xeon technology — that according to Derek Chan, who heads DreamWorks’s digital operations. The new E5-2600 servers are being used to develop DreamWorks’ latest feature film, Madagascar 3, which Chan said will take over 60 million CPU-hours to render. For DreamWorks, faster rendering not only saves time and money, but also give the artists more creative headroom.

Codes that are more FP-intensive, like LS-DYNA, (a software package that encompasses structural and fluid analysis simulation for manufacturing, automobile/aerospace, biotech, and scientific research) should do even better. The benchmarking crew at AnandTech ran two LS-DYNA codes with some of the E5-2600 chips and reported that the new Xeons were the top performers in the x86 field.

According to AnandTech, a Xeon E5-2690 was about twice as fast as the older Xeon 5650 on the both LS-DYNA benchmarks and was about 50 percent faster than AMD’s new Opteron 6276 (“Interlagos”) CPU. Note that against the AMD chip, the new Intel offering seemed to benefit mostly from its faster clock (2.9 GHz for the Xeon versus 2.3 GHz for the Opteron), but even the slightly slower E5-2660 chip, at 2.2 GHz, edged out the faster clocked Opteron 6276. AMD is will get another shot at Intel this year with “Abu Dhabi,” the company’s next-generation Opteron, which it plans to launch in the second half of 2012.

In the meantime, Intel will continue to dominate the x86 server space. According to Bryant, the E5-2600 already has 400 design wins, with these spread across servers, storage, and network boxes. In the HPC server space, all the usual suspects have bought into the new Xeons, including IBM, HP, Dell, SGI, Bull, Appro, Fujitsu, Supermicro, NEC, Inspur, Lenovo, Acer, ASUS, and AMAX.

HP, Appro and Bull have already shipped a total of ten TOP500-class supercomputers last year based on the E5-2600 parts, before the CPUs even had their official name. These new machines include SDSC’s new Gordon supercomputer, the Helios machine deployed at Japan’s International Fusion Energy Research Center, and a very large Amazon EC2 cluster. The largest is the “Zin” system at Lawrence Livermore National Lab, which is equipped with 5,776 of the new chips and is just shy of 1 peak petaflop*.

Pricing on the chips ranges from $294 for a couple of the quad-core parts, all the way up to $2,057 for the top-of-the line E5-2690, an 8-core, 135W CPU clocked at 2.9 GHz. None of the supercomputers mentioned above used the E5-2690, by the way; all were outfitted with 2.6 GHz or 2.7 GHz 8-core parts, which are $300-500 less expensive and run 5 to 20 watts cooler. At this point, those Xeons probably represent the price-performance and performance/watt sweet spots for HPC.

*Update: There are actually two petascale systems outfitted with the Xeon E5-2600 processors now. Helios, which is in production at the International Fusion Energy Research Centre (IFERC) in Japan, is now fully operational and is equipped with 8,820 of the CPUs; and the Curie supercomputer at GENCI in France, contains 10,080 of the Sandy Bridge processors.

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