ARM Gets Behind Accelerator Programming Project

By Michael Feldman

May 29, 2012

ARM Holdings, along with seven other academic and industrial partners, is ramping up a European research project designed to bring accelerator programming to mainstream developers. Known as CARP (Correct and Efficient Accelerator Programming), the effort is focused on developing hardware-independent programming tools around OpenCL, the industry standard parallel computing environment for GPUs and other accelerators.

CARP is aimed primarily at mobile and embedded applications, but given the program’s emphasis on power efficiency, performance, and hardware independence, the work should have some cross-over into high performance computing, especially in areas like medical imaging and other types of scientific visualization.

Funded by the European Commission (EC), which kicked in $3.5 million, CARP is already up and running. Although the effort is designed to expire in three years, the hope is that the software and tools developed under the project will get some industry traction and be adopted more generally, or at least in Europe. One way to do that was to bring in commercial partners, who could potentially garner wider support. In ARM Holdings, they certainly have that partner.

Although ARM is most widely known for its CPU portfolio, it also develops GPU designs, the Mali family of graphics engines, which it wants to pair up with its Cortex CPUs. Since mobile and embedded platforms are extremely sensitive to power usage, the energy-efficient GPUs is increasingly the architecture of choice for a variety of visual computing and data streaming applications. In some cases, the GPU is a separate chip on the board, but in the mobile space especially, the graphics engine is now sharing silicon with the CPU on the same die.

That makes for a somewhat more natural programming model compared to having to deal with discrete processors for the host and accelerator. But ARM, and the mobile/embedded ecosystem in general, have the same problem with GPUs as everyone else, namely a developer community that is loathe to program in the low-level industry standard for accelerators: OpenCL. The CARP approach is to map domain specific languages (DSL) to OpenCL, using a translation layer, called portable intermediate language or PIL. The PIL compiler is the secret sauce here since it glues the high-level, programmer-friendly DSLs to the low-level OpenCL API. It also encompasses performance and power optimizations.

Once the OpenCL code is generated, the application should be able to run on any GPU or accelerator with the appropriate driver and compiler support. Since AMD, NVIDIA, and ARM all support OpenCL, that toolchain will encompass nearly every accelerator-equipped platform on the planet.

Along with ARM, CARP brings in three commercial European software firms (Realeyes, Monoidics, and Rightware), and four research partners (Imperial College London, INRIA, RWTH Aachen University, and the University of Twente).

As a first cut, the CARP technology will be demonstrated on the real-time eye-tracking algorithms of Realeyes, whose purpose is to discern peoples’ emotions by reading their faces. (Realeyes fancies itself the “Google Analytics of eye movements and emotions.”) While that may seem like an esoteric application, apparently there is an 800M€ market for such software. The goal here is to be able to use the CARP language tools to compute these algorithms in real-time across a variety of GPU-equipped platforms, including mobile devices.

ARM and Monoidics, which provides tools for formal verification, memory safety analysis, and security of software, will also be able to incorporate the resulting CARP technology into their own software development stacks. However, since the EC is funding this, the idea is for at least some of the tools to be made publicly available for other vendors and organizations.

Because of the mobile/embedded focus, energy efficient computing is a top priority for the compiler technology, as is runtime performance. And since this is not just an academic exercise, the resulting toolchain must also support portability, programmer productivity, and software correctness. In fact, the project has set some high goals for itself, including:

  • Order-of-magnitude improvement in productivity of accelerator software development
  • Performance of compiled code competitive with that of hand-optimized code, on multiple accelerator platforms
  • Lower energy consumption by accelerated software, leading to greener systems, improved battery life in mobile devices, and wider availability on economical platforms

Whether CARP yields an accelerator technology acceptable to the industry or just becomes another brick in the Tower of Babel remains to be seen. It bodes well that ARM is involved since it embodies a large slice of the of the mobile/embedded computing ecosystem. The EC rules probably prevented it, but it would have been even better to sign up AMD, NVIDIA, and even Intel to the project, inasmuch as any widespread industry buy-in will eventually need all three. In the meantime, it will be interesting to see what Europe’s $3.5 million investment buys.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

AMD Charges Back into the Datacenter and HPC Workflows with EPYC Processor

June 20, 2017

AMD is charging back into the enterprise datacenter and select HPC workflows with its new EPYC 7000 processor line, code-named Naples, announced today at a “global” launch event in Austin TX. In many ways it was a fu Read more…

By John Russell

Hyperion: Deep Learning, AI Helping Drive Healthy HPC Industry Growth

June 20, 2017

To be at the ISC conference in Frankfurt this week is to experience deep immersion in deep learning. Users want to learn about it, vendors want to talk about it, analysts and journalists want to report on it. Deep learni Read more…

By Doug Black

OpenACC Shows Growing Strength at ISC

June 19, 2017

OpenACC is strutting its stuff at ISC this year touting expanding membership, a jump in downloads, favorable benchmarks across several architectures, new staff members, and new support by key HPC applications providers, Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major shakeups -- China still has the top two spots locked with th Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Creating a Roadmap for HPC Innovation at ISC 2017

In an era where technological advancements are driving innovation to every sector, and powering major economic and scientific breakthroughs, high performance computing (HPC) is crucial to tackle the challenges of today and tomorrow. Read more…

ISC: Extreme-Scale Requirements to Push the Frontiers of Deep Learning

June 17, 2017

Deep learning is the latest and most compelling technology strategy to take aim at the decades-old “drowning in data/starving for insight” problem. But contrary to the commonly held notion, deep learning is more than Read more…

By Doug Black

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD, Cray, Hewlett Packard Enterprise (HPE), IBM, Intel, and NV Read more…

By John Russell

OpenSuCo: Advancing Open Source Supercomputing at ISC

June 15, 2017

As open source hardware gains traction, the potential for a completely open source supercomputing system becomes a compelling proposition, one that is being investigated by the International Workshop on Open Source Super Read more…

By Tiffany Trader

Mellanox Raises SHIELD for Enhanced Network Resiliency

June 15, 2017

High-performance networking company Mellanox is announcing a new protocol it’s calling SHIELD, an acronym for “Self Healing Interconnect Enhancement for inteLligent Datacenters.” Enabled within Mellanox’s 100G ED Read more…

By Tiffany Trader

AMD Charges Back into the Datacenter and HPC Workflows with EPYC Processor

June 20, 2017

AMD is charging back into the enterprise datacenter and select HPC workflows with its new EPYC 7000 processor line, code-named Naples, announced today at a “g Read more…

By John Russell

Hyperion: Deep Learning, AI Helping Drive Healthy HPC Industry Growth

June 20, 2017

To be at the ISC conference in Frankfurt this week is to experience deep immersion in deep learning. Users want to learn about it, vendors want to talk about it Read more…

By Doug Black

OpenACC Shows Growing Strength at ISC

June 19, 2017

OpenACC is strutting its stuff at ISC this year touting expanding membership, a jump in downloads, favorable benchmarks across several architectures, new staff Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

ISC: Extreme-Scale Requirements to Push the Frontiers of Deep Learning

June 17, 2017

Deep learning is the latest and most compelling technology strategy to take aim at the decades-old “drowning in data/starving for insight” problem. But cont Read more…

By Doug Black

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

OpenSuCo: Advancing Open Source Supercomputing at ISC

June 15, 2017

As open source hardware gains traction, the potential for a completely open source supercomputing system becomes a compelling proposition, one that is being inv Read more…

By Tiffany Trader

Mellanox Raises SHIELD for Enhanced Network Resiliency

June 15, 2017

High-performance networking company Mellanox is announcing a new protocol it’s calling SHIELD, an acronym for “Self Healing Interconnect Enhancement for int Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of “quantum supremacy,” researchers are stretching the limits of today’s most advanced supercomputers. Read more…

By Tiffany Trader

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

Knights Landing Processor with Omni-Path Makes Cloud Debut

April 18, 2017

HPC cloud specialist Rescale is partnering with Intel and HPC resource provider R Systems to offer first-ever cloud access to Xeon Phi "Knights Landing" processors. The infrastructure is based on the 68-core Intel Knights Landing processor with integrated Omni-Path fabric (the 7250F Xeon Phi). Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This