Intel Will Ship Knights Corner Chip in 2012

By Michael Feldman

June 18, 2012

Intel’s first Many Integrated Core (MIC) microprocessor is now just months away from its commercial debut. On Monday at the International Supercomputing Conference (ISC’12) in Hamburg, Intel announced that Knights Corner, the company’s first manycore product, would be in production before the end of 2012. The company also released a few more details about the upcoming product line, including the creation of a new Xeon brand for the architecture, some performance updates on pre-production silicon, and Cray’s adoption of MIC as part of its future Cascade supercomputer.

This was not a Knights Corner launch, however. With the plans now set for the chip to go into production before the end of the year, more than likely that means Intel will debut the product, in all its manycore glory, at SC12 in November. NVIDIA’s big Kepler GPU, the K20, is also expected to launch around this time, setting the stage for an MIC-GPU shootout in Q4.

This fall, TACC is slated to get a boatload of the first MIC coprocessors — 8 petaflops worth — as part of the center’s 10-petaflop Stampede supercomputer, which will be built by Dell. Other Knights Corner systems are also in the works for a handful of large HPC centers, including Jülich Supercomputing Centre, the University of Tokyo, Leibniz Supercomputing Centre (LRZ), Oak Ridge National Laboratory, the Korea Institute of Science and Technology Information (KISTI) and CERN. Depending upon the actual installation schedules and availability of the MIC parts, some or all of these systems may be up and running by November, in time perhaps to log Linpack runs.

But we won’t have to wait for November to hear about Linpack running on MIC machines. According to Intel’s Rajeeb Hazra, Intel’s GM of the Technical Computing group, they’ve been running the High Performance Linpack (HPL) benchmark on pre-production parts and have been able to achieve one teraflop on a single node equipped with a Knights Corner chip. That teraflop, by the way, is provided by the Knights Corner card plus the two Xeon E5 host CPUs, so the MIC chip itself is likely delivering something in the neighborhood of 700 to 800 gigaflops.

Intel has also put together a Xeon E5-MIC experimental cluster with pre-production Knights Corner parts that delivers 118.60 Linpack teraflops. That’s enough to place it at number 150 on the new TOP500 list released earlier today.

The peak performance for the Intel MIC cluster is 180.99, which means the Linpack yield is only 65 percent. Even though that’s pretty anemic compared to a CPU-only cluster, which typically hit 75 to 95 percent of peak, compared to the 50 percent or so yield on the current crop of GPU-accelerated clusters, MIC’s Linpack extraction looks to be significantly better. NVIDIA’s latest Kepler GPU and GPUDirect technology may help to close that gap, but we’ll have to wait and see on that.

Since Intel is not doing the Knights Corner launch at this point, they’re not releasing much more information about the upcoming product here at ISC. All the previous specs — 50-plus cores on 22nm process technology — are still in effect.

Intel, however, did talk about the on-board memory for the first time, saying that the Knights Corner PCIe cards will include at least 8 GB of GDDR5 memory (which, by the way, may have contributed to the better Linpack yield). The current Fermi-based Tesla modules from NVIDIA top out at 6GB of GDDR5, but the upcoming K20 module is likely to get more than that. Intel is still mum about ECC support for Knights Corner’s on-board memory, but as we’ve said before, such support seems like a foregone conclusion.

On the marketing front, the product line is getting a rebrand makeover. The architecture will still be called MIC, but the official product family will now be known as Xeon Phi. The idea here was to leverage the well-established Xeon brand, which defines the leading edge of Intel’s x86 line-up. At the same time, it drives home the point that MIC is an x86-based architecture, rather than some exotic design that Intel cooked up only for bleeding-edge techies.

Although the MIC instruction set, which Intel made public last week, does not match that of the latest Xeon CPUs, bit for bit (mainly diverging in the vector instruction area), the company is quick to point out that its C and Fortran compilers, libraries and other development tools will support the new architecture seamlessly. Plus, we’re reminded, developers are free to program them with the HPC standard parallel frameworks, namely MPI and OpenMP, as well as Intel’s own frameworks like TBB and Cilk Plus. Basically, if an app runs on a Xeon, it should run on a Xeon Phi.

In fact, Hazra made a point of talking up the ability of the Phi chips to run entire applications, rather than just accelerated kernels as is the case for GPUs and FPGAs. According to him, you will be able to run complete apps on the coprocessors, which can be treated as a virtual network node. That belies MIC’s natural role as a coprocessor, but opens up some unique ways to use the chip, as well as helping ease application porting and development.

Intel has to a careful here. Many, if not most, HPC applications are likely to run slower if they are entirely confined to a MIC coprocessor, in part because single-threaded performance on MIC will be inferior to that of a Xeon CPU. Plus, even at 8 GB, local memory capacity on the Phi card is just a fraction what a CPU can access.

And Intel still promotes its beloved Xeon CPUs as the center of the high performance computing universe, with Hazra referring to them as “the foundation of HPC” for general-purpose technical computing workloads. The Xeon Phi chips, he says, are suited for those applications that are highly parallel in nature. But the latter and former have a huge overlap, so talk of using the coprocessor as a CPU seems to send somewhat of a mixed message to HPC’ers.

In any case, OEMs are jumping on the MIC bandwagon. Most of the HPC system vendors in the x86 clusters business today will be offering Xeon Phi-equipped systems, presumably as soon as the first Knights Corner chips start rolling out, or soon thereafter. All the major server makers have signed up, including IBM, HP, Dell, Bull, SGI, and Fujitsu, as well as smaller HPC outfits like Appro, T-Platforms, and Penguin Computing.

Cray too, will be introducing MIC supercomputing in their “Cascade” product line in 2013, a system that will glue Xeon CPUs to Phi coprocessors. Cascade is the result of the DARPA HPCS program, whose goal was to produce productive architectures for multi-petaflop computing. The addition of the MIC chips to Cascade should come as no surprise, given that the system was designed to be based on Intel parts from the get-go.

“This is the next big step in our adaptive supercomputing vision,” said Cray CEO Peter Ungaro. According to him, they’ve already begun taking orders for such Phi-accelerated systems, including one from HLRS at the University of Stuttgart in Germany and another from Kyoto University in Japan.

Although the Xeon Phi product will be initially aimed at traditional HPC science codes, Intel believes that other applications that require high levels of parallelism, especially data parallelism, would also be good candidates. Big data analytics, in particular, appears to be an area ripe for these manycore processors with lots of memory bandwidth, and both the Xeon Phi and NVIDIA GPUs are likely to be jockeying for a chunk of this market.

The idea of using the MIC platform as the basis for big data machines has piqued Cray’s interest too. “We actually see Phi as a very viable candidate even within that [big data] environment,” said Ungaro. uRiKA, Cray’s big data appliance, which it offers under its YarcData division, is currently based on the company’s own custom Threadstorm processor.

Being able to sell these manycore chips into multiple markets beyond HPC would certainly be appealing to Intel and is likely to affect the Xeon Phi roadmap going forward. In the meantime, users will have to wait for Knights Corner launch, which finally appears to be just around the corner.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Arm Targets HPC with New Neoverse Platforms

September 22, 2020

UK-based semiconductor design company Arm today teased details of its Neoverse roadmap, introducing V1 (codenamed Zeus) and N2 (codenamed Perseus), Arm’s second generation N-series platform. The chip IP vendor said the Read more…

By Tiffany Trader

Microsoft’s Azure Quantum Platform Now Offers Toshiba’s ‘Simulated Bifurcation Machine’

September 22, 2020

While pure-play quantum computing (QC) gets most of the QC-related attention, there’s also been steady progress adapting quantum methods for select use on classical computers. Today, Microsoft announced that Toshiba’ Read more…

By John Russell

Oracle Cloud Deepens HPC Embrace with Launch of A100 Instances, Plans for Arm, More 

September 22, 2020

Oracle Cloud Infrastructure (OCI) continued its steady ramp-up of HPC capabilities today with a flurry of announcements. Topping the list is general availability of instances with Nvidia’s newest GPU, the A100. OCI als Read more…

By John Russell

IBM, CQC Enable Cloud-based Quantum Random Number Generation

September 21, 2020

IBM and Cambridge Quantum Computing (CQC) have partnered to achieve progress on one of the major business aspirations for quantum computing – the goal of generating verified, truly random numbers that can be used for a Read more…

By Todd R. Weiss

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at current count) across the European Union and supplanting HPC Read more…

By Oliver Peckham

AWS Solution Channel

Next-generation aerospace modeling and simulation: benchmarking Amazon Web Services High Performance Computing services

The aerospace industry has been using Computational Fluid Dynamics (CFD) for decades to create and optimize designs digitally, from the largest passenger planes and fighter jets to gliders and drones. Read more…

Intel® HPC + AI Pavilion

Berlin Institute of Health: Putting HPC to Work for the World

Researchers from the Center for Digital Health at the Berlin Institute of Health (BIH) are using science to understand the pathophysiology of COVID-19, which can help to inform the development of targeted treatments. Read more…

Google Hires Longtime Intel Exec Bill Magro to Lead HPC Strategy

September 18, 2020

In a sign of the times, another prominent HPCer has made a move to a hyperscaler. Longtime Intel executive Bill Magro joined Google as chief technologist for high-performance computing, a newly created position that is a Read more…

By Tiffany Trader

Arm Targets HPC with New Neoverse Platforms

September 22, 2020

UK-based semiconductor design company Arm today teased details of its Neoverse roadmap, introducing V1 (codenamed Zeus) and N2 (codenamed Perseus), Arm’s seco Read more…

By Tiffany Trader

Oracle Cloud Deepens HPC Embrace with Launch of A100 Instances, Plans for Arm, More 

September 22, 2020

Oracle Cloud Infrastructure (OCI) continued its steady ramp-up of HPC capabilities today with a flurry of announcements. Topping the list is general availabilit Read more…

By John Russell

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at c Read more…

By Oliver Peckham

Google Hires Longtime Intel Exec Bill Magro to Lead HPC Strategy

September 18, 2020

In a sign of the times, another prominent HPCer has made a move to a hyperscaler. Longtime Intel executive Bill Magro joined Google as chief technologist for hi Read more…

By Tiffany Trader

Future of Fintech on Display at HPC + AI Wall Street

September 17, 2020

Those who tuned in for Tuesday's HPC + AI Wall Street event got a peak at the future of fintech and lively discussion of topics like blockchain, AI for risk man Read more…

By Alex Woodie, Tiffany Trader and Todd R. Weiss

IBM’s Quantum Race to One Million Qubits

September 15, 2020

IBM today outlined its ambitious quantum computing technology roadmap at its virtual Quantum Summit. The eye-popping million qubit number is still far out, agrees IBM, but perhaps not that far out. Just as eye-popping is IBM’s nearer-term plan for a 1,000-plus qubit system named Condor... Read more…

By John Russell

Nvidia Commits to Buy Arm for $40B

September 14, 2020

Nvidia is acquiring semiconductor design company Arm Ltd. for $40 billion from SoftBank in a blockbuster deal that catapults the GPU chipmaker to a dominant position in the datacenter while helping troubled SoftBank reverse its financial woes. The deal, which has been rumored for... Read more…

By Todd R. Weiss and George Leopold

AMD’s Massive COVID-19 HPC Fund Adds 18 Institutions, 5 Petaflops of Power

September 14, 2020

Almost exactly five months ago, AMD announced its COVID-19 HPC Fund, an ongoing flow of resources and equipment to research institutions studying COVID-19 that began with an initial donation of $15 million. In June, AMD announced major equipment donations to several major institutions. Now, AMD is making its third major COVID-19 HPC Fund... Read more…

By Oliver Peckham

Supercomputer-Powered Research Uncovers Signs of ‘Bradykinin Storm’ That May Explain COVID-19 Symptoms

July 28, 2020

Doctors and medical researchers have struggled to pinpoint – let alone explain – the deluge of symptoms induced by COVID-19 infections in patients, and what Read more…

By Oliver Peckham

Nvidia Said to Be Close on Arm Deal

August 3, 2020

GPU leader Nvidia Corp. is in talks to buy U.K. chip designer Arm from parent company Softbank, according to several reports over the weekend. If consummated Read more…

By George Leopold

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

By Doug Black

Intel’s 7nm Slip Raises Questions About Ponte Vecchio GPU, Aurora Supercomputer

July 30, 2020

During its second-quarter earnings call, Intel announced a one-year delay of its 7nm process technology, which it says it will create an approximate six-month shift for its CPU product timing relative to prior expectations. The primary issue is a defect mode in the 7nm process that resulted in yield degradation... Read more…

By Tiffany Trader

HPE Keeps Cray Brand Promise, Reveals HPE Cray Supercomputing Line

August 4, 2020

The HPC community, ever-affectionate toward Cray and its eponymous founder, can breathe a (virtual) sigh of relief. The Cray brand will live on, encompassing th Read more…

By Tiffany Trader

Google Hires Longtime Intel Exec Bill Magro to Lead HPC Strategy

September 18, 2020

In a sign of the times, another prominent HPCer has made a move to a hyperscaler. Longtime Intel executive Bill Magro joined Google as chief technologist for hi Read more…

By Tiffany Trader

Neocortex Will Be First-of-Its-Kind 800,000-Core AI Supercomputer

June 9, 2020

Pittsburgh Supercomputing Center (PSC - a joint research organization of Carnegie Mellon University and the University of Pittsburgh) has won a $5 million award Read more…

By Tiffany Trader

Supercomputer Modeling Tests How COVID-19 Spreads in Grocery Stores

April 8, 2020

In the COVID-19 era, many people are treating simple activities like getting gas or groceries with caution as they try to heed social distancing mandates and protect their own health. Still, significant uncertainty surrounds the relative risk of different activities, and conflicting information is prevalent. A team of Finnish researchers set out to address some of these uncertainties by... Read more…

By Oliver Peckham

Leading Solution Providers

Contributors

Australian Researchers Break All-Time Internet Speed Record

May 26, 2020

If you’ve been stuck at home for the last few months, you’ve probably become more attuned to the quality (or lack thereof) of your internet connection. Even Read more…

By Oliver Peckham

Oracle Cloud Infrastructure Powers Fugaku’s Storage, Scores IO500 Win

August 28, 2020

In June, RIKEN shook the supercomputing world with its Arm-based, Fujitsu-built juggernaut: Fugaku. The system, which weighs in at 415.5 Linpack petaflops, topp Read more…

By Oliver Peckham

European Commission Declares €8 Billion Investment in Supercomputing

September 18, 2020

Just under two years ago, the European Commission formalized the EuroHPC Joint Undertaking (JU): a concerted HPC effort (comprising 32 participating states at c Read more…

By Oliver Peckham

Google Cloud Debuts 16-GPU Ampere A100 Instances

July 7, 2020

On the heels of the Nvidia’s Ampere A100 GPU launch in May, Google Cloud is announcing alpha availability of the A100 “Accelerator Optimized” VM A2 instance family on Google Compute Engine. The instances are powered by the HGX A100 16-GPU platform, which combines two HGX A100 8-GPU baseboards using... Read more…

By Tiffany Trader

DOD Orders Two AI-Focused Supercomputers from Liqid

August 24, 2020

The U.S. Department of Defense is making a big investment in data analytics and AI computing with the procurement of two HPC systems that will provide the High Read more…

By Tiffany Trader

Microsoft Azure Adds A100 GPU Instances for ‘Supercomputer-Class AI’ in the Cloud

August 19, 2020

Microsoft Azure continues to infuse its cloud platform with HPC- and AI-directed technologies. Today the cloud services purveyor announced a new virtual machine Read more…

By Tiffany Trader

Japan’s Fugaku Tops Global Supercomputing Rankings

June 22, 2020

A new Top500 champ was unveiled today. Supercomputer Fugaku, the pride of Japan and the namesake of Mount Fuji, vaulted to the top of the 55th edition of the To Read more…

By Tiffany Trader

Joliot-Curie Supercomputer Used to Build First Full, High-Fidelity Aircraft Engine Simulation

July 14, 2020

When industrial designers plan the design of a new element of a vehicle’s propulsion or exterior, they typically use fluid dynamics to optimize airflow and in Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This