Intel Will Ship Knights Corner Chip in 2012

By Michael Feldman

June 18, 2012

Intel’s first Many Integrated Core (MIC) microprocessor is now just months away from its commercial debut. On Monday at the International Supercomputing Conference (ISC’12) in Hamburg, Intel announced that Knights Corner, the company’s first manycore product, would be in production before the end of 2012. The company also released a few more details about the upcoming product line, including the creation of a new Xeon brand for the architecture, some performance updates on pre-production silicon, and Cray’s adoption of MIC as part of its future Cascade supercomputer.

This was not a Knights Corner launch, however. With the plans now set for the chip to go into production before the end of the year, more than likely that means Intel will debut the product, in all its manycore glory, at SC12 in November. NVIDIA’s big Kepler GPU, the K20, is also expected to launch around this time, setting the stage for an MIC-GPU shootout in Q4.

This fall, TACC is slated to get a boatload of the first MIC coprocessors — 8 petaflops worth — as part of the center’s 10-petaflop Stampede supercomputer, which will be built by Dell. Other Knights Corner systems are also in the works for a handful of large HPC centers, including Jülich Supercomputing Centre, the University of Tokyo, Leibniz Supercomputing Centre (LRZ), Oak Ridge National Laboratory, the Korea Institute of Science and Technology Information (KISTI) and CERN. Depending upon the actual installation schedules and availability of the MIC parts, some or all of these systems may be up and running by November, in time perhaps to log Linpack runs.

But we won’t have to wait for November to hear about Linpack running on MIC machines. According to Intel’s Rajeeb Hazra, Intel’s GM of the Technical Computing group, they’ve been running the High Performance Linpack (HPL) benchmark on pre-production parts and have been able to achieve one teraflop on a single node equipped with a Knights Corner chip. That teraflop, by the way, is provided by the Knights Corner card plus the two Xeon E5 host CPUs, so the MIC chip itself is likely delivering something in the neighborhood of 700 to 800 gigaflops.

Intel has also put together a Xeon E5-MIC experimental cluster with pre-production Knights Corner parts that delivers 118.60 Linpack teraflops. That’s enough to place it at number 150 on the new TOP500 list released earlier today.

The peak performance for the Intel MIC cluster is 180.99, which means the Linpack yield is only 65 percent. Even though that’s pretty anemic compared to a CPU-only cluster, which typically hit 75 to 95 percent of peak, compared to the 50 percent or so yield on the current crop of GPU-accelerated clusters, MIC’s Linpack extraction looks to be significantly better. NVIDIA’s latest Kepler GPU and GPUDirect technology may help to close that gap, but we’ll have to wait and see on that.

Since Intel is not doing the Knights Corner launch at this point, they’re not releasing much more information about the upcoming product here at ISC. All the previous specs — 50-plus cores on 22nm process technology — are still in effect.

Intel, however, did talk about the on-board memory for the first time, saying that the Knights Corner PCIe cards will include at least 8 GB of GDDR5 memory (which, by the way, may have contributed to the better Linpack yield). The current Fermi-based Tesla modules from NVIDIA top out at 6GB of GDDR5, but the upcoming K20 module is likely to get more than that. Intel is still mum about ECC support for Knights Corner’s on-board memory, but as we’ve said before, such support seems like a foregone conclusion.

On the marketing front, the product line is getting a rebrand makeover. The architecture will still be called MIC, but the official product family will now be known as Xeon Phi. The idea here was to leverage the well-established Xeon brand, which defines the leading edge of Intel’s x86 line-up. At the same time, it drives home the point that MIC is an x86-based architecture, rather than some exotic design that Intel cooked up only for bleeding-edge techies.

Although the MIC instruction set, which Intel made public last week, does not match that of the latest Xeon CPUs, bit for bit (mainly diverging in the vector instruction area), the company is quick to point out that its C and Fortran compilers, libraries and other development tools will support the new architecture seamlessly. Plus, we’re reminded, developers are free to program them with the HPC standard parallel frameworks, namely MPI and OpenMP, as well as Intel’s own frameworks like TBB and Cilk Plus. Basically, if an app runs on a Xeon, it should run on a Xeon Phi.

In fact, Hazra made a point of talking up the ability of the Phi chips to run entire applications, rather than just accelerated kernels as is the case for GPUs and FPGAs. According to him, you will be able to run complete apps on the coprocessors, which can be treated as a virtual network node. That belies MIC’s natural role as a coprocessor, but opens up some unique ways to use the chip, as well as helping ease application porting and development.

Intel has to a careful here. Many, if not most, HPC applications are likely to run slower if they are entirely confined to a MIC coprocessor, in part because single-threaded performance on MIC will be inferior to that of a Xeon CPU. Plus, even at 8 GB, local memory capacity on the Phi card is just a fraction what a CPU can access.

And Intel still promotes its beloved Xeon CPUs as the center of the high performance computing universe, with Hazra referring to them as “the foundation of HPC” for general-purpose technical computing workloads. The Xeon Phi chips, he says, are suited for those applications that are highly parallel in nature. But the latter and former have a huge overlap, so talk of using the coprocessor as a CPU seems to send somewhat of a mixed message to HPC’ers.

In any case, OEMs are jumping on the MIC bandwagon. Most of the HPC system vendors in the x86 clusters business today will be offering Xeon Phi-equipped systems, presumably as soon as the first Knights Corner chips start rolling out, or soon thereafter. All the major server makers have signed up, including IBM, HP, Dell, Bull, SGI, and Fujitsu, as well as smaller HPC outfits like Appro, T-Platforms, and Penguin Computing.

Cray too, will be introducing MIC supercomputing in their “Cascade” product line in 2013, a system that will glue Xeon CPUs to Phi coprocessors. Cascade is the result of the DARPA HPCS program, whose goal was to produce productive architectures for multi-petaflop computing. The addition of the MIC chips to Cascade should come as no surprise, given that the system was designed to be based on Intel parts from the get-go.

“This is the next big step in our adaptive supercomputing vision,” said Cray CEO Peter Ungaro. According to him, they’ve already begun taking orders for such Phi-accelerated systems, including one from HLRS at the University of Stuttgart in Germany and another from Kyoto University in Japan.

Although the Xeon Phi product will be initially aimed at traditional HPC science codes, Intel believes that other applications that require high levels of parallelism, especially data parallelism, would also be good candidates. Big data analytics, in particular, appears to be an area ripe for these manycore processors with lots of memory bandwidth, and both the Xeon Phi and NVIDIA GPUs are likely to be jockeying for a chunk of this market.

The idea of using the MIC platform as the basis for big data machines has piqued Cray’s interest too. “We actually see Phi as a very viable candidate even within that [big data] environment,” said Ungaro. uRiKA, Cray’s big data appliance, which it offers under its YarcData division, is currently based on the company’s own custom Threadstorm processor.

Being able to sell these manycore chips into multiple markets beyond HPC would certainly be appealing to Intel and is likely to affect the Xeon Phi roadmap going forward. In the meantime, users will have to wait for Knights Corner launch, which finally appears to be just around the corner.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Weekly Twitter Roundup (Feb. 23, 2017)

February 23, 2017

Here at HPCwire, we aim to keep the HPC community apprised of the most relevant and interesting news items that get tweeted throughout the week. Read more…

By Thomas Ayres

HPE Server Shows Low Latency on STAC-N1 Test

February 22, 2017

The performance of trade and match servers can be a critical differentiator for financial trading houses. Read more…

By John Russell

HPC Financial Update (Feb. 2017)

February 22, 2017

In this recurring feature, we’ll provide you with financial highlights from companies in the HPC industry. Check back in regularly for an updated list with the most pertinent fiscal information. Read more…

By Thomas Ayres

Rethinking HPC Platforms for ‘Second Gen’ Applications

February 22, 2017

Just what constitutes HPC and how best to support it is a keen topic currently. Read more…

By John Russell

HPE Extreme Performance Solutions

O&G Companies Create Value with High Performance Remote Visualization

Today’s oil and gas (O&G) companies are striving to process datasets that have become not only tremendously large, but extremely complex. And the larger that data becomes, the harder it is to move and analyze it – particularly with a workforce that could be distributed between drilling sites, offshore rigs, and remote offices. Read more…

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

ExxonMobil, NCSA, Cray Scale Reservoir Simulation to 700,000+ Processors

February 17, 2017

In a scaling breakthrough for oil and gas discovery, ExxonMobil geoscientists report they have harnessed the power of 717,000 processors – the equivalent of 22,000 32-processor computers – to run complex oil and gas reservoir simulation models. Read more…

By Doug Black

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Drug Developers Use Google Cloud HPC in the Fight Against ALS

February 16, 2017

Within the haystack of a lethal disease such as ALS (amyotrophic lateral sclerosis / Lou Gehrig’s Disease) there exists, somewhere, the needle that will pierce this therapy-resistant affliction. Read more…

By Doug Black

Azure Edges AWS in Linpack Benchmark Study

February 15, 2017

The “when will clouds be ready for HPC” question has ebbed and flowed for years. Read more…

By John Russell

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

Cray Posts Best-Ever Quarter, Visibility Still Limited

February 10, 2017

On its Wednesday earnings call, Cray announced the largest revenue quarter in the company’s history and the second-highest revenue year. Read more…

By Tiffany Trader

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

US, China Vie for Supercomputing Supremacy

November 14, 2016

The 48th edition of the TOP500 list is fresh off the presses and while there is no new number one system, as previously teased by China, there are a number of notable entrants from the US and around the world and significant trends to report on. Read more…

By Tiffany Trader

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

D-Wave SC16 Update: What’s Bo Ewald Saying These Days

November 18, 2016

Tucked in a back section of the SC16 exhibit hall, quantum computing pioneer D-Wave has been talking up its new 2000-qubit processor announced in September. Forget for a moment the criticism sometimes aimed at D-Wave. This small Canadian company has sold several machines including, for example, ones to Lockheed and NASA, and has worked with Google on mapping machine learning problems to quantum computing. In July Los Alamos National Laboratory took possession of a 1000-quibit D-Wave 2X system that LANL ordered a year ago around the time of SC15. Read more…

By John Russell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Leading Solution Providers

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

Nvidia Sees Bright Future for AI Supercomputing

November 23, 2016

Graphics chipmaker Nvidia made a strong showing at SC16 in Salt Lake City last week. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

Dell Knights Landing Machine Sets New STAC Records

November 2, 2016

The Securities Technology Analysis Center, commonly known as STAC, has released a new report characterizing the performance of the Knight Landing-based Dell PowerEdge C6320p server on the STAC-A2 benchmarking suite, widely used by the financial services industry to test and evaluate computing platforms. The Dell machine has set new records for both the baseline Greeks benchmark and the large Greeks benchmark. Read more…

By Tiffany Trader

What Knights Landing Is Not

June 18, 2016

As we get ready to launch the newest member of the Intel Xeon Phi family, code named Knights Landing, it is natural that there be some questions and potentially some confusion. Read more…

By James Reinders, Intel

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This