DOE Primes Pump for Exascale Supercomputers

By Michael Feldman

July 12, 2012

Intel, AMD, NVIDIA, and Whamcloud have been awarded tens of millions of dollars by the US Department of Energy (DOE) to kick-start research and development required to build exascale supercomputers. The work will be performed under the FastForward program, a joint effort run by the DOE Office of Science and the National Nuclear Security Administration (NNSA) that will focus on developing future hardware and software technologies capable of supporting such machines.

The program is being contracted through Lawrence Livermore National Security, LLC as part of a multi-lab consortium that includes Argonne National Laboratory, Lawrence Berkeley National Laboratory, Lawrence Livermore National Laboratory, Los Alamos National Laboratory, Oak Ridge National Laboratory, Pacific Northwest National Laboratory, and Sandia National Laboratories.

Although we’re only six to eight years away from the first exaflops systems, the DOE’s primary exascale program has yet to be funded. (And since this is an election year in the US, such funding will probably not fall into place until 2013.) In the interim, FastForward was devised in order to begin the needed R&D for some of the exascale foundational technologies, in particular, processors, memory and storage.

At least some of the impetus for the program came from the vendors themselves. According to Mark Seager, Intel’s CTO for the company’s High Performance Computing Ecosystem group, the DOE was told by multiple commercial partners that research for the component pieces needed to get underway this year if they hoped to field an exascale machine by 2020. That led to the formation of the program, and apparently there was enough loose change rolling around at the Office of Science and NNSA to fund this more modest effort.

Although all the FastForward subcontracts have yet to be made public, as of today there are four known awards:

  • Intel: $19 million for both processor and memory technologies
  • AMD: $12.6 million for processor and memory technologies
  • NVIDIA: $12 million for processor technology
  • Whamcloud (along with EMC, Cray and HDF Group): Unknown dollar amount for storage and I/O technologies

Although the work is not intended to fund the development of “near-term capabilities” that are already on vendors’ existing product roadmaps, all of this work will be based upon ongoing R&D efforts at these companies. The DOE is fine with this since the commercialization of these technologies is really the only way these government agencies can be assured of cost-effective exascale machines. The FastForward statement of work makes a point of spelling out this arrangement, thusly: “While DOE’s extreme-scale computer requirements are a driving factor, these projects must also exhibit the potential for technology adoption by broader segments of the market outside of DOE supercomputer installations.”

For example, Intel’s FastForward processor work will be based on the company’s MIC (Many Integrated Core) architecture, which the company is initially aiming at the supercomputing market, but with the intent to extend it into big data business applications and beyond. The first MIC product, under the Xeon Phi brand, is scheduled to be launched before the end of 2012, but this initial offering is at least a couple of generations away from supporting exascale-capable machines. According to Seager, a future processor of this kind will need much improved energy efficiency, a revamped memory interface, and higher resiliency.

Although the x86 ISA will be retained, this future MIC architecture will incorporate some “radical approaches” to bring the technology into the exascale realm. To begin with, says Seager, that means reducing its power draw two to three times greater than what would naturally be achieved with transistor shrinkage over the rest of the decade. “It’s a daunting challenge to do better than what Moore’s Law will give you,” Seager told HPCwire.

Fortunately, he says, Intel will be able to leverage its near-threshold voltage circuitry research, some of which was funded under UHPC (Ubiquitous High Performance Computing), DARPA’s now defunct exascale program. Shekhar Borkar, who was the PI for the UHPC work, along with Seager and former IBM’er Al Gara, will be heading up the FastForward work at Intel.

For the exascale memory subcontract, Intel will be leveraging its work with Micron Technology on the Hybrid Memory Cube. The idea is to use similar technology to incorporate 3D stacks of memory chips into the same package as the processor. In-package integration shortens the distance considerably between the processor and the memory, which significantly increases bandwidth and lowers latency. At the same time, cache management is going to be redesigned to optimize the power-performance of memory reads and writes.

Like Intel, AMD will be basing its FastForward processor research on a current design, in this case the company’s APU (Accelerated Processing Unit) product line and the related Heterogeneous Systems Architecture (HSA) standard — that according to Alan Lee, AMD’s corporate vice president for Advanced Research and Development. The current crop of APUs, which integrate CPUs and GPUs on-chip, are aimed at consumer devices, such as laptops, netbooks, and other mobile gear. But AMD has designs on extending its heterogeneous portfolio into the server arena, and the DOE just gave them about 12 million more reasons to do so.

Since AMD first needs to transform their APU into a server design, the chipmaker has a somewhat different, and perhaps longer path to exascale than Intel, which is at least starting with server-ready silicon. On the other hand the MIC architecture is not heterogenous (and may never be), so AMD does have a certain advantage there. “That is the truly unique technology and the strongest one that AMD brings to bear — that we have a world-class CPU and GPU brought together in a single APU,” says Lee.

Lee was less forthcoming about the starting point for the memory research under the FastForward work, other than to say it would be optimizing the technology around its heterogeneous architecture and would involve high-speed interconnects as well as different types and arrangements of memory.

More than anything, Lee sees this R&D work as producing dividends in other areas of AMD’s business. He says the fundamental technologies that the DOE wants for exascale are those the computer industry needs, not just in the future, but right now, referring to the big data domain, in particular. “I expect that a lot of the technology that you see us develop has the potential to make it into a variety of different server products of different genres,” says Lee.

To counterbalance the Intel and AMD work, is NVIDIA, which will be using the company’s Echelon design as the starting point for its FastForward work. Echelon, which was also funded under DARPA’s UHPC program, is based on a future 20-teraflop microprocessor that integrates 128 streaming processors, 8 latency (CPU-type) processors, and 256MB of SRAM memory on-chip. The technology is in line to follow Maxwell, NVIDIA’s GPU architecture scheduled to take the reigns from Kepler in a couple of years. Unlike the Intel and AMD efforts, NVIDIA’s contract is for processor technology only, although the Echelon design also specified an exascale-capable memory subsystem.

While the DOE spread its bets around for the FastForward processor- and memory-based research, there was only one storage subcontract awarded. That went to Whamcloud, who in conjunction with EMC, Cray and HDF Group, got the nod to provide the R&D work for storage and I/O.

The work specifies bringing object storage into the exascale realm, and will be based on the Lustre parallel file system technology. As a result, any development in this area will be open sourced and be available to the Lustre community.

Although the FastForward contracts limit their scope to specific exascale components, rather than complete systems, the research won’t be performed in a complete vacuum. The vendors are expected to work in conjunction with the DOE’s exascale co-design centers, a group that encapsulates various proxy applications, algorithms, and programming models important to the agency. The idea is to align the vendor R&D designs with the DOE’s application needs and expectations, the implication being that these are general enough to apply to a wide range of exascale codes both inside and outside the Energy Department.

All the FastForward contracts have a two-year lifetime, so are slated to expire in 2014. The follow-on DOE work to design and build entire exascale supercomputers are dependent on future budgets. Assuming the feds comes through with the funding, that effort is expected to cost hundreds of millions of dollars over the next several years.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight. Hyperion Research analyst and noted storage expert Mark No Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together any HPC and AI resources and integrate them with networking, Read more…

What’s New in HPC Research: Solar Power, ExaWorks, Optane & More

September 16, 2021

In this regular feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

AWS Solution Channel

Supporting Climate Model Simulations to Accelerate Climate Science

The Amazon Sustainability Data Initiative (ASDI), AWS is donating cloud resources, technical support, and access to scalable infrastructure and fast networking providing high performance computing (HPC) solutions to support simulations of near-term climate using the National Center for Atmospheric Research (NCAR) Community Earth System Model Version 2 (CESM2) and its Whole Atmosphere Community Climate Model (WACCM). Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

Quantum Computer Market Headed to $830M in 2024

September 13, 2021

What is one to make of the quantum computing market? Energized (lots of funding) but still chaotic and advancing in unpredictable ways (e.g. competing qubit tec Read more…

Amazon, NCAR, SilverLining Team for Unprecedented Cloud Climate Simulations

September 10, 2021

Earth’s climate is, to put it mildly, not in a good place. In the wake of a damning report from the Intergovernmental Panel on Climate Change (IPCC), scientis Read more…

After Roadblocks and Renewals, EuroHPC Targets a Bigger, Quantum Future

September 9, 2021

The EuroHPC Joint Undertaking (JU) was formalized in 2018, beginning a new era of European supercomputing that began to bear fruit this year with the launch of several of the first EuroHPC systems. The undertaking, however, has not been without its speed bumps, and the Union faces an uphill... Read more…

How Argonne Is Preparing for Exascale in 2022

September 8, 2021

Additional details came to light on Argonne National Laboratory’s preparation for the 2022 Aurora exascale-class supercomputer, during the HPC User Forum, held virtually this week on account of pandemic. Exascale Computing Project director Doug Kothe reviewed some of the 'early exascale hardware' at Argonne, Oak Ridge and NERSC (Perlmutter), while Ti Leggett, Deputy Project Director & Deputy Director... Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Berkeley Lab Debuts Perlmutter, World’s Fastest AI Supercomputer

May 27, 2021

A ribbon-cutting ceremony held virtually at Berkeley Lab's National Energy Research Scientific Computing Center (NERSC) today marked the official launch of Perlmutter – aka NERSC-9 – the GPU-accelerated supercomputer built by HPE in partnership with Nvidia and AMD. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. “We’ve been scaling our neural network training compute dramatically over the last few years,” said Milan Kovac, Tesla’s director of autopilot engineering. Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Leading Solution Providers

Contributors

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make it seem like it's two nodes behind? For Intel, the response was to change how it refers to its nodes with the aim of better reflecting its positioning within the leadership semiconductor manufacturing space. Intel revealed its new node nomenclature, and... Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire