DOE Primes Pump for Exascale Supercomputers

By Michael Feldman

July 12, 2012

Intel, AMD, NVIDIA, and Whamcloud have been awarded tens of millions of dollars by the US Department of Energy (DOE) to kick-start research and development required to build exascale supercomputers. The work will be performed under the FastForward program, a joint effort run by the DOE Office of Science and the National Nuclear Security Administration (NNSA) that will focus on developing future hardware and software technologies capable of supporting such machines.

The program is being contracted through Lawrence Livermore National Security, LLC as part of a multi-lab consortium that includes Argonne National Laboratory, Lawrence Berkeley National Laboratory, Lawrence Livermore National Laboratory, Los Alamos National Laboratory, Oak Ridge National Laboratory, Pacific Northwest National Laboratory, and Sandia National Laboratories.

Although we’re only six to eight years away from the first exaflops systems, the DOE’s primary exascale program has yet to be funded. (And since this is an election year in the US, such funding will probably not fall into place until 2013.) In the interim, FastForward was devised in order to begin the needed R&D for some of the exascale foundational technologies, in particular, processors, memory and storage.

At least some of the impetus for the program came from the vendors themselves. According to Mark Seager, Intel’s CTO for the company’s High Performance Computing Ecosystem group, the DOE was told by multiple commercial partners that research for the component pieces needed to get underway this year if they hoped to field an exascale machine by 2020. That led to the formation of the program, and apparently there was enough loose change rolling around at the Office of Science and NNSA to fund this more modest effort.

Although all the FastForward subcontracts have yet to be made public, as of today there are four known awards:

  • Intel: $19 million for both processor and memory technologies
  • AMD: $12.6 million for processor and memory technologies
  • NVIDIA: $12 million for processor technology
  • Whamcloud (along with EMC, Cray and HDF Group): Unknown dollar amount for storage and I/O technologies

Although the work is not intended to fund the development of “near-term capabilities” that are already on vendors’ existing product roadmaps, all of this work will be based upon ongoing R&D efforts at these companies. The DOE is fine with this since the commercialization of these technologies is really the only way these government agencies can be assured of cost-effective exascale machines. The FastForward statement of work makes a point of spelling out this arrangement, thusly: “While DOE’s extreme-scale computer requirements are a driving factor, these projects must also exhibit the potential for technology adoption by broader segments of the market outside of DOE supercomputer installations.”

For example, Intel’s FastForward processor work will be based on the company’s MIC (Many Integrated Core) architecture, which the company is initially aiming at the supercomputing market, but with the intent to extend it into big data business applications and beyond. The first MIC product, under the Xeon Phi brand, is scheduled to be launched before the end of 2012, but this initial offering is at least a couple of generations away from supporting exascale-capable machines. According to Seager, a future processor of this kind will need much improved energy efficiency, a revamped memory interface, and higher resiliency.

Although the x86 ISA will be retained, this future MIC architecture will incorporate some “radical approaches” to bring the technology into the exascale realm. To begin with, says Seager, that means reducing its power draw two to three times greater than what would naturally be achieved with transistor shrinkage over the rest of the decade. “It’s a daunting challenge to do better than what Moore’s Law will give you,” Seager told HPCwire.

Fortunately, he says, Intel will be able to leverage its near-threshold voltage circuitry research, some of which was funded under UHPC (Ubiquitous High Performance Computing), DARPA’s now defunct exascale program. Shekhar Borkar, who was the PI for the UHPC work, along with Seager and former IBM’er Al Gara, will be heading up the FastForward work at Intel.

For the exascale memory subcontract, Intel will be leveraging its work with Micron Technology on the Hybrid Memory Cube. The idea is to use similar technology to incorporate 3D stacks of memory chips into the same package as the processor. In-package integration shortens the distance considerably between the processor and the memory, which significantly increases bandwidth and lowers latency. At the same time, cache management is going to be redesigned to optimize the power-performance of memory reads and writes.

Like Intel, AMD will be basing its FastForward processor research on a current design, in this case the company’s APU (Accelerated Processing Unit) product line and the related Heterogeneous Systems Architecture (HSA) standard — that according to Alan Lee, AMD’s corporate vice president for Advanced Research and Development. The current crop of APUs, which integrate CPUs and GPUs on-chip, are aimed at consumer devices, such as laptops, netbooks, and other mobile gear. But AMD has designs on extending its heterogeneous portfolio into the server arena, and the DOE just gave them about 12 million more reasons to do so.

Since AMD first needs to transform their APU into a server design, the chipmaker has a somewhat different, and perhaps longer path to exascale than Intel, which is at least starting with server-ready silicon. On the other hand the MIC architecture is not heterogenous (and may never be), so AMD does have a certain advantage there. “That is the truly unique technology and the strongest one that AMD brings to bear — that we have a world-class CPU and GPU brought together in a single APU,” says Lee.

Lee was less forthcoming about the starting point for the memory research under the FastForward work, other than to say it would be optimizing the technology around its heterogeneous architecture and would involve high-speed interconnects as well as different types and arrangements of memory.

More than anything, Lee sees this R&D work as producing dividends in other areas of AMD’s business. He says the fundamental technologies that the DOE wants for exascale are those the computer industry needs, not just in the future, but right now, referring to the big data domain, in particular. “I expect that a lot of the technology that you see us develop has the potential to make it into a variety of different server products of different genres,” says Lee.

To counterbalance the Intel and AMD work, is NVIDIA, which will be using the company’s Echelon design as the starting point for its FastForward work. Echelon, which was also funded under DARPA’s UHPC program, is based on a future 20-teraflop microprocessor that integrates 128 streaming processors, 8 latency (CPU-type) processors, and 256MB of SRAM memory on-chip. The technology is in line to follow Maxwell, NVIDIA’s GPU architecture scheduled to take the reigns from Kepler in a couple of years. Unlike the Intel and AMD efforts, NVIDIA’s contract is for processor technology only, although the Echelon design also specified an exascale-capable memory subsystem.

While the DOE spread its bets around for the FastForward processor- and memory-based research, there was only one storage subcontract awarded. That went to Whamcloud, who in conjunction with EMC, Cray and HDF Group, got the nod to provide the R&D work for storage and I/O.

The work specifies bringing object storage into the exascale realm, and will be based on the Lustre parallel file system technology. As a result, any development in this area will be open sourced and be available to the Lustre community.

Although the FastForward contracts limit their scope to specific exascale components, rather than complete systems, the research won’t be performed in a complete vacuum. The vendors are expected to work in conjunction with the DOE’s exascale co-design centers, a group that encapsulates various proxy applications, algorithms, and programming models important to the agency. The idea is to align the vendor R&D designs with the DOE’s application needs and expectations, the implication being that these are general enough to apply to a wide range of exascale codes both inside and outside the Energy Department.

All the FastForward contracts have a two-year lifetime, so are slated to expire in 2014. The follow-on DOE work to design and build entire exascale supercomputers are dependent on future budgets. Assuming the feds comes through with the funding, that effort is expected to cost hundreds of millions of dollars over the next several years.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

Weekly Twitter Roundup (Feb. 23, 2017)

February 23, 2017

Here at HPCwire, we aim to keep the HPC community apprised of the most relevant and interesting news items that get tweeted throughout the week. Read more…

By Thomas Ayres

HPE Server Shows Low Latency on STAC-N1 Test

February 22, 2017

The performance of trade and match servers can be a critical differentiator for financial trading houses. Read more…

By John Russell

HPC Financial Update (Feb. 2017)

February 22, 2017

In this recurring feature, we’ll provide you with financial highlights from companies in the HPC industry. Check back in regularly for an updated list with the most pertinent fiscal information. Read more…

By Thomas Ayres

HPE Extreme Performance Solutions

O&G Companies Create Value with High Performance Remote Visualization

Today’s oil and gas (O&G) companies are striving to process datasets that have become not only tremendously large, but extremely complex. And the larger that data becomes, the harder it is to move and analyze it – particularly with a workforce that could be distributed between drilling sites, offshore rigs, and remote offices. Read more…

Rethinking HPC Platforms for ‘Second Gen’ Applications

February 22, 2017

Just what constitutes HPC and how best to support it is a keen topic currently. Read more…

By John Russell

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

ExxonMobil, NCSA, Cray Scale Reservoir Simulation to 700,000+ Processors

February 17, 2017

In a scaling breakthrough for oil and gas discovery, ExxonMobil geoscientists report they have harnessed the power of 717,000 processors – the equivalent of 22,000 32-processor computers – to run complex oil and gas reservoir simulation models. Read more…

By Doug Black

Advancing Modular Supercomputing with DEEP and DEEP-ER Architectures

February 24, 2017

Knowing that the jump to exascale will require novel architectural approaches capable of delivering dramatic efficiency and performance gains, researchers around the world are hard at work on next-generation HPC systems. Read more…

By Sean Thielen

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu’s Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural network training and now they are sharing their implementation with the larger deep learning community. Read more…

By Tiffany Trader

IDC: Will the Real Exascale Race Please Stand Up?

February 21, 2017

So the exascale race is on. And lots of organizations are in the pack. Government announcements from the US, China, India, Japan, and the EU indicate that they are working hard to make it happen – some sooner, some later. Read more…

By Bob Sorensen, IDC

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Drug Developers Use Google Cloud HPC in the Fight Against ALS

February 16, 2017

Within the haystack of a lethal disease such as ALS (amyotrophic lateral sclerosis / Lou Gehrig’s Disease) there exists, somewhere, the needle that will pierce this therapy-resistant affliction. Read more…

By Doug Black

Azure Edges AWS in Linpack Benchmark Study

February 15, 2017

The “when will clouds be ready for HPC” question has ebbed and flowed for years. Read more…

By John Russell

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

For IBM/OpenPOWER: Success in 2017 = (Volume) Sales

January 11, 2017

To a large degree IBM and the OpenPOWER Foundation have done what they said they would – assembling a substantial and growing ecosystem and bringing Power-based products to market, all in about three years. Read more…

By John Russell

US, China Vie for Supercomputing Supremacy

November 14, 2016

The 48th edition of the TOP500 list is fresh off the presses and while there is no new number one system, as previously teased by China, there are a number of notable entrants from the US and around the world and significant trends to report on. Read more…

By Tiffany Trader

Lighting up Aurora: Behind the Scenes at the Creation of the DOE’s Upcoming 200 Petaflops Supercomputer

December 1, 2016

In April 2015, U.S. Department of Energy Undersecretary Franklin Orr announced that Intel would be the prime contractor for Aurora: Read more…

By Jan Rowell

D-Wave SC16 Update: What’s Bo Ewald Saying These Days

November 18, 2016

Tucked in a back section of the SC16 exhibit hall, quantum computing pioneer D-Wave has been talking up its new 2000-qubit processor announced in September. Forget for a moment the criticism sometimes aimed at D-Wave. This small Canadian company has sold several machines including, for example, ones to Lockheed and NASA, and has worked with Google on mapping machine learning problems to quantum computing. In July Los Alamos National Laboratory took possession of a 1000-quibit D-Wave 2X system that LANL ordered a year ago around the time of SC15. Read more…

By John Russell

Enlisting Deep Learning in the War on Cancer

December 7, 2016

Sometime in Q2 2017 the first ‘results’ of the Joint Design of Advanced Computing Solutions for Cancer (JDACS4C) will become publicly available according to Rick Stevens. He leads one of three JDACS4C pilot projects pressing deep learning (DL) into service in the War on Cancer. Read more…

By John Russell

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular offerings such as Caffe, Theano, and Torch. Read more…

By John Russell

HPC Startup Advances Auto-Parallelization’s Promise

January 23, 2017

The shift from single core to multicore hardware has made finding parallelism in codes more important than ever, but that hasn’t made the task of parallel programming any easier. Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which will be Japan’s “fastest AI supercomputer,” Read more…

By Tiffany Trader

Leading Solution Providers

CPU Benchmarking: Haswell Versus POWER8

June 2, 2015

With OpenPOWER activity ramping up and IBM’s prominent role in the upcoming DOE machines Summit and Sierra, it’s a good time to look at how the IBM POWER CPU stacks up against the x86 Xeon Haswell CPU from Intel. Read more…

By Tiffany Trader

Nvidia Sees Bright Future for AI Supercomputing

November 23, 2016

Graphics chipmaker Nvidia made a strong showing at SC16 in Salt Lake City last week. Read more…

By Tiffany Trader

BioTeam’s Berman Charts 2017 HPC Trends in Life Sciences

January 4, 2017

Twenty years ago high performance computing was nearly absent from life sciences. Today it’s used throughout life sciences and biomedical research. Genomics and the data deluge from modern lab instruments are the main drivers, but so is the longer-term desire to perform predictive simulation in support of Precision Medicine (PM). There’s even a specialized life sciences supercomputer, ‘Anton’ from D.E. Shaw Research, and the Pittsburgh Supercomputing Center is standing up its second Anton 2 and actively soliciting project proposals. There’s a lot going on. Read more…

By John Russell

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a new board design for NVLink-equipped Pascal P100 GPUs that will create another entrant to the space currently occupied by Nvidia's DGX-1 system, IBM's "Minsky" platform and the Supermicro SuperServer (1028GQ-TXR). Read more…

By Tiffany Trader

IDG to Be Bought by Chinese Investors; IDC to Spin Out HPC Group

January 19, 2017

US-based publishing and investment firm International Data Group, Inc. (IDG) will be acquired by a pair of Chinese investors, China Oceanwide Holdings Group Co., Ltd. Read more…

By Tiffany Trader

Dell Knights Landing Machine Sets New STAC Records

November 2, 2016

The Securities Technology Analysis Center, commonly known as STAC, has released a new report characterizing the performance of the Knight Landing-based Dell PowerEdge C6320p server on the STAC-A2 benchmarking suite, widely used by the financial services industry to test and evaluate computing platforms. The Dell machine has set new records for both the baseline Greeks benchmark and the large Greeks benchmark. Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling was pretty much the exclusive realm of the Cray-2 and IBM mainframe class products. That’s changing. We are now seeing an emergence of x86 class server products with exotic plumbing technology ranging from Direct-to-Chip to servers and storage completely immersed in a dielectric fluid. Read more…

By Steve Campbell

What Knights Landing Is Not

June 18, 2016

As we get ready to launch the newest member of the Intel Xeon Phi family, code named Knights Landing, it is natural that there be some questions and potentially some confusion. Read more…

By James Reinders, Intel

  • arrow
  • Click Here for More Headlines
  • arrow
Share This