Researchers Squeeze GPU Performance from 11 Big Science Apps

By Michael Feldman

July 18, 2012

The GPGPU faithful received another round of encouraging news this week. In a report  published this week, researchers documented that GPU-equipped supercomputers enabled application speedups between 1.4x and 6.1x across a range of well-known science codes. While those results aren’t the order of magnitude performance increases that were being bandied about in the early days of GPU computing, the researchers were encouraged that the technology is producing consistently good results with some of the most popular HPC science applications in the world.

The work was presented in March at the Accelerating Computational Science Symposium, an event devoted to understanding the use of hybrid supercomputers for scientific research. The ensuing report published by the Oak Ridge Leadership Computing Facility, detailed the performance GPU acceleration across the science application spectrum — biology, chemical physics, combustion, nuclear fission and fusion, material science, seismology, molecular dynamics, and climatology.

The 11 simulation codes tested –  S3D, Denovo, LAMMPS, WL-LSMS, CAM-SE, NAMD, Chroma, QMCPACK, SPECFEM-3D, GTC, and CP2K — are used by tens of thousands of researchers worldwide. NAMD alone has over 50 thousand users.

It should be noted that all of the principle participants at the symposium, including Oak Ridge National Laboratory (ORNL), the National Center for Supercomputing Applications (NCSA) and the Swiss National Supercomputing Center (CSCS), not to mention symposium sponsors Cray and NVIDIA, have a stake in proving the viability of GPU-accelerated supercomputing. The three supercomputing centers recently made substantial investments in GPU-based HPC, ORNL with its upcoming 20-plus-petaflop Titan system, NCSA with the 10-petaflop Blue Waters supercomputer, and CSCS with its currently installed 176-node Todi machine.

Titan, Blue Waters and Todi are all Cray supercomputers with varying amounts of AMD Opteron and NVIDIA Tesla horsepower, although none with greater than a 1:1 GPU-to-CPU ratio. That assumes a certain balance in the application between the sequential pieces of the code that would best be run on the CPU and the parallel components that would be candidates for the GPU. But applications can have very different needs in this regard, so that hardware ratio may not always be optimal. Vendors such as HP, Dell, Appro and others offer systems with much higher ratios of GPU to CPUs.

To level the playing field as much as possible, the performance runs for the science apps were made on CSCS’s Monte Rosa, a Cray XE6 machine equipped with two AMD “Interlagos” (Opteron 6200) CPUs per node, and TitanDev, a XK6 Titan-based testbed that consists of hybrid nodes, each of which contain one NVIDIA Fermi GPU and one Interlagos CPU . So in essence, the applications were tested on the same two systems, one of which replaced the second CPU with a GPU in each node. Here are the results:

Application

Performance

XK6 vs XE6

Software Framework

S3D

Turbulent combustion

1.4 OpenACC

NAMD

Molecular dynamics

1.4 CUDA

CP2K

Chemical physics

1.5  CUDA

CAM-SE

Community atmosphere model

1.5 PGI CUDA Fortran

WL-LSMS

Statistical mechanics of magnetic materials

1.6  CUDA

GTC/GTC-GPU

Plasma physics for fusion energy

 1.6  CUDA

 SPECFEM-3D

Seismology

 2.5  CUDA

 QMCPACK

Electronic structure of materials

 3.0  CUDA

 LAMMPS

Molecular dynamics

 3.2  CUDA

 Denovo

3D neutron transport for nuclear reactors

 3.3  CUDA

 Chroma

Lattice quantum chromodynamics

 6.1  CUDA

According to this, the Fermi GPU-equipped XK6 was able to extract between 140 and 610 percent of the application performance compared to the CPU-only XE6. As CSCS director Thomas Schulthess observed at the symposium, that takes into account the fact the Interlagos Opteron is a new x86 processor, while Fermi is a two-year-old design. The implication is that the upcoming Kepler K20 GPU, which is supposed to be available later this year (and which will be deployed in Titan and Blue Waters), should widen the CPU-GPU performance gap even more.

“It’s going to be interesting to see in the next few years if there’s going to be a small avalanche, or is a big avalanche coming that’s really going to revolutionize computational science.” said Schulthess.

Even though the researchers provided an apples-to-apples comparison from a hardware perspective, the application software implementation for the two architectures is, by definition, rather different. Although the report did not delve too deeply into the software frameworks, most of these GPU codes incorporated CUDA or CUDA-based libraries. Only two of the applications, CAM-SE and S3D, used a higher level programming approach: PGI’s CUDA Fortran compiler for CAM-SE and OpenACC directives (compiler unknown) for the S3D implementation. Neither of these did particularly well, relative to the performance increases for the other applications, but there are not enough examples here to make any generalizations.

The other thing to keep in mind is that is no guarantee that the code implementations for either the CPU-only or hybrid versions are optimal at extracting the maximum performance from the silicon. A Fermi-class Tesla M2090 module delivers 665 gigaflops of peak performance, which is about 5 or 6 times that of a high-end Opteron 6200. The only code that appeared to fully exploit the performance advantage of the GPU was Chroma, the code for high energy and nuclear physics. Since applications vary significantly in their potential to utilize a highly threaded architecture like a GPU, this should come as no surprise.

Another aspect that needs to be taken into account is power usage. Although the performance comparison between the two processors is a useful one, if codes can scale equally well on a CPU as a GPU, performance per watt becomes a more valid criteria. Since these GPU accelerators consume about twice the power of a high-end x86 under full load, that means each hybrid node uses 50 percent more power than the corresponding CPU-only one when those systems are running at peak.

That suggests that the GPU-accelerated version of these codes should probably run at least 1.5 times as fast in this configuration to keep performance per watt in line. (Note that half of these codes are clustered around that break-even point.) To be fair, that’s not precisely true, since when the graphics engine is not being fully utilized it won’t be drawing anything near its maximum wattage; in general the GPU is much more efficient at throughput computing than its CPU brethren. But the fact remains that the power-performance behavior of the codes needs to be factored in when you’re considering the advantages of GPU acceleration.

Another missing piece of this comparison is how well these same applications would run on NVIDIA’s HPC competition, namely Intel’s Xeon Phi (aka MIC) coprocessor and its very different software ecosystem. Of course, there is no Xeon Phi yet, so that comparison can’t yet be made. But by this time next year, teraflop-capable MIC and Kepler chips should be in crunching away at applications on production machines. At that point, the case for accelerated science codes could be even more compelling.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Better Scientific Software: Turn Your Passion into Cash

September 13, 2019

Do you know your way around scientific software and programming? You think you can contribute to the community by making scientific software better? If so, then the Better Scientific Software (BSSW) organization wants yo Read more…

By Dan Olds

Google’s ML Compiler Initiative Advances

September 12, 2019

Machine learning models running on everything from cloud platforms to mobile phones are posing new challenges for developers faced with growing tool complexity. Google’s TensorFlow team unveiled an open-source machine Read more…

By George Leopold

HPC Perspectives with Dr. Seid Koric

September 12, 2019

Brendan McGinty, director of Industry for the National Center for Supercomputing Applications (NCSA), University of Illinois at Urbana-Champaign, kicks off the first in a series of pieces profiling leaders in high performance computing (HPC), writing for the... Read more…

By Brendan McGinty

AWS Solution Channel

A Guide to Discovering the Best AWS Instances and Configurations for Your HPC Workload

The flexibility and heterogeneity of HPC cloud services provide a welcome contrast to the constraints of on-premises HPC. Every HPC configuration is potentially accessible to any given workload in a well-resourced cloud HPC deployment, with vast scalability to spin up as much compute as that workload demands in any given moment. Read more…

HPE Extreme Performance Solutions

Intel FPGAs: More Than Just an Accelerator Card

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

Building a Solid IA for Your AI

The journey to high performance precision medicine starts with designing and deploying a solid Information Architecture that addresses the spectrum of challenges from data and applications that need to be managed and orchestrated together to empower workloads from analytics to AI. Read more…

IDAS: ‘Automagic’ HPC With Training Wheels

September 12, 2019

High-performance computing (HPC) for research is notorious for having steep barriers to entry. For this reason, high-tech disciplines were early adopters, have used the most cycles and typically drove hardware and softwa Read more…

By Elizabeth Leake

IDAS: ‘Automagic’ HPC With Training Wheels

September 12, 2019

High-performance computing (HPC) for research is notorious for having steep barriers to entry. For this reason, high-tech disciplines were early adopters, have Read more…

By Elizabeth Leake

Univa Brings Cloud Automation to Slurm Users with Navops Launch 2.0

September 11, 2019

Univa, the company behind Grid Engine, announced today its HPC cloud-automation platform NavOps Launch will support the popular open-source workload scheduler Slurm. With the release of NavOps Launch 2.0, “Slurm users will have access to the same cloud automation capabilities... Read more…

By Tiffany Trader

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

Eyes on the Prize: TACC’s Frontera Quickly Ramps up Science Agenda

September 9, 2019

Announced a year ago and officially launched a week ago, the Texas Advanced Computing Center’s Frontera – now the fastest academic supercomputer (~25 petefl Read more…

By John Russell

Quantum Roundup: IBM Goes to School, Delft Tackles Networking, Rigetti Updates

September 5, 2019

IBM today announced a new open source quantum ‘textbook’, a series of quantum education videos, and plans to expand its nascent quantum hackathon program. L Read more…

By John Russell

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Fastest Academic Supercomputer Enters Full Production at TACC, Just in Time for Hurricane Season

September 3, 2019

Frontera, the NSF supercomputer installed at the Texas Advanced Computing Center (TACC) in June, passed its formal acceptance last week and is now officially la Read more…

By Tiffany Trader

MIT Prepares for Satori…and a New 2 Petaflops Computer Too

August 27, 2019

Sometime this fall, MIT will fire up Satori – an $11.6 million compute cluster donated by IBM and coinciding with the opening of the MIT Stephen A. Schwarzma Read more…

By John Russell

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

Qualcomm Invests in RISC-V Startup SiFive

June 7, 2019

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups. Last fall, Esperanto Technologies announced a $58 million funding round. Read more…

By George Leopold

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Intel Debuts Pohoiki Beach, Its 8M Neuron Neuromorphic Development System

July 17, 2019

Neuromorphic computing has received less fanfare of late than quantum computing whose mystery has captured public attention and which seems to have generated mo Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This