Analyst Weighs In on 64-Bit ARM

By Michael Feldman

August 16, 2012

In a recent report in Real World Technologies, chip guru David Kanter dissects the new 64-bit ARM design (ARMv8) and what it might mean to the IT landscape. His take on the architecture is almost uniformly positive, noting that not only did the designers manage to develop an elegant instruction set that was backwardly compatible with the existing ISA, but they also took the extra step to jettison a few of the poorly designed features of the 32-bit architecture.

Announced in October 2011, 64-bit ARM is the biggest makeover the processor architecture has received in its 26-year history.  The first implementation in 1985, ARM1, was a 32-bit chip developed for Acorn Computers (ARM = Acorn RISC Machine). Although the architecture never caught on in the PC biz, it’s simple, low-power RISC design made it a natural for embedded/mobile SoC applications and microcontrollers.

While the server and personal computer world moved on to 64 bits, ARM was safely ensconced in the embedded/mobile space where 32 bits of addressing (basically 4 GB) was plenty.  But now that devices like tablets and other mobile gadgets are pushing up against this limit, a larger address reach will soon become necessary. Also, the expanded address reach will allow ARM chips for the first time to enter the server market and compete against the x86, the processor architecture that has dominated the datacenter for decades.

In a sense, ARM is trying to duplicate the success of the x86 when it made its own jump from 32 to 64 bits in 2000.  In that case, the 64-bit Intel Xeons and AMD Opertons ended up displacing a lot of their high-end RISC-based competition  — especially SPARC and Power. If 64-bit ARM ends up cutting into the x86 share of the server market, it would be fitting revenge for the RISC faithful.

As mentioned, before the most critical enabling feature for 64-bit ARM is extending the address space. Although 64 bits could reach 16 exabytes, there’s little application demand to access data at that scale.  For the time being, only 48 bits will be used to form an address, which gives software a 256 GB address reach.  Presumably, additional address bits can be tacked on in the future as applications scale up.

With the ARMv8 design, integer and floating point structures are also being enhanced, with all general purpose registers being extended to 64 bits.  The floating point design has been tweaked to support IEEE754-2008, including additional  instructions to make the architecture compliant with the standard.

For vector operations, the changes are more extensive. In the 32-bit spec, the SIMD design (known as NEON) already contained 32 64-bit registers, which could be aliased to 16 128-bit pseudo-registers.  For the 64-bit design, that’s been extended to 32 128-bit registers, with the lower half being used if only 64 bit values are needed.  Not only does that double the capacity of the vector unit, it makes for a somewhat cleaner arrangement. The SIMD design also adds full IEEE support and double precision floating point operations.

Curiously missing form ARMv8 is multi-threading support, a feature common to all other major server CPUs — x86, SPARC, Power, and even HPC processors like the Blue Gene/Q ASIC (PowerPC A2). Kanter speculates that the ARM designers decided to forego multi-threading for now since it is notoriously difficult to validate, and the new design already encapsulated a lot of changes.  Although the jury is still out on the aggregate benefit of this feature, for certain classes of software, the lack of multi-threading support could turn out to be a decided disadvantage.

Overall though, Kanter likes what ARM developers have come up with, which he says is “clearly a sound design that was well though out and should enable reasonable implementations.”  As he notes though, there are currently no chip implementations around to judge the the architecture’s performance in the field.

But within a couple of years, we should see multiple 64-bit ARM SoCs at various segments of the market — everything from high performance computers to workstations. Applied Micro already has an FPGA implementation of ARMv8, which the company unveiled in October 2011 and subsequently demonstrated running on an Apache web server. Samsung, Qualcomm, Calxeda, Microsoft, Marvell and NVIDIA have either stated plans to implement a chip or have already bought licenses. At this point, NVIDIA is the only one that has specifically talked about a 64-bit ARM implementation (Project Denver) aimed at HPC, but Calxeda also has high performance computing on its radar.

Samsung is a particularly interesting entrant to the market. The Korean firm is mostly in the consumer electronics business and its involvement in the server space is currently confined to supplying DRAM and flash components. But Samsung would make a formidable competitor against Intel in the server chip arena if the company funneled its resources there. While Intel has more than twice Samsung’s revenue today, the latter company is growing at a much faster rate.

That led industry analyst firm IC Insights to project that Samsung would eclipse Intel as the world’s largest supplier of semiconductor parts by 2014. Coincidentally, that’s that same year the company plans to roll out its first 64-bit ARM server chips. As Kanter concluded: “Certainly, the next few years should be very interesting.”

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Cray Introduces All Flash Lustre Storage Solution Targeting HPC

June 19, 2018

Citing the rise of IOPS-intensive workflows and more affordable flash technology, Cray today introduced the L300F, a scalable all-flash storage solution whose primary use case is to support high IOPS rates to/from a scra Read more…

By John Russell

Lenovo to Debut ‘Neptune’ Cooling Technologies at ISC

June 19, 2018

Lenovo today announced a set of cooling technologies, dubbed Neptune, that include direct to node (DTN) warm water cooling, rear door heat exchanger (RDHX), and hybrid solutions that combine air and liquid cooling. Lenov Read more…

By John Russell

World Cup is Lame Compared to This Competition

June 18, 2018

So you think World Cup soccer is a big deal? While I’m sure it’s very compelling to watch a bunch of athletes kick a ball around, World Cup misses the boat because it doesn’t include teams putting together their ow Read more…

By Dan Olds

HPE Extreme Performance Solutions

HPC and AI Convergence is Accelerating New Levels of Intelligence

Data analytics is the most valuable tool in the digital marketplace – so much so that organizations are employing high performance computing (HPC) capabilities to rapidly collect, share, and analyze endless streams of data. Read more…

IBM Accelerated Insights

Banks Boost Infrastructure to Tackle GDPR

As banks become more digital and data-driven, their IT managers are challenged with fast growing data volumes and lines-of-businesses’ (LoBs’) seemingly limitless appetite for analytics. Read more…

IBM Demonstrates Deep Neural Network Training with Analog Memory Devices

June 18, 2018

From smarter, more personalized apps to seemingly-ubiquitous Google Assistant and Alexa devices, AI adoption is showing no signs of slowing down – and yet, the hardware used for AI is far from perfect. Currently, GPUs Read more…

By Oliver Peckham

Cray Introduces All Flash Lustre Storage Solution Targeting HPC

June 19, 2018

Citing the rise of IOPS-intensive workflows and more affordable flash technology, Cray today introduced the L300F, a scalable all-flash storage solution whose p Read more…

By John Russell

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

The Machine Learning Hype Cycle and HPC

June 14, 2018

Like many other HPC professionals I’m following the hype cycle around machine learning/deep learning with interest. I subscribe to the view that we’re probably approaching the ‘peak of inflated expectation’ but not quite yet starting the descent into the ‘trough of disillusionment. This still raises the probability that... Read more…

By Dairsie Latimer

Xiaoxiang Zhu Receives the 2018 PRACE Ada Lovelace Award for HPC

June 13, 2018

Xiaoxiang Zhu, who works for the German Aerospace Center (DLR) and Technical University of Munich (TUM), was awarded the 2018 PRACE Ada Lovelace Award for HPC for her outstanding contributions in the field of high performance computing (HPC) in Europe. Read more…

By Elizabeth Leake

U.S Considering Launch of National Quantum Initiative

June 11, 2018

Sometime this month the U.S. House Science Committee will introduce legislation to launch a 10-year National Quantum Initiative, according to a recent report by Read more…

By John Russell

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Exascale USA – Continuing to Move Forward

June 6, 2018

The end of May 2018, saw several important events that continue to advance the Department of Energy’s (DOE) Exascale Computing Initiative (ECI) for the United Read more…

By Alex R. Larzelere

Exascale for the Rest of Us: Exaflops Systems Capable for Industry

June 6, 2018

Enterprise advanced scale computing – or HPC in the enterprise – is an entity unto itself, situated between (and with characteristics of) conventional enter Read more…

By Doug Black

MLPerf – Will New Machine Learning Benchmark Help Propel AI Forward?

May 2, 2018

Let the AI benchmarking wars begin. Today, a diverse group from academia and industry – Google, Baidu, Intel, AMD, Harvard, and Stanford among them – releas Read more…

By John Russell

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

US Plans $1.8 Billion Spend on DOE Exascale Supercomputing

April 11, 2018

On Monday, the United States Department of Energy announced its intention to procure up to three exascale supercomputers at a cost of up to $1.8 billion with th Read more…

By Tiffany Trader

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Hennessy & Patterson: A New Golden Age for Computer Architecture

April 17, 2018

On Monday June 4, 2018, 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Sympo Read more…

By Staff

Leading Solution Providers

SC17 Booth Video Tours Playlist

Altair @ SC17

Altair

AMD @ SC17

AMD

ASRock Rack @ SC17

ASRock Rack

CEJN @ SC17

CEJN

DDN Storage @ SC17

DDN Storage

Huawei @ SC17

Huawei

IBM @ SC17

IBM

IBM Power Systems @ SC17

IBM Power Systems

Intel @ SC17

Intel

Lenovo @ SC17

Lenovo

Mellanox Technologies @ SC17

Mellanox Technologies

Microsoft @ SC17

Microsoft

Penguin Computing @ SC17

Penguin Computing

Pure Storage @ SC17

Pure Storage

Supericro @ SC17

Supericro

Tyan @ SC17

Tyan

Univa @ SC17

Univa

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

Google I/O 2018: AI Everywhere; TPU 3.0 Delivers 100+ Petaflops but Requires Liquid Cooling

May 9, 2018

All things AI dominated discussion at yesterday’s opening of Google’s I/O 2018 developers meeting covering much of Google's near-term product roadmap. The e Read more…

By John Russell

Nvidia Ups Hardware Game with 16-GPU DGX-2 Server and 18-Port NVSwitch

March 27, 2018

Nvidia unveiled a raft of new products from its annual technology conference in San Jose today, and despite not offering up a new chip architecture, there were still a few surprises in store for HPC hardware aficionados. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Franci Read more…

By John Russell

HPE Wins $57 Million DoD Supercomputing Contract

February 20, 2018

Hewlett Packard Enterprise (HPE) today revealed details of its massive $57 million HPC contract with the U.S. Department of Defense (DoD). The deal calls for HP Read more…

By Tiffany Trader

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Google Charts Two-Dimensional Quantum Course

April 26, 2018

Quantum error correction, essential for achieving universal fault-tolerant quantum computation, is one of the main challenges of the quantum computing field and it’s top of mind for Google’s John Martinis. At a presentation last week at the HPC User Forum in Tucson, Martinis, one of the world's foremost experts in quantum computing, emphasized... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This