AMD Unveils 64-Bit ARM Strategy

By Tiffany Trader and Michael Feldman

November 1, 2012

On Monday, AMD announced it is adding ARM-based Opterons to its server portfolio, the first non-x86 Opterons in the company’s history. The new processors, due out in 2014, will use 64-bit ARM SoCs on top of its SeaMicro Freedom Fabric technology, and will be aimed at the datacenter and cloud space.

AMD ARMAt the Monday morning press briefing, CEO Rory Reed examined the backdrop for this bold move. “There’s no doubt that the cloud changes everything,” he said. “The cloud truly is the killer app that’s unlocking the future; it’s driving the fastest level of growth across the industry. Over the last decade, we’ve seen an annual increase of about 33 percent in CAPEX spending in the datacenter on the large mega-datacenter cloud services, and that’s only going to continue to evolve and expand.”

The modern computing landscape is changing. The growing interest in energy-efficient microservers marks an important shift. For the past two decades, x86 has been the only (commodity) option for mainstream server computing, but the emergence of microservers gives ARM a unique opportunity to gain a foothold in the market.

Dell and HP both have a microserver play, and last month we saw Penguin Computing jump on the bandwagon. Intel is attempting to address the market with tweaked variants of its Atom and Xeon processors, but AMD will the first chipmaker to offer both 64-bit ARM and x86 server processors.

It’s the 64-bit aspect that will enable the ARM architecture to compete with x86 in the datacenter realm; 32-bit chips have a limited address reach (4 GB), which is problematic for server-sized datasets. Although 64-bit implementations of ARM aren’t expected until 2014, chipmakers are beginning to lay out their roadmaps today. Besides AMD, Calxeda and NVIDIA have also announced intentions to take 64-bit ARM silicon into the datacenter.

Until now making a datacenter more efficient meant increasing CPU horsepower or upping the core count. With the rise of cloud, mobile and Web computing, there are more bytes streaming into the datacenter. However, a lot of these Web era workloads are highly-parallelizable. ARM CPUs, which grew up inside mobile devices, are particularly efficient at these types of slice-and-dice workloads and have a power profile that is about one-third their x86 cousins.

Dr. Lisa Su, AMD senior vice president and general manager, talked about the product plans in more detail at the company’s ARM press event. “The biggest change in the datacenter is there is no one size fits all,” she emphasized.

AMD is positioning itself to offer a broad menu of choices to meet different kinds of datacenter workloads, and has apparently come to the conclusion that some of them are better served by ARM rather than x86. In particular, the company thinks ARM-based servers will be a good fit for clouds and mega-datacenters, but it’s still targeting its more powerful x86-based Opterons for the heavier lifting, like rendering, machine learning and HPC applications.

AMD portfolio

Even though AMD initially plans to direct its ARM portfolio to the generic cloud and Web service space, customers may get a bit more creative. For example, ARM could be the way to go for some embarrassingly parallel HPC applications like genomic analysis, which doesn’t need scads of floating point horsepower nor single-threaded performance. AMD would probably rather sell higher-end x86 Opterons to such users, but the market will do what it wants. And given the up-front and power costs of large clusters, HPC users can be particularly opportunistic.

Aside from adopting the ARM architecture, AMD will also incorporate its SeaMicro Freedom Fabric into the chips. This is the company’s secret sauce that they claim will set it apart from competing ARM SoCs. The fabric optimizes system performance by offering a high-bandwidth, low-latency system interconnect that keeps all the CPUs well fed with data.

While the ARM-based server design has a lot of promise, including higher compute per dollar and compute per watt, changing architectures can’t be done overnight. From the software perspective, the biggest difference between x86 and ARM parts is the instruction set. At the very least, applications and operating systems must be recompiled to support the new platform. Meanwhile software that is closer to the metal, like compilers, will have to be tweaked or, in some cases, developed from scratch.

So while it may seem premature to announce a product in 2012 that won’t be ready until 2014, it will take at least that long to bring the software up to speed. On AMD’s end, they’ll be busy completing the chip design and lining up OEM partners. Indeed, ecosystem development has been the main thrust of all the early microserver announcements.

AMD Cortex A50-seriesThe day after AMD dropped the big news, ARM unveiled its 64-bit Cortex-A50 processor series based upon the ARMv8 architecture, which it introduced a year ago. The implementations include the Cortex-A53, ARM’s most energy-efficient yet, and the Cortex-A57, the more performant version. According to the company, 64-bit execution will enable “new opportunities in networking, server and high-performance computing.” In addition to AMD, Broadcom, Calxeda, HiSilicon, Samsung and STMicroelectronics are partnering with ARM to license the new processor series.

AMD is obviously betting on its new ARM-SeaMicro roadmap to help regain market share from its nemesis on the server front. AMD pioneered 64-bit x86 computing in 2003, and for a while, claimed a sizeable chunk of the business. After Intel followed suit with its 64-bit x86 offerings, AMD saw its market share steadily erode. Now that the chipmaker has, once again, decided to offer something completely different from Intel, we’ll see if history repeats itself.


Related articles

Penguin Joins Microserver ARMs Race

Dell Develops Second ARM Server Platform

Analyst Weighs In on 64-Bit ARM

Calxeda Takes Aim at Big Data HPC with ARM Server Chip

Arm Yourselves for Exascale, Part 1

Arm Yourselves for Exascale, Part 2

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

NSF Awards $10M to Extend Chameleon Cloud Testbed Project

September 19, 2017

The National Science Foundation has awarded a second phase, $10 million grant to the Chameleon cloud computing testbed project led by University of Chicago with partners at the Texas Advanced Computing Center (TACC), Ren Read more…

By John Russell

NERSC Simulations Shed Light on Fusion Reaction Turbulence

September 19, 2017

Understanding fusion reactions in detail – particularly plasma turbulence – is critical to the effort to bring fusion power to reality. Recent work including roughly 70 million hours of compute time at the National E Read more…

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakthrough Science at the Exascale” at the ACM Europe Conferen Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE Prepares Customers for Success with the HPC Software Portfolio

High performance computing (HPC) software is key to harnessing the full power of HPC environments. Development and management tools enable IT departments to streamline installation and maintenance of their systems as well as create, optimize, and run their HPC applications. Read more…

U of Illinois, NCSA Launch First US Nanomanufacturing Node

September 14, 2017

The University of Illinois at Urbana-Champaign together with the National Center for Supercomputing Applications (NCSA) have launched the United States's first computational node aimed at the development of nanomanufactu Read more…

By Tiffany Trader

Kathy Yelick Charts the Promise and Progress of Exascale Science

September 15, 2017

On Friday, Sept. 8, Kathy Yelick of Lawrence Berkeley National Laboratory and the University of California, Berkeley, delivered the keynote address on “Breakt Read more…

By Tiffany Trader

DARPA Pledges Another $300 Million for Post-Moore’s Readiness

September 14, 2017

The Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States can sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s Law technologies. Read more…

By Tiffany Trader

IBM Breaks Ground for Complex Quantum Chemistry

September 14, 2017

IBM has reported the use of a novel algorithm to simulate BeH2 (beryllium-hydride) on a quantum computer. This is the largest molecule so far simulated on a quantum computer. The technique, which used six qubits of a seven-qubit system, is an important step forward and may suggest an approach to simulating ever larger molecules. Read more…

By John Russell

Cubes, Culture, and a New Challenge: Trish Damkroger Talks about Life at Intel—and Why HPC Matters More Than Ever

September 13, 2017

Trish Damkroger wasn’t looking to change jobs when she attended SC15 in Austin, Texas. Capping a 15-year career within Department of Energy (DOE) laboratories, she was acting Associate Director for Computation at Lawrence Livermore National Laboratory (LLNL). Her mission was to equip the lab’s scientists and research partners with resources that would advance their cutting-edge work... Read more…

By Jan Rowell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

MIT-IBM Watson AI Lab Targets Algorithms, AI Physics

September 7, 2017

Investment continues to flow into artificial intelligence research, especially in key areas such as AI algorithms that promise to move the technology from speci Read more…

By George Leopold

Need Data Science CyberInfrastructure? Check with RENCI’s xDCI Concierge

September 6, 2017

For about a year the Renaissance Computing Institute (RENCI) has been assembling best practices and open source components around data-driven scientific researc Read more…

By John Russell

IBM Advances Web-based Quantum Programming

September 5, 2017

IBM Research is pairing its Jupyter-based Data Science Experience notebook environment with its cloud-based quantum computer, IBM Q, in hopes of encouraging a new class of entrepreneurial user to solve intractable problems that even exceed the capabilities of the best AI systems. Read more…

By Alex Woodie

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

NERSC Scales Scientific Deep Learning to 15 Petaflops

August 28, 2017

A collaborative effort between Intel, NERSC and Stanford has delivered the first 15-petaflops deep learning software running on HPC platforms and is, according Read more…

By Rob Farber

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Oracle Layoffs Reportedly Hit SPARC and Solaris Hard

September 7, 2017

Oracle’s latest layoffs have many wondering if this is the end of the line for the SPARC processor and Solaris OS development. As reported by multiple sources Read more…

By John Russell

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

Leading Solution Providers

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Google Releases Deeplearn.js to Further Democratize Machine Learning

August 17, 2017

Spreading the use of machine learning tools is one of the goals of Google’s PAIR (People + AI Research) initiative, which was introduced in early July. Last w Read more…

By John Russell

EU Funds 20 Million Euro ARM+FPGA Exascale Project

September 7, 2017

At the Barcelona Supercomputer Centre on Wednesday (Sept. 6), 16 partners gathered to launch the EuroEXA project, which invests €20 million over three-and-a-half years into exascale-focused research and development. Led by the Horizon 2020 program, EuroEXA picks up the banner of a triad of partner projects — ExaNeSt, EcoScale and ExaNoDe — building on their work... Read more…

By Tiffany Trader

Cray Moves to Acquire the Seagate ClusterStor Line

July 28, 2017

This week Cray announced that it is picking up Seagate's ClusterStor HPC storage array business for an undisclosed sum. "In short we're effectively transitioning the bulk of the ClusterStor product line to Cray," said CEO Peter Ungaro. Read more…

By Tiffany Trader

Amazon Debuts New AMD-based GPU Instances for Graphics Acceleration

September 12, 2017

Last week Amazon Web Services (AWS) streaming service, AppStream 2.0, introduced a new GPU instance called Graphics Design intended to accelerate graphics. The Read more…

By John Russell

GlobalFoundries: 7nm Chips Coming in 2018, EUV in 2019

June 13, 2017

GlobalFoundries has formally announced that its 7nm technology is ready for customer engagement with product tape outs expected for the first half of 2018. The Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This