Texas Instruments Puts ARM-DSP Processors Into Play for HPC

By Michael Feldman

November 20, 2012

NVIDIA, Intel and AMD were not the only chip vendors unveiling new HPC accelerators last week SC12. Texas Instruments (TI) announced a set of heterogeneous processors that they believe will offer among the best performance per watt in the industry. In this case, the chipmaker glued an ARM CPU and digital signal processor (DSP) together on the same die, offering a low-power SoC with an impressive number of FLOPS.

This represents TI’s second attempt to push a wedge into the high performance computing space. The company made its initial foray into the market in October 2011 when it introduced its multicore Keystone DSPs (TMS320C66x). The primary destination of those chips was 4G cellular base stations and radio network controllers, but since floating point functionality had to be added to serve that market, TI felt the same silicon could double as HPC accelerators.

One of the problems with the standalone DSP devices being used for HPC was that the application kernels had to be offloaded from a CPU host to the DSP. That wasn’t because the DSPs couldn’t run a whole application (the DSP is closer to a manycore CPU than a GPU), but because there was no Linux OS or MPI library ports for the architecture. ARM, though, had support for both of these pieces of software, allowing developers to use a traditional driver-accelerator model.

There are actually six new SoCs being introduced by TI, two of which are ARM-only (no DSP integration) that are aimed at powering routers, switches, wireless appliances, and other networking devices. The four remaining parts are the ARM-DSP heterogenous chips. These heterogeneous chips are fully tricked-out SoCs, with an ARM Cortex A15 CPU, a Keystone DSP, a shared memory controller, an integrated fabric and an I/O interface. The fabric itself is a custom design from TI, known as TeraNet, which delivers a low latency, multi-terabit/second fabric that connects the ARM CPU, DSP and memory controller.

Of the four heterogeneous, two are high-end parts – the 66AK2H06 and 66AK2H12 – targeted to high performance computing, as well as media processing, video analytics, gaming, VDI, and radar. The 66AK2H12 4-core ARM/8-core DSP is the more powerful of the two. It offers 198 gigaflops of single precision (SP) floating point performance or 70 gigaflops in double precision. That includes the DSP floating point as well as the Neon FP unit in the ARM CPU.

Although, this ARM-DSP SoC represents only about half the FLOPS of a high-end x86 CPU, the TI chip delivers this in about one-tenth the power – 13 to 14 watts. For single precision, that works out to about 16 SP gigaflops per watt, which is about the same as last year’s stand-alone 8-core DSP chip, sans CPU. It’s also nearly as good as latest NVIDIA’s K10 Tesla part, which delivers about 20 SP gigaflops per watt.

Since the ARM CPU is 32-bit architecture, memory reach for these chips is limited. In fact, each SoC can only access up to 16 GB – not much compared to standard x86 CPU, but about twice as much as a traditional accelerator. The hetero chips, though, don’t need an external CPU to feed it, as the K10 does; the on-chip ARM serves as the host driver. This eliminates the PCIe communication overhead of a CPU hooked to an discrete accelerator.

And since the ARM and DSP units share some of the same memory, it can at least potentially simplify programming of these devices. In that sense, it’s closer to AMD’s Fusion (or APU) architecture, which glues an x86 CPU and GPU onto the same die. At this point though, the AMD offerings are being targeted for client devices, such as laptops, rather than servers.

TI is actually not making so much of a distinction in where their chips will end up. According to Arnon Friedmann, TI’s business manager for the multicore processors unit, the same SoCs targeted for servers could also be applied to embedded devices. For example, a sensor network of cameras doing video surveillance could use an ARM-DSP chip to do some local image processing; the output of which could then be shunted to a server farm of these same chips to perform deeper analytics on the pre-processed video.

“That’s a level of scalability that we think our devices bring, which others in HPC don’t offer today,” Friedmann told HPCwire. “So if you look at NVIDIA [GPUs] and Intel MIC, there really aren’t cut-down versions of these really high performance devices and they’re not quite as geared for embedded as we are.”

For HPC-type developers, TI offers both OpenMP and MPI. The chipmaker also has an alpha version of OpenCL that supports an ARM CPU that can work in conjunction with the on-chip DSP. Down the road, TI is looking to support the newly hatched OpenMP accelerator directives, which are expected to be officially codified in the standard sometime next year.

As with the other accelerators from NVIDIA, Intel and AMD vying for HPC business, the success of the TI parts will depend upon how easy they are to program and how much application performance ensues. Regarding the latter, there is already some encouraging news. According to Friedmann, an FFT kernel from an aperture radar code produced performance on par with that of a GPU, but when they moved the entire application to the chip, performance was boosted 8-fold. Friedmann says interested parties are looking to do similar ports for even larger applications.

Right now, the chipmaker is trying to bring in more HPC users to move their MPI codes over to their ARM-DSP SoCs in order to drum up interest from server makers to build hardware. In the meantime, for do-it-yourselfers, TI’s two SoCs aimed at HPC are available for sampling now. Broader availability is expected in the first quarter of 2013, with general availability of evaluation modules coming in the second quarter.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Is Data Science the Fourth Pillar of the Scientific Method?

April 18, 2019

Nvidia CEO Jensen Huang revived a decade-old debate last month when he said that modern data science (AI plus HPC) has become the fourth pillar of the scientific method. While some disagree with the notion that statistic Read more…

By Alex Woodie

At ASF 2019: The Virtuous Circle of Big Data, AI and HPC

April 18, 2019

We've entered a new phase in IT -- in the world, really -- where the combination of big data, artificial intelligence, and high performance computing is pushing the bounds of what's possible in business and science, in w Read more…

By Alex Woodie with Doug Black and Tiffany Trader

Google Open Sources TensorFlow Version of MorphNet DL Tool

April 18, 2019

Designing optimum deep neural networks remains a non-trivial exercise. “Given the large search space of possible architectures, designing a network from scratch for your specific application can be prohibitively expens Read more…

By John Russell

HPE Extreme Performance Solutions

HPE and Intel® Omni-Path Architecture: How to Power a Cloud

Learn how HPE and Intel® Omni-Path Architecture provide critical infrastructure for leading Nordic HPC provider’s HPCFLOW cloud service.

powercloud_blog.jpgFor decades, HPE has been at the forefront of high-performance computing, and we’ve powered some of the fastest and most robust supercomputers in the world. Read more…

IBM Accelerated Insights

Bridging HPC and Cloud Native Development with Kubernetes

The HPC community has historically developed its own specialized software stack including schedulers, filesystems, developer tools, container technologies tuned for performance and large-scale on-premises deployments. Read more…

Interview with 2019 Person to Watch Michela Taufer

April 18, 2019

Today, as part of our ongoing HPCwire People to Watch focus series, we are highlighting our interview with 2019 Person to Watch Michela Taufer. Michela -- the General Chair of SC19 -- is an ACM Distinguished Scientist. Read more…

By HPCwire Editorial Team

At ASF 2019: The Virtuous Circle of Big Data, AI and HPC

April 18, 2019

We've entered a new phase in IT -- in the world, really -- where the combination of big data, artificial intelligence, and high performance computing is pushing Read more…

By Alex Woodie with Doug Black and Tiffany Trader

Intel Gold U-Series SKUs Reveal Single Socket Intentions

April 18, 2019

Intel plans to jump into the single socket market with a portion of its just announced Cascade Lake microprocessor line according to one media report. This isn Read more…

By John Russell

BSC Researchers Shrink Floating Point Formats to Accelerate Deep Neural Network Training

April 15, 2019

Sometimes calculating solutions as precisely as a computer can wastes more CPU resources than is necessary. A case in point is with deep learning. In early stag Read more…

By Ken Strandberg

Intel Extends FPGA Ecosystem with 10nm Agilex

April 11, 2019

The insatiable appetite for higher throughput and lower latency – particularly where edge analytics and AI, network functions, or for a range of datacenter ac Read more…

By Doug Black

Nvidia Doubles Down on Medical AI

April 9, 2019

Nvidia is collaborating with medical groups to push GPU-powered AI tools into clinical settings, including radiology and drug discovery. The GPU leader said Monday it will collaborate with the American College of Radiology (ACR) to provide clinicians with its Clara AI tool kit. The partnership would allow radiologists to leverage AI techniques for diagnostic imaging using their own clinical data. Read more…

By George Leopold

Digging into MLPerf Benchmark Suite to Inform AI Infrastructure Decisions

April 9, 2019

With machine learning and deep learning storming into the datacenter, the new challenge is optimizing infrastructure choices to support diverse ML and DL workfl Read more…

By John Russell

AI and Enterprise Datacenters Boost HPC Server Revenues Past Expectations – Hyperion

April 9, 2019

Building on the big year of 2017 and spurred in part by the convergence of AI and HPC, global revenue for high performance servers jumped 15.6 percent last year Read more…

By Doug Black

Intel Launches Cascade Lake Xeons with Up to 56 Cores

April 2, 2019

At Intel's Data-Centric Innovation Day in San Francisco (April 2), the company unveiled its second-generation Xeon Scalable (Cascade Lake) family and debuted it Read more…

By Tiffany Trader

The Case Against ‘The Case Against Quantum Computing’

January 9, 2019

It’s not easy to be a physicist. Richard Feynman (basically the Jimi Hendrix of physicists) once said: “The first principle is that you must not fool yourse Read more…

By Ben Criger

Why Nvidia Bought Mellanox: ‘Future Datacenters Will Be…Like High Performance Computers’

March 14, 2019

“Future datacenters of all kinds will be built like high performance computers,” said Nvidia CEO Jensen Huang during a phone briefing on Monday after Nvidia revealed scooping up the high performance networking company Mellanox for $6.9 billion. Read more…

By Tiffany Trader

ClusterVision in Bankruptcy, Fate Uncertain

February 13, 2019

ClusterVision, European HPC specialists that have built and installed over 20 Top500-ranked systems in their nearly 17-year history, appear to be in the midst o Read more…

By Tiffany Trader

Intel Reportedly in $6B Bid for Mellanox

January 30, 2019

The latest rumors and reports around an acquisition of Mellanox focus on Intel, which has reportedly offered a $6 billion bid for the high performance interconn Read more…

By Doug Black

It’s Official: Aurora on Track to Be First US Exascale Computer in 2021

March 18, 2019

The U.S. Department of Energy along with Intel and Cray confirmed today that an Intel/Cray supercomputer, "Aurora," capable of sustained performance of one exaf Read more…

By Tiffany Trader

Looking for Light Reading? NSF-backed ‘Comic Books’ Tackle Quantum Computing

January 28, 2019

Still baffled by quantum computing? How about turning to comic books (graphic novels for the well-read among you) for some clarity and a little humor on QC. The Read more…

By John Russell

IBM Quantum Update: Q System One Launch, New Collaborators, and QC Center Plans

January 10, 2019

IBM made three significant quantum computing announcements at CES this week. One was introduction of IBM Q System One; it’s really the integration of IBM’s Read more…

By John Russell

Deep500: ETH Researchers Introduce New Deep Learning Benchmark for HPC

February 5, 2019

ETH researchers have developed a new deep learning benchmarking environment – Deep500 – they say is “the first distributed and reproducible benchmarking s Read more…

By John Russell

Leading Solution Providers

SC 18 Virtual Booth Video Tour

Advania @ SC18 AMD @ SC18
ASRock Rack @ SC18
DDN Storage @ SC18
HPE @ SC18
IBM @ SC18
Lenovo @ SC18 Mellanox Technologies @ SC18
One Stop Systems @ SC18
Oracle @ SC18 Panasas @ SC18
Supermicro @ SC18 SUSE @ SC18 TYAN @ SC18
Verne Global @ SC18

IBM Bets $2B Seeking 1000X AI Hardware Performance Boost

February 7, 2019

For now, AI systems are mostly machine learning-based and “narrow” – powerful as they are by today's standards, they're limited to performing a few, narro Read more…

By Doug Black

The Deep500 – Researchers Tackle an HPC Benchmark for Deep Learning

January 7, 2019

How do you know if an HPC system, particularly a larger-scale system, is well-suited for deep learning workloads? Today, that’s not an easy question to answer Read more…

By John Russell

Arm Unveils Neoverse N1 Platform with up to 128-Cores

February 20, 2019

Following on its Neoverse roadmap announcement last October, Arm today revealed its next-gen Neoverse microarchitecture with compute and throughput-optimized si Read more…

By Tiffany Trader

France to Deploy AI-Focused Supercomputer: Jean Zay

January 22, 2019

HPE announced today that it won the contract to build a supercomputer that will drive France’s AI and HPC efforts. The computer will be part of GENCI, the Fre Read more…

By Tiffany Trader

Intel Launches Cascade Lake Xeons with Up to 56 Cores

April 2, 2019

At Intel's Data-Centric Innovation Day in San Francisco (April 2), the company unveiled its second-generation Xeon Scalable (Cascade Lake) family and debuted it Read more…

By Tiffany Trader

Microsoft to Buy Mellanox?

December 20, 2018

Networking equipment powerhouse Mellanox could be an acquisition target by Microsoft, according to a published report in an Israeli financial publication. Microsoft has reportedly gone so far as to engage Goldman Sachs to handle negotiations with Mellanox. Read more…

By Doug Black

HPC Reflections and (Mostly Hopeful) Predictions

December 19, 2018

So much ‘spaghetti’ gets tossed on walls by the technology community (vendors and researchers) to see what sticks that it is often difficult to peer through Read more…

By John Russell

Oil and Gas Supercloud Clears Out Remaining Knights Landing Inventory: All 38,000 Wafers

March 13, 2019

The McCloud HPC service being built by Australia’s DownUnder GeoSolutions (DUG) outside Houston is set to become the largest oil and gas cloud in the world th Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This