The New Breed of Accelerators from NVIDIA, Intel and AMD Square Off

By Michael Feldman

December 6, 2012

With the recent introduction of Intel’s first Xeon Phi coprocessors, NVIDIA’s latest Kepler GPUs, and AMD’s new FirePro S10000 graphics cards, the competition for HPC chip componentry has entered a new phase. The three chipmakers have taken somewhat different paths, though, and it will be up to the market to decide which vendor’s approach will win the day.

It is tempting to think that there might be room for all three accelerator designs in the market, but as it stands today that’s unlikely. The HPC space is too small and homogeneous to support that much architectural diversity. Just consider how the CPU side has, for the most part, consolidated to a single ISA (the x86), and to a large degree, a single vendor (Intel). While there may be a case to be made that these accelerators can offer different advantages for different applications, in their current incarnation they all are built principally as vector accelerators for CPU hosts.

That implies that the chip design that does that best, that is, delivers the most application FLOPS per dollar and per watt, will be the HPC consumer’s top choice – unless you believe that one or the other of these platforms will be substantially easier to program than the others. We’ll get to that particular aspect in a moment.

First though, it’s worthwhile just looking at the specs for the three accelerators. All of them offer teraflop-plus double precision performance with several gigabytes of ECC memory, but not all with the same power draw. And it’s the performance-per-watt that is most likely to become the driving criteria for many HPC users as they try to squeeze maximum FLOPS from a static datacenter power supply.

The NVIDIA Tesla K20X is the one to beat in this regard. It offers 1.3 teraflops in a 235 watt package – so 5.6 gigaflops/watt. Intel’s new “Knights Corner” Xeon Phi, the 5110P, delivers 1.011 teraflops with a TDP of 225 watts, which works out to 4.5 gigaflops/watt. The AMD FirePro S10000 card that sports two “Tahiti” GPUs, is rated at 1.48 teraflops. But the FirePro draws 375 watts, so its 3.9 gigaflops/watt is actually the lowest of the bunch.

The FirePro does somewhat better in the single precision FP department, delivering 15.8 gigaflops/watt to the K20X’s 16.8 gigaflops/watt and the 5110P’s 9.0 gigaflops/watt (estimated). But if you’re really focused on single precision performance, the go-to device is the NVIDIA K10, which delivers over 20 gigaflops/watt.

Memory-wise, the Intel 5110P is tops with 8 GB and 320 GB/sec of bandwidth. The K20X is supplied with 6 GB and 250 GB/sec, so less capacity, but with roughly the same bandwidth per byte. The new FirePro is also equipped with 6 GB, but at 450 GB/sec, offers considerably more bandwidth. That’s all with ECC turned off, though, so your actual mileage will vary depending on the error correction smarts on each of these platforms.

It’s not surprising that NVIDIA’s silicon specs out so well here. They’ve been the dominant player in the accelerator business for the last several years and have spent a lot of time designing the devices for this role. But the hardware alone will not be the sole determinant. Porting applications to these accelerators and getting them to draw on those abundant FLOPS will be the biggest challenge.

It is here that Intel believes it has an advantage. The company’s line has been that existing programs, using just standard MPI and OpenMP as the framework for parallelism, will port to the Xeon Phi platform with a simple recompile and link. And while that’s true, that doesn’t necessarily guarantee good performance. In fact, it is more than likely that porting applications that lend themselves to vector acceleration on Xeon Phi will have to be modified in ways not so different than what is done for GPUs – namely splitting the code across the CPU and accelerator, such that performance is optimized across the serial and parallel parts of the application.

Until there are a number of well-known HPC applications running on the Xeon Phi, proof of easy porting with impressive performance are just claims. And in any case, OpenMP’s new accelerator directives are supposed to level the software playing field across all these platforms – at least with regard to a standard high-level software framework. As of today, though, that standard has not been ratified and it’s not clear if GPUs will be supported adequately on the initial go-around, which, given the current accelerator landscape, sort of defeats the purpose for a hardware-independent API.

This is just the beginning of the accelerator era of high performance computing, or perhaps more accurately, the end of the beginning. Especially with Intel’s entrance into the space, the accelerator model for high performance computing has been legitimized in a way that NVIDIA could not have done on its own. And while accelerators are not the be-all and end-all of HPC, right now they are driving much of the rapid performance gains we see in the industry.

That means the stakes are high for all three vendors. Whoever comes out on top is likely to establish itself as the dominant supercomputing chipmaker for the latter half of the petascale era and the first part of the exascale era, when the technology will almost certainly be integrated into the CPU die. With Intel, NVIDIA and AMD now focusing more interest in their accelerator lines, we’re apt to see an even more rapid evolution of the hardware and the software.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

SRC Spends $200M on University Research Centers

January 16, 2018

The Semiconductor Research Corporation, as part of its JUMP initiative, has awarded $200 million to fund six research centers whose areas of focus span cognitive computing, memory-centric computing, high-speed communicat Read more…

By John Russell

US Seeks to Automate Video Analysis

January 16, 2018

U.S. military and intelligence agencies continue to look for new ways to use artificial intelligence to sift through huge amounts of video imagery in hopes of freeing analysts to identify threats and otherwise put their Read more…

By George Leopold

URISC@SC17 and the #LongestLastMile

January 11, 2018

A multinational delegation recently attended the Understanding Risk in Shared CyberEcosystems workshop, or URISC@SC17, in Denver, Colorado. URISC participants and presenters from 11 countries, including eight African nations, 12 U.S. states, Canada, India and Nepal, also attended SC17, the annual international conference for high performance computing, networking, storage and analysis that drew nearly 13,000 attendees. Read more…

By Elizabeth Leake, STEM-Trek Nonprofit

HPE Extreme Performance Solutions

HPE and NREL Take Steps to Create a Sustainable, Energy-Efficient Data Center with an H2 Fuel Cell

As enterprises attempt to manage rising volumes of data, unplanned data center outages are becoming more common and more expensive. As the cost of downtime rises, enterprises lose out on productivity and valuable competitive advantage without access to their critical data. Read more…

When the Chips Are Down

January 11, 2018

In the last article, "The High Stakes Semiconductor Game that Drives HPC Diversity," I alluded to the challenges facing the semiconductor industry and how that may impact the evolution of HPC systems over the next few years. I thought I’d lift the covers a little and look at some of the commercial challenges that impact the component technology we use in HPC. Read more…

By Dairsie Latimer

SRC Spends $200M on University Research Centers

January 16, 2018

The Semiconductor Research Corporation, as part of its JUMP initiative, has awarded $200 million to fund six research centers whose areas of focus span cognitiv Read more…

By John Russell

When the Chips Are Down

January 11, 2018

In the last article, "The High Stakes Semiconductor Game that Drives HPC Diversity," I alluded to the challenges facing the semiconductor industry and how that may impact the evolution of HPC systems over the next few years. I thought I’d lift the covers a little and look at some of the commercial challenges that impact the component technology we use in HPC. Read more…

By Dairsie Latimer

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

Momentum Builds for US Exascale

January 9, 2018

2018 looks to be a great year for the U.S. exascale program. The last several months of 2017 revealed a number of important developments that help put the U.S. Read more…

By Alex R. Larzelere

ANL’s Rick Stevens on CANDLE, ARM, Quantum, and More

January 8, 2018

Late last year HPCwire caught up with Rick Stevens, associate laboratory director for computing, environment and life Sciences at Argonne National Laboratory, f Read more…

By John Russell

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

The @hpcnotes Predictions for HPC in 2018

January 4, 2018

I’m not averse to making predictions about the world of High Performance Computing (and Supercomputing, Cloud, etc.) in person at conferences, meetings, causa Read more…

By Andrew Jones

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

GlobalFoundries Puts Wind in AMD’s Sails with 12nm FinFET

September 24, 2017

From its annual tech conference last week (Sept. 20), where GlobalFoundries welcomed more than 600 semiconductor professionals (reaching the Santa Clara venue Read more…

By Tiffany Trader

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Leading Solution Providers

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

Nvidia, Partners Announce Several V100 Servers

September 27, 2017

Here come the Volta 100-based servers. Nvidia today announced an impressive line-up of servers from major partners – Dell EMC, Hewlett Packard Enterprise, IBM Read more…

By John Russell

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

  • arrow
  • Click Here for More Headlines
  • arrow
Share This