Micron Readies Hybrid Memory Cube for Debut

By Tiffany Trader

January 17, 2013

The next-generation memory-maker Micron Technology was one of the many innovative companies demonstrating its wares on the Supercomputing Conference (SC12) show floor last November. Micron’s General Manager of Hybrid Technology Scott Graham was on hand to discuss the latest developments in their Hybrid Memory Cube (HMC) technology, a multi-chip module (MCM) that aims to address one of the biggest challenges in high performance computing: scaling the memory wall.

Memory architectures haven’t kept pace with the bandwidth requirements of multicore processors. As microprocessor speeds out-accelerated DRAM memory speeds, a bottleneck developed that is referred to as the memory wall. Stacked memory applications, however, enable higher memory bandwidth.

The Hybrid Memory Cube (HMC) is a new memory architecture that combines a high-speed logic layer with a stack of through-silicon-via (TSV) bonded memory die that enables impressive advantages over current technology. According to company figures, a single HMC offers a 15x performance increase and uses 70 percent less energy per bit when compared to DDR3 memory, and takes up 90 percent less space than today’s RDIMMs. The Cube is also scalable per application, which is not possible with DDR3 and DDR4. System designers have the option of employing the HMC as near memory for best performance or in a scalable module form factor, as far memory, for optimum power efficiency.

Micron HMC demo
Micron HMC demo at SC12 – screen shot

This is a huge leap forward from a technology perspective, noted Graham, compared to DDRx and other boutique memory products that are out there.

As HPCwire editor Michael Feldman explained in an earlier review of the technology:

The speedup and better energy efficiency is achieved principally through parallelism. Because the memory chips are stacked, there is more space for I/O pins through the TSVs. Thus each DRAM can be accessed with more (and/or wider) channels. The end result is that the controller can access many more banks of memory concurrently than can be accomplished with a two-dimensional DIMM. And because the controller and DRAM chips are in close proximity, latencies can be extremely low.

Judging by the degree and caliber of community involvement, Micron’s HMC technology represents a real breakthrough in how memory is used. In October 2011, Micron together with Samsung Electronics Co., Ltd., formed the Hybrid Memory Cube Consortium, tasked with developing an open industry standard that facilitates HMC integration into a wide variety of systems, platforms and applications.

The consortium is managed by a group of ten developers (Altera, ARM, HP, IBM, Micron, Microsoft, Open Silicon, Samsung, SK Hynix, and Xilinx), which have equal voting power on the final specification, along with an additional 75 adopters. The members are currently reviewing a draft specification, scheduled to be released next month, that details the communication interface between the Cube and the processor – CPU or GPU or FPGA.

Speaking to the initial set of targeted applications, the driving body notes that the “Hybrid Memory Cube represents the key to extending network system performance to push through the challenges of new 100G and 400G infrastructure growth. Eventually, HMC will drive exascale CPU system performance growth for next generation HPC systems.”

Companies are eager to get their hands on this product and Micron is working with an aggressive roadmap to meet that demand, Graham told HPCwire. The Gen1 demo, on display at SC12, was real silicon, and engineering samples for the Gen2 device are due out this summer. If all goes as planned, the Hybrid Memory Cube will be in full production at the end of this year or early 2014. In fact, contracts are already in place for the 2014 timeframe.

Hybrid Memory Cube demo
Side shot of the HMC demo at SC12. The actual Cube is on the far corner of the board.

High-speed networking vendors have signed up for the first productized version – with an HPC-centric product not far behind. Micron was not at liberty to identify these initial customers, but a look at the list of consortium partners turns up candidates like Lawrence Livermore, Cray, NEC, and T-Platforms.

The first couple of HMC implementations will be straight DRAM, but Micron and others are researching alternative memory combinations, for example multi-memory stacks that employ NAND flash and DRAM.

“There are all kinds of things you can do within the logic layer to pull different types of functionality, that are maybe off-chip today, into the logic layer and innovate further, with more functionality, better performance, and lower energy,” noted Graham.

Micron is framing this as an aggressive technology, emphasizing that this is the first time that all three of the largest memory makers (Micron, Samsung, and presumably SK Hynix) have teamed up.

“All of the memory manufacturers face the same challenge of being able to scale beyond 20nm, so we’re all coming up to even a bigger memory wall eventually,” explained Graham “Beyond 20nm, you’re going to have to move to some kind of management layer in order to continue with DRAM technology.”

The logic layer developed for the Cube allows for different flavors of technology – like spin-torque, memristor and others – to extend the viability of DRAM memory. “This means we can be really innovative with different types of cell technology and process technology so we can bring a more standard memory into the marketplace without these major shifts,” said Graham.

According to the Micron rep, they’ve also seen interest from companies outside the consortium. Most notably absent from the member roster are AMD and Intel, but that by no means implies a lack of involvement. Intel, for its part, demonstrated a prototype HMC device during the fall Intel Developer Forum in September 2011, deeming it the fastest and most efficient DRAM ever built. As Graham put it, these companies have opted not to be involved in the open standard in order to develop their own way of using the technology.

Still a year away from production, pricing for Cube products has not been announced, but early adopters should expect to pay a premium for the benefits of increased performance, power efficiency and space savings. The exascale community, in particular, will be paying close attention. If they’re to realize their goal of a 10^18 FLOPS machine within a 20MW power envelope, they’ll need all the help they can get.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

The EU Human Brain Project Reboots but Supercomputing Still Needed

June 26, 2017

The often contentious, EU-funded Human Brain Project whose initial aim was fixed firmly on full-brain simulation is now in the midst of a reboot targeting a more modest goal – development of informatics tools and data/ Read more…

By John Russell

DOE Launches Chicago Quantum Exchange

June 26, 2017

While many of us were preoccupied with ISC 2017 last week, the launch of the Chicago Quantum Exchange went largely unnoticed. So what is such a thing? It is a Department of Energy sponsored collaboration between the Univ Read more…

By John Russell

UMass Dartmouth Reports on HPC Day 2017 Activities

June 26, 2017

UMass Dartmouth's Center for Scientific Computing & Visualization Research (CSCVR) organized and hosted the third annual "HPC Day 2017" on May 25th. This annual event showcases on-going scientific research in Massach Read more…

By Gaurav Khanna

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “pre-exascale” award), parsed out additional information ab Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Creating a Roadmap for HPC Innovation at ISC 2017

In an era where technological advancements are driving innovation to every sector, and powering major economic and scientific breakthroughs, high performance computing (HPC) is crucial to tackle the challenges of today and tomorrow. Read more…

Tsinghua Crowned Eight-Time Student Cluster Champions at ISC

June 22, 2017

Always a hard-fought competition, the Student Cluster Competition awards were announced Wednesday, June 21, at the ISC High Performance Conference 2017. Amid whoops and hollers from the crowd, Thomas Sterling presented t Read more…

By Kim McMahon

GPUs, Power9, Figure Prominently in IBM’s Bet on Weather Forecasting

June 22, 2017

IBM jumped into the weather forecasting business roughly a year and a half ago by purchasing The Weather Company. This week at ISC 2017, Big Blue rolled out plans to push deeper into climate science and develop more gran Read more…

By John Russell

Intersect 360 at ISC: HPC Industry at $44B by 2021

June 22, 2017

The care, feeding and sustained growth of the HPC industry increasingly is in the hands of the commercial market sector – in particular, it’s the hyperscale companies and their embrace of AI and deep learning – tha Read more…

By Doug Black

At ISC – Goh on Go: Humans Can’t Scale, the Data-Centric Learning Machine Can

June 22, 2017

I've seen the future this week at ISC, it’s on display in prototype or Powerpoint form, and it’s going to dumbfound you. The future is an AI neural network designed to emulate and compete with the human brain. In thi Read more…

By Doug Black

DOE Launches Chicago Quantum Exchange

June 26, 2017

While many of us were preoccupied with ISC 2017 last week, the launch of the Chicago Quantum Exchange went largely unnoticed. So what is such a thing? It is a D Read more…

By John Russell

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Tsinghua Crowned Eight-Time Student Cluster Champions at ISC

June 22, 2017

Always a hard-fought competition, the Student Cluster Competition awards were announced Wednesday, June 21, at the ISC High Performance Conference 2017. Amid wh Read more…

By Kim McMahon

GPUs, Power9, Figure Prominently in IBM’s Bet on Weather Forecasting

June 22, 2017

IBM jumped into the weather forecasting business roughly a year and a half ago by purchasing The Weather Company. This week at ISC 2017, Big Blue rolled out pla Read more…

By John Russell

Intersect 360 at ISC: HPC Industry at $44B by 2021

June 22, 2017

The care, feeding and sustained growth of the HPC industry increasingly is in the hands of the commercial market sector – in particular, it’s the hyperscale Read more…

By Doug Black

At ISC – Goh on Go: Humans Can’t Scale, the Data-Centric Learning Machine Can

June 22, 2017

I've seen the future this week at ISC, it’s on display in prototype or Powerpoint form, and it’s going to dumbfound you. The future is an AI neural network Read more…

By Doug Black

Cray Brings AI and HPC Together on Flagship Supers

June 20, 2017

Cray took one more step toward the convergence of big data and high performance computing (HPC) today when it announced that it’s adding a full suite of big d Read more…

By Alex Woodie

AMD Charges Back into the Datacenter and HPC Workflows with EPYC Processor

June 20, 2017

AMD is charging back into the enterprise datacenter and select HPC workflows with its new EPYC 7000 processor line, code-named Naples, announced today at a “g Read more…

By John Russell

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

US Supercomputing Leaders Tackle the China Question

March 15, 2017

Joint DOE-NSA report responds to the increased global pressures impacting the competitiveness of U.S. supercomputing. Read more…

By Tiffany Trader

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of “quantum supremacy,” researchers are stretching the limits of today’s most advanced supercomputers. Read more…

By Tiffany Trader

Messina Update: The US Path to Exascale in 16 Slides

April 26, 2017

Paul Messina, director of the U.S. Exascale Computing Project, provided a wide-ranging review of ECP’s evolving plans last week at the HPC User Forum. Read more…

By John Russell

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This