The 5 Minute Guide to Parallel and Vector Software Programming

By Alex Woodie

June 10, 2013

Learning how to write parallel and vector HPC programs will take a lot longer than five minutes. But with a series of five-minute videos introduced this week, Intel’s director and parallel programming evangelist James Reinders gives prospective parallel and vector programmers an introduction to the tools and techniques they’ll use to write code for the chip giant’s latest processors and coprocessors.

The series will cover a different aspect of HPC programming every week for 12 weeks with the new series called The Five Minute Guide to Parallel and Vector Software Programming. New episodes will come out every Wednesday through the middle of August.

In the first episode, which is available now, Reinders discusses Intel’s vision for programming Intel’s Xeon processors and Xeon Phi coprocessors, the powerful new many integrated core chips that are making a big splash in the HPC community. New hardware always makes for big headlines, but for Reinders, the real story is Intel’s approach to the architecture as a whole, and the portability of skills and tools between X86 and the new Phi family.

“The most important [part of the story] is our vision in building the device,” he says in the first five-minute video, called “Coding the Future: Intel’s Vision.” “Our vision was to be able to span from a few cores to many cores in different systems and use the same programming models, the same programming languages, the same tools, and techniques across these.

“So whether you’re working on an Atom-based machine,” Reinders continues, “or a Xeon-based server or workstation, or whether you’re moving all the way up to Intel Xeon Phi coprocessors and computation capability, that you’re able to preserve the learning, the tools, the methods, the language and stay standards-based. And we’ve been quite successful with this.”

The second five minute guide, titled “Vectorization using Intel Cilk Plus Array Notation in C++/C,” comes out this Wednesday. David MacKay, Intel Software Development Products, will demonstrate how vectorized software using an array notation coding style that generates SIMD operations can yield big computational boosts on Xeon Phi coprocessors compared to scalar code.

Next Wednesday’s five minute guide will be called “Vectorization with Pragmas in Fortran and C++/C.” It will be followed by: 

  • “Data alignment for effective vectorization in Fortran and C++/C” on June 26;
  • “Faster math performance with Intel Math Kernel Library” on July 3;
  • “Automatic offload with Intel Math Kernel Library” on July 10;
  • “Threading with OpenMP” on July 17;
  • “Simplified threading with Intel Cilk Plus” on July 24;
  • “Threading with Intel Threading Building Blocks (when Intel Cilk Plus isn’t enough)” on July 31;
  • “Performance analysis with Intel VTune Amplifier XE” on August 7;
  • “Distributed Computing with Intel MPI Library” on August 14;
  • and “Balancing MPI Applications” on August 21.

You can view the first five minute guide and read more details about the future five minute guides at http://tci.taborcommunications.com/l/21812/2013-05-03/2bc3.

 

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HPC Programming in the Age of Multicore: One Man’s View

Facing the Challenges of a Parallel Future

Intel Xeon Phi Versus ‘Sandy Bridge’

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