Intel Hits Refresh on Datacenter Vision

By Nicole Hemsoth

July 26, 2013

This week we were on hand for Intel’s “Rearchitecting the Datacenter” event, which offered a glimpse into how the company imagines its future path along both low power and high performance server routes.

In addition to the announcement of key details around the Atom family and upcoming Avoton and Rangeley, and a general roadmap for the 14nm products expected to roll out in the next few years, the emphasis was on integration between hardware and software. From software defined storage and networks to the role of fabrics in typing together low and super-power cores, the company collected its strategy under a number of nets–one of which was HPC specifically.

While a great deal of the focus was on web-scale and enterprise datacenters, the company’s HPC lead, Raj Hazra, gave a detailed presentation about how new trends can push HPC into a greater “knowledge economy” and into more mainstream (beyond the “traditional” academic and government arenas) contexts.  

The recorded presentation reflects Hazra’s wider view of where Intel stands with its high performance computing strategy on a broad level, which was meant for the room’s more mainstream audience. To drill down on specifics, we spent some time chatting with him in more detail about the key concepts he outlined, including power, performance, neo-heterogeneity, integration and the future reach of Xeon Phi into the enterprise. 

Hazra emphasized the concept of Intel’s focus on “neo-heterogeneity” in his discussion of where HPC fits into Intel’s larger datacenter strategy going forward. As he defined, this refers to making a new approach to heterogeneity possibly by taking advantage of hardware that’s been designed for different performance (and performance per watt) but which looks unified on the programmer’s side.  

The ROI here, he explains, is in providing the capability for users to quickly and easily port an application and then contend about the much longer process of optimization. For users waiting on the long port times to discrete GPUs, he says, it’s a risk as the speedups may or may not be present.

With Xeon Phi, however, he stresses, there is little risk in porting and “trying out” the approach and the optimization process is usually shorter than with GPUs and users find that in the process their codes are optimized for general Xeon as they go. While we’re still on the lookout for a breakdown of some common application types and their GPU to co-processor optimization times (not port–Intel has that time cut down considerably) this does reflect what we’ve heard from Phi and GPU users at TACC, among other centers.

The real test in the coming years for Phi’s reach outside of the government and academic sites is when the ISV community gets behind the co-processor. The initial users in academia and elsewhere generally write their own codes and aren’t reliant on the internal processes of ISV approval and tuning. Once a wide range of commercial codes are conditioned to take advantage of any potential performance benefits, the market for Xeon Phi will be quite large, Hazra anticipates.

And certainly, as with the other items on Intel’s roadmap, the focus is not on niches–it’s on reaching every segment of the server market via ultra-low power approaches fed by developments on the Atom family side all the way up to Phi. The company stressed this week its role in bringing software-defined networking, storage and more integrated compute capabilities to all market segments–and HPC is no exception.

The integration value coming from Intel on this side will be felt when the interconnect assets they’ve pulled in from QLogic and Cray come to bear. On this topic, Hazra says Intel is focused on having a discrete network solution wherein they integrate the network interface control on the processors. From there, he says, “we’ll innovate on what that integrated version is to be able to improve performance, lower power and add features to it so it addresses next-gen programming models.”

In terms of the role of QLogic in particular, he notes, “our goal, and we’re engaged in building the next gen products with integrated fabric and this has to cover the gamut, from high-end HPC to midrange and to the enterprise.”

As one might imagine, the HPC flavor on the Top 500 and academic side was more muted in favor of putting high-end processor technology in greater enterprise context during this general datacenter event. However, the one key topic that tied HPC to the rest of the strategy outline is how the technologies developed in this community can feed a much wider set of general enterprise applications and server approaches. Hazra agreed that big data is indeed a prime way for his HPC group to extend outward, noting that as analytics evolve, the need to blend high performance computing developments (and in general, the role of more robust hardware) with these new algorithms will open up new opportunities.

Big data and, of course, the range of scientific and research applications, are all stoking HPC investments on Intel’s side, Hazra side. Unlike AMD’s recent statement that HPC is relatively low margin, he stressed Intel’s investment in it with a focus on longer-term goals. “The paradigm is that we are going to be continuing to improve compute capacity. Manycore is the way forward.  We are investing in it, but the world is still on multicore. Still we’re starting to see leading edges of  applications and algorithms that are going to manycore and we expect that to be the way applications s of the future are built so we have to move now instead of being reactive.”

As the company’s senior VP and General Manager of the Datacenter and Connected Systems Group, Diane Bryant, stressed repeatedly, there are converging forces (cloud and big data in particular) that require tighter integration at the storage, network and rack levels. She outlined the company’s Rack Scale Architecture (RSA) which pushes utilization and flexibility for cloud datacenters in particular, and played up the role of low-power, ultra-dense servers for a future that doesn’t just include cloud datacenters or small devices.

Hazra echoed the value of this move, noting that HPC is also diversifying. He says that while the majority of HPC remains under carefully engineered co-design there is no doubt that certain segments of HPC that share the characteristics of low energy scale-out (life sciences, algorithms and apps that fit that scale-out highly dense, low power pattern) represent a trend of overall diversification of system architecture. “It’s the beginning of a curve,” he says, “and Intel wants to be responsive and not reactive.”

We asked Hazra whether or not this steady march to lower power and higher density marks a death of the server industry as we know it, in part because of the event’s emphasis on Open Compute inspired designs and approaches. “I don’t know if it’s a death or rebirth,” he says, but “the open projects bring like minds together and provide a scaffolding to build greater things.” He says that questions about sea changes in the server businesses this aren’t unfamiliar..”In the HPC space at one point, many said the Beowulf clusters would kill HPC, but look at the tremendous amounts of differentiation.”

And that’s just what Intel wants to architect into their strategy–a base that extends across it’s ultra-low power lines all the way up to Phi–and one that lets the OEMs differentiate to create value and differentiation as the lines between what chipmakers traditionally do (and do not do) are blurred.

 

 

 

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurr Read more…

By Doug Black

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Nvidia CEO Predicts AI ‘Cambrian Explosion’

May 25, 2017

The processing power and cloud access to developer tools used to train machine-learning models are making artificial intelligence ubiquitous across computing pl Read more…

By George Leopold

PGAS Use will Rise on New H/W Trends, Says Reinders

May 25, 2017

If you have not already tried using PGAS, it is time to consider adding PGAS to the programming techniques you know. Partitioned Global Array Space, commonly kn Read more…

By James Reinders

HPE Extreme Performance Solutions

Exploring the Three Models of Remote Visualization

The explosion of data and advancement of digital technologies are dramatically changing the way many companies do business. With the help of high performance computing (HPC) solutions and data analytics platforms, manufacturers are developing products faster, healthcare providers are improving patient care, and energy companies are improving planning, exploration, and production. Read more…

Exascale Escapes 2018 Budget Axe; Rest of Science Suffers

May 23, 2017

President Trump's proposed $4.1 trillion FY 2018 budget is good for U.S. exascale computing development, but grim for the rest of science and technology spend Read more…

By Tiffany Trader

Hedge Funds (with Supercomputing help) Rank First Among Investors

May 22, 2017

In case you didn’t know, The Quants Run Wall Street Now, or so says a headline in today’s Wall Street Journal. Quant-run hedge funds now control the largest Read more…

By John Russell

IBM, D-Wave Report Quantum Computing Advances

May 18, 2017

IBM said this week it has built and tested a pair of quantum computing processors, including a prototype of a commercial version. That progress follows an an Read more…

By George Leopold

PRACEdays 2017 Wraps Up in Barcelona

May 18, 2017

Barcelona has been absolutely lovely; the weather, the food, the people. I am, sadly, finishing my last day at PRACEdays 2017 with two sessions: an in-depth loo Read more…

By Kim McMahon

PGAS Use will Rise on New H/W Trends, Says Reinders

May 25, 2017

If you have not already tried using PGAS, it is time to consider adding PGAS to the programming techniques you know. Partitioned Global Array Space, commonly kn Read more…

By James Reinders

Exascale Escapes 2018 Budget Axe; Rest of Science Suffers

May 23, 2017

President Trump's proposed $4.1 trillion FY 2018 budget is good for U.S. exascale computing development, but grim for the rest of science and technology spend Read more…

By Tiffany Trader

Cray Offers Supercomputing as a Service, Targets Biotechs First

May 16, 2017

Leading supercomputer vendor Cray and datacenter/cloud provider the Markley Group today announced plans to jointly deliver supercomputing as a service. The init Read more…

By John Russell

HPE’s Memory-centric The Machine Coming into View, Opens ARMs to 3rd-party Developers

May 16, 2017

Announced three years ago, HPE’s The Machine is said to be the largest R&D program in the venerable company’s history, one that could be progressing tow Read more…

By Doug Black

What’s Up with Hyperion as It Transitions From IDC?

May 15, 2017

If you’re wondering what’s happening with Hyperion Research – formerly the IDC HPC group – apparently you are not alone, says Steve Conway, now senior V Read more…

By John Russell

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

HPE Launches Servers, Services, and Collaboration at GTC

May 10, 2017

Hewlett Packard Enterprise (HPE) today launched a new liquid cooled GPU-driven Apollo platform based on SGI ICE architecture, a new collaboration with NVIDIA, a Read more…

By John Russell

IBM PowerAI Tools Aim to Ease Deep Learning Data Prep, Shorten Training 

May 10, 2017

A new set of GPU-powered AI software announced by IBM today brings automation to many of the tedious, time consuming and complex aspects of AI project on-rampin Read more…

By Doug Black

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Last week, Google reported that its custom ASIC Tensor Processing Unit (TPU) was 15-30x faster for inferencing workloads than Nvidia's K80 GPU (see our coverage Read more…

By Tiffany Trader

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

Since our first formal product releases of OSPRay and OpenSWR libraries in 2016, CPU-based Software Defined Visualization (SDVis) has achieved wide-spread adopt Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

TSUBAME3.0 Points to Future HPE Pascal-NVLink-OPA Server

February 17, 2017

Since our initial coverage of the TSUBAME3.0 supercomputer yesterday, more details have come to light on this innovative project. Of particular interest is a ne Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Leading Solution Providers

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is Read more…

By Tiffany Trader

Tokyo Tech’s TSUBAME3.0 Will Be First HPE-SGI Super

February 16, 2017

In a press event Friday afternoon local time in Japan, Tokyo Institute of Technology (Tokyo Tech) announced its plans for the TSUBAME3.0 supercomputer, which w Read more…

By Tiffany Trader

Is Liquid Cooling Ready to Go Mainstream?

February 13, 2017

Lost in the frenzy of SC16 was a substantial rise in the number of vendors showing server oriented liquid cooling technologies. Three decades ago liquid cooling Read more…

By Steve Campbell

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Eng Read more…

By Tiffany Trader

IBM Wants to be “Red Hat” of Deep Learning

January 26, 2017

IBM today announced the addition of TensorFlow and Chainer deep learning frameworks to its PowerAI suite of deep learning tools, which already includes popular Read more…

By John Russell

US Supercomputing Leaders Tackle the China Question

March 15, 2017

As China continues to prove its supercomputing mettle via the Top500 list and the forward march of its ambitious plans to stand up an exascale machine by 2020, Read more…

By Tiffany Trader

HPC Technique Propels Deep Learning at Scale

February 21, 2017

Researchers from Baidu's Silicon Valley AI Lab (SVAIL) have adapted a well-known HPC communication technique to boost the speed and scale of their neural networ Read more…

By Tiffany Trader

DOE Supercomputer Achieves Record 45-Qubit Quantum Simulation

April 13, 2017

In order to simulate larger and larger quantum systems and usher in an age of "quantum supremacy," researchers are stretching the limits of today's most advance Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This