A Path To Energy Efficient HPC Datacenters

By Hayk Shoukourian

October 29, 2013

Energy efficiency is rapidly becoming a key factor for many modern high-performance computing (HPC) datacenters. It poses various challenges, which need to be addressed holistically and in an integrated manner, covering the HPC system environment (system hardware and system software), the hosting facility and infrastructure (cooling technologies, energy re-use, power supply chain, etc.), and applications (algorithms, performance metrics, etc.).

Most of the management schemes present in current HPC datacenters do not allow data to be shared between the HPC system environment, hosting facility, and infrastructure. But, it is important to collect and correlate data from all aspects of the datacenter in order to: better understand the interactions between different components of the datacenter; spot the improvement possibilities; and assess any introduced improvements. There are currently no tools that support a complete collection and correlation of energy efficiency relevant data, allowing for a unified view of energy consumption present in the datacenter.

That’s why a new energy measuring and evaluation toolset is being developed at the Leibniz Supercomputing Centre of the Bavarian Academy of Sciences (BAdW-LRZ) which is capable of monitoring and analysing the energy consumption of a supercomputing site in a holistic way, combining the HPC systems with data from the cooling and building infrastructure. The tool, named Power Data Aggregation Monitor (PowerDAM), allows the collection and evaluation of sensor data independently from the source systems and is capable of monitoring not only HPC systems but any other infrastructure that can be represented as a hierarchical tree. It monitors physical sensors as well as virtual sensors which can represent different functional compositions of several physical sensors.

PowerDAM provides a plug-in framework for defining the desired monitored entities such as IT systems, building infrastructure, etc. Two plug-in interfaces for each monitored entity are provided: one for sensor data collection and one for collecting application relevant data (e.g., utilized compute nodes, starting and ending timestamps of application, etc.) from system resource management tools.

PowerDAM is an underlying framework for energy efficiency related research at BAdW-LRZ.

Evaluating and Reporting

Energy-to-Solution (EtS) is an important metric for PowerDAM which denotes the aggregated energy consumption of an application consisting of the energy consumption of utilized compute nodes and partial sub-system components (e.g., system networking and system cooling).

Figure 1 presents the EtS report for an application executed on CoolMUC MPP Linux cluster. The first part of the report (part I) shows the sensor measurements for all utilized components in the order of timestamp, sensor name, value and unit.

Figure 1: EtS Report for an application executed on CoolMUC MPP Linux Cluster

Part II shows all approximations of source measurement data which were considered to be invalid (missing measurements, out of bounds data, etc.). Part III shows the aggregated energy consumption (EtS) of the executed application and provides information on the consumption percentages of computation, networking, and cooling.

The ability to calculate the EtS of an application allows for the further understanding and tuning of the application internally (via change of algorithms, memory access patterns, etc.) as well as externally through hardware adaptation (e.g., static/dynamic voltage frequency scaling).

PowerDAM provides various visualization options such as: the power draw, utilization rate, and averaged CPU temperatures of utilized compute nodes; correlation between power and load for these nodes; different EtS reports; and system power consumption for a given time frame (e.g. day, month, and year). Figure 2 illustrates one of these options – the EtS report (encompassing in parallel to the EtS, the percentages for computation, infrastructure, cooling, and networking) for all executed applications by a given user.

Figure 2: EtS Report for All Jobs Submitted by Given User

PowerDAM “node-map” view displays the dynamic behavior of compute nodes for a given sensor type. This view updates automatically after a customized amount of time and uses a color mapping to classify the behavior of the compute nodes (Figure 3).

Figure 3: Utilization Map of Compute Nodes for CoolMUC Linux Cluster. The color green illustrates the 96% to 100% utilization range. The color white illustrates the 0% and 90% to 95% utilization range. The color red illustrates the 1% to 89% utilization range. (not all compute nodes of the cluster are depicted)

The “node-map” view can be essential for understanding the interconnection between different sensor types. For example, correlating utilization rate (Figure 3) with CPU temperature (Figure 4) allows the investigation of the interdependency between utilization rates and CPU temperatures of defined compute nodes (nodes lxa130 and lxa17).

Figure 4: Temperature Map of Compute Nodes for CoolMUC Linux Cluster (2×8-core AMD CPUs per compute node)
(not all compute nodes of the cluster are depicted)

Further development will allow PowerDAM to: classify applications according to power draw, runtime, performance, and energy consumption; provide data necessary for the enhancement of the resource management systems; and report on datacenter key performance indicators (KPIs) such as PUE, ERE, DCiE, WUE, etc.

More detailed information on PowerDAM is available in the Proceedings of the First International Conference on Information and Communication Technologies for Sustainability under “Towards a Unified Energy Efficiency Evaluation Toolset: An Approach and Its Implementation at Leibniz Supercomputing Centre (LRZ)” and is indexed under DOI 10.3929/ethz-a-007337628.

The development of PowerDAM was made possible by the PRACE Second Implementation Phase project PRACE- 2IP in the Work Package “Prototyping” which has received funding from the European Community’s Seventh Framework Program (FP7/2007-2013) under grant agreement no. RI-283493 and within the SIMOPEK project which has received funding from the German Federal Ministry of Education and Research (BMBF) under grand agreement no. 01IH13007A. The work was achieved using the PRACE Research Infrastructure resources at BAdW-LRZ with support of the State of Bavaria, Germany.

The authors would like to thank Jeanette Wilde for her valuable comments and support.

Author Affiliations

Hayk Shoukourian(1,2); Torsten Wilde(1); Axel Auweter(1); Arndt Bode(1,2)

1Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities (BAdW-LRZ)

2Technische Universität München (TUM), Fakultät für Informatik

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Dell’s AMD-Powered Server Line Targets High-End Jobs

September 17, 2019

Dell Technologies rolled out five new servers this week based on AMD’s latest Epyc processor that are geared toward data-driven workloads running on increasingly popular multi-cloud platforms as well as in the HPC data Read more…

By George Leopold

Cerebras to Supply DOE with Wafer-Scale AI Supercomputing Technology

September 17, 2019

Cerebras Systems, which debuted its wafer-scale AI silicon at Hot Chips last month, has entered into a multi-year partnership with Argonne National Laboratory and Lawrence Livermore National Laboratory as part of a larger collaboration with the U.S. Department of Energy... Read more…

By Tiffany Trader

Better Scientific Software: Turn Your Passion into Cash

September 13, 2019

Do you know your way around scientific software and programming? You think you can contribute to the community by making scientific software better? If so, then the Better Scientific Software (BSSW) organization wants yo Read more…

By Dan Olds

AWS Solution Channel

A Guide to Discovering the Best AWS Instances and Configurations for Your HPC Workload

The flexibility and heterogeneity of HPC cloud services provide a welcome contrast to the constraints of on-premises HPC. Every HPC configuration is potentially accessible to any given workload in a well-resourced cloud HPC deployment, with vast scalability to spin up as much compute as that workload demands in any given moment. Read more…

HPE Extreme Performance Solutions

Intel FPGAs: More Than Just an Accelerator Card

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

Rumors of My Death Are Still Exaggerated: The Mainframe

[Connect with Spectrum users and learn new skills in the IBM Spectrum LSF User Community.]

As of 2017, 92 of the world’s top 100 banks used mainframes. Read more…

Google’s ML Compiler Initiative Advances

September 12, 2019

Machine learning models running on everything from cloud platforms to mobile phones are posing new challenges for developers faced with growing tool complexity. Google’s TensorFlow team unveiled an open-source machine Read more…

By George Leopold

Cerebras to Supply DOE with Wafer-Scale AI Supercomputing Technology

September 17, 2019

Cerebras Systems, which debuted its wafer-scale AI silicon at Hot Chips last month, has entered into a multi-year partnership with Argonne National Laboratory and Lawrence Livermore National Laboratory as part of a larger collaboration with the U.S. Department of Energy... Read more…

By Tiffany Trader

IDAS: ‘Automagic’ HPC With Training Wheels

September 12, 2019

High-performance computing (HPC) for research is notorious for having steep barriers to entry. For this reason, high-tech disciplines were early adopters, have Read more…

By Elizabeth Leake

Univa Brings Cloud Automation to Slurm Users with Navops Launch 2.0

September 11, 2019

Univa, the company behind Grid Engine, announced today its HPC cloud-automation platform NavOps Launch will support the popular open-source workload scheduler Slurm. With the release of NavOps Launch 2.0, “Slurm users will have access to the same cloud automation capabilities... Read more…

By Tiffany Trader

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

Eyes on the Prize: TACC’s Frontera Quickly Ramps up Science Agenda

September 9, 2019

Announced a year ago and officially launched a week ago, the Texas Advanced Computing Center’s Frontera – now the fastest academic supercomputer (~25 petefl Read more…

By John Russell

Quantum Roundup: IBM Goes to School, Delft Tackles Networking, Rigetti Updates

September 5, 2019

IBM today announced a new open source quantum ‘textbook’, a series of quantum education videos, and plans to expand its nascent quantum hackathon program. L Read more…

By John Russell

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Fastest Academic Supercomputer Enters Full Production at TACC, Just in Time for Hurricane Season

September 3, 2019

Frontera, the NSF supercomputer installed at the Texas Advanced Computing Center (TACC) in June, passed its formal acceptance last week and is now officially la Read more…

By Tiffany Trader

High Performance (Potato) Chips

May 5, 2006

In this article, we focus on how Procter & Gamble is using high performance computing to create some common, everyday supermarket products. Tom Lange, a 27-year veteran of the company, tells us how P&G models products, processes and production systems for the betterment of consumer package goods. Read more…

By Michael Feldman

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

AMD Verifies Its Largest 7nm Chip Design in Ten Hours

June 5, 2019

AMD announced last week that its engineers had successfully executed the first physical verification of its largest 7nm chip design – in just ten hours. The AMD Radeon Instinct Vega20 – which boasts 13.2 billion transistors – was tested using a TSMC-certified Calibre nmDRC software platform from Mentor. Read more…

By Oliver Peckham

TSMC and Samsung Moving to 5nm; Whither Moore’s Law?

June 12, 2019

With reports that Taiwan Semiconductor Manufacturing Co. (TMSC) and Samsung are moving quickly to 5nm manufacturing, it’s a good time to again ponder whither goes the venerable Moore’s law. Shrinking feature size has of course been the primary hallmark of achieving Moore’s law... Read more…

By John Russell

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Nvidia Embraces Arm, Declares Intent to Accelerate All CPU Architectures

June 17, 2019

As the Top500 list was being announced at ISC in Frankfurt today with an upgraded petascale Arm supercomputer in the top third of the list, Nvidia announced its Read more…

By Tiffany Trader

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Top500 Purely Petaflops; US Maintains Performance Lead

June 17, 2019

With the kick-off of the International Supercomputing Conference (ISC) in Frankfurt this morning, the 53rd Top500 list made its debut, and this one's for petafl Read more…

By Tiffany Trader

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

Qualcomm Invests in RISC-V Startup SiFive

June 7, 2019

Investors are zeroing in on the open standard RISC-V instruction set architecture and the processor intellectual property being developed by a batch of high-flying chip startups. Last fall, Esperanto Technologies announced a $58 million funding round. Read more…

By George Leopold

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Intel Debuts Pohoiki Beach, Its 8M Neuron Neuromorphic Development System

July 17, 2019

Neuromorphic computing has received less fanfare of late than quantum computing whose mystery has captured public attention and which seems to have generated mo Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This