A Path To Energy Efficient HPC Datacenters

By Hayk Shoukourian

October 29, 2013

Energy efficiency is rapidly becoming a key factor for many modern high-performance computing (HPC) datacenters. It poses various challenges, which need to be addressed holistically and in an integrated manner, covering the HPC system environment (system hardware and system software), the hosting facility and infrastructure (cooling technologies, energy re-use, power supply chain, etc.), and applications (algorithms, performance metrics, etc.).

Most of the management schemes present in current HPC datacenters do not allow data to be shared between the HPC system environment, hosting facility, and infrastructure. But, it is important to collect and correlate data from all aspects of the datacenter in order to: better understand the interactions between different components of the datacenter; spot the improvement possibilities; and assess any introduced improvements. There are currently no tools that support a complete collection and correlation of energy efficiency relevant data, allowing for a unified view of energy consumption present in the datacenter.

That’s why a new energy measuring and evaluation toolset is being developed at the Leibniz Supercomputing Centre of the Bavarian Academy of Sciences (BAdW-LRZ) which is capable of monitoring and analysing the energy consumption of a supercomputing site in a holistic way, combining the HPC systems with data from the cooling and building infrastructure. The tool, named Power Data Aggregation Monitor (PowerDAM), allows the collection and evaluation of sensor data independently from the source systems and is capable of monitoring not only HPC systems but any other infrastructure that can be represented as a hierarchical tree. It monitors physical sensors as well as virtual sensors which can represent different functional compositions of several physical sensors.

PowerDAM provides a plug-in framework for defining the desired monitored entities such as IT systems, building infrastructure, etc. Two plug-in interfaces for each monitored entity are provided: one for sensor data collection and one for collecting application relevant data (e.g., utilized compute nodes, starting and ending timestamps of application, etc.) from system resource management tools.

PowerDAM is an underlying framework for energy efficiency related research at BAdW-LRZ.

Evaluating and Reporting

Energy-to-Solution (EtS) is an important metric for PowerDAM which denotes the aggregated energy consumption of an application consisting of the energy consumption of utilized compute nodes and partial sub-system components (e.g., system networking and system cooling).

Figure 1 presents the EtS report for an application executed on CoolMUC MPP Linux cluster. The first part of the report (part I) shows the sensor measurements for all utilized components in the order of timestamp, sensor name, value and unit.

Figure 1: EtS Report for an application executed on CoolMUC MPP Linux Cluster

Part II shows all approximations of source measurement data which were considered to be invalid (missing measurements, out of bounds data, etc.). Part III shows the aggregated energy consumption (EtS) of the executed application and provides information on the consumption percentages of computation, networking, and cooling.

The ability to calculate the EtS of an application allows for the further understanding and tuning of the application internally (via change of algorithms, memory access patterns, etc.) as well as externally through hardware adaptation (e.g., static/dynamic voltage frequency scaling).

PowerDAM provides various visualization options such as: the power draw, utilization rate, and averaged CPU temperatures of utilized compute nodes; correlation between power and load for these nodes; different EtS reports; and system power consumption for a given time frame (e.g. day, month, and year). Figure 2 illustrates one of these options – the EtS report (encompassing in parallel to the EtS, the percentages for computation, infrastructure, cooling, and networking) for all executed applications by a given user.

Figure 2: EtS Report for All Jobs Submitted by Given User

PowerDAM “node-map” view displays the dynamic behavior of compute nodes for a given sensor type. This view updates automatically after a customized amount of time and uses a color mapping to classify the behavior of the compute nodes (Figure 3).

Figure 3: Utilization Map of Compute Nodes for CoolMUC Linux Cluster. The color green illustrates the 96% to 100% utilization range. The color white illustrates the 0% and 90% to 95% utilization range. The color red illustrates the 1% to 89% utilization range. (not all compute nodes of the cluster are depicted)

The “node-map” view can be essential for understanding the interconnection between different sensor types. For example, correlating utilization rate (Figure 3) with CPU temperature (Figure 4) allows the investigation of the interdependency between utilization rates and CPU temperatures of defined compute nodes (nodes lxa130 and lxa17).

Figure 4: Temperature Map of Compute Nodes for CoolMUC Linux Cluster (2×8-core AMD CPUs per compute node)
(not all compute nodes of the cluster are depicted)

Further development will allow PowerDAM to: classify applications according to power draw, runtime, performance, and energy consumption; provide data necessary for the enhancement of the resource management systems; and report on datacenter key performance indicators (KPIs) such as PUE, ERE, DCiE, WUE, etc.

More detailed information on PowerDAM is available in the Proceedings of the First International Conference on Information and Communication Technologies for Sustainability under “Towards a Unified Energy Efficiency Evaluation Toolset: An Approach and Its Implementation at Leibniz Supercomputing Centre (LRZ)” and is indexed under DOI 10.3929/ethz-a-007337628.

The development of PowerDAM was made possible by the PRACE Second Implementation Phase project PRACE- 2IP in the Work Package “Prototyping” which has received funding from the European Community’s Seventh Framework Program (FP7/2007-2013) under grant agreement no. RI-283493 and within the SIMOPEK project which has received funding from the German Federal Ministry of Education and Research (BMBF) under grand agreement no. 01IH13007A. The work was achieved using the PRACE Research Infrastructure resources at BAdW-LRZ with support of the State of Bavaria, Germany.

The authors would like to thank Jeanette Wilde for her valuable comments and support.

Author Affiliations

Hayk Shoukourian(1,2); Torsten Wilde(1); Axel Auweter(1); Arndt Bode(1,2)

1Leibniz Supercomputing Centre of the Bavarian Academy of Sciences and Humanities (BAdW-LRZ)

2Technische Universität München (TUM), Fakultät für Informatik

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

DARPA Continues Investment in Post-Moore’s Technologies

July 24, 2017

The U.S. military long ago ceded dominance in electronics innovation to Silicon Valley, the DoD-backed powerhouse that has driven microelectronic generation for decades. With Moore's Law clearly running out of steam, the Read more…

By George Leopold

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in 2017 with scale-up production for enterprise datacenters and Read more…

By Tiffany Trader

Trinity Supercomputer’s Haswell and KNL Partitions Are Merged

July 19, 2017

Trinity supercomputer’s two partitions – one based on Intel Xeon Haswell processors and the other on Xeon Phi Knights Landing – have been fully integrated are now available for use on classified work in the Nationa Read more…

By HPCwire Staff

Fujitsu Continues HPC, AI Push

July 19, 2017

Summer is well under way, but the so-called summertime slowdown, linked with hot temperatures and longer vacations, does not seem to have impacted Fujitsu's output. The Japanese multinational has made a raft of HPC and A Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE Servers Deliver High Performance Remote Visualization

Whether generating seismic simulations, locating new productive oil reservoirs, or constructing complex models of the earth’s subsurface, energy, oil, and gas (EO&G) is a highly data-driven industry. Read more…

Researchers Use DNA to Store and Retrieve Digital Movie

July 18, 2017

From abacus to pencil and paper to semiconductor chips, the technology of computing has always been an ever-changing target. The human brain is probably the computer we use most (hopefully) and understand least. This mon Read more…

By John Russell

The Exascale FY18 Budget – The Next Step

July 17, 2017

On July 12, 2017, the U.S. federal budget for its Exascale Computing Initiative (ECI) took its next step forward. On that day, the full Appropriations Committee of the House of Representatives voted to accept the recomme Read more…

By Alex R. Larzelere

Summer Reading: IEEE Spectrum’s Chip Hall of Fame

July 17, 2017

Take a trip down memory lane – the Mostek MK4096 4-kilobit DRAM, for instance. Perhaps processors are more to your liking. Remember the Sh-Boom processor (1988), created by Russell Fish and Chuck Moore, and named after Read more…

By John Russell

Women in HPC Luncheon Shines Light on Female-Friendly Hiring Practices

July 13, 2017

The second annual Women in HPC luncheon was held on June 20, 2017, during the International Supercomputing Conference in Frankfurt, Germany. The luncheon provides participants the opportunity to network with industry lea Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Fujitsu Continues HPC, AI Push

July 19, 2017

Summer is well under way, but the so-called summertime slowdown, linked with hot temperatures and longer vacations, does not seem to have impacted Fujitsu's out Read more…

By Tiffany Trader

Researchers Use DNA to Store and Retrieve Digital Movie

July 18, 2017

From abacus to pencil and paper to semiconductor chips, the technology of computing has always been an ever-changing target. The human brain is probably the com Read more…

By John Russell

The Exascale FY18 Budget – The Next Step

July 17, 2017

On July 12, 2017, the U.S. federal budget for its Exascale Computing Initiative (ECI) took its next step forward. On that day, the full Appropriations Committee Read more…

By Alex R. Larzelere

Women in HPC Luncheon Shines Light on Female-Friendly Hiring Practices

July 13, 2017

The second annual Women in HPC luncheon was held on June 20, 2017, during the International Supercomputing Conference in Frankfurt, Germany. The luncheon provid Read more…

By Tiffany Trader

Satellite Advances, NSF Computation Power Rapid Mapping of Earth’s Surface

July 13, 2017

New satellite technologies have completely changed the game in mapping and geographical data gathering, reducing costs and placing a new emphasis on time series Read more…

By Ken Chiacchia and Tiffany Jolley

Intel Skylake: Xeon Goes from Chip to Platform

July 13, 2017

With yesterday’s New York unveiling of the new “Skylake” Xeon Scalable processors, Intel made multiple runs at multiple competitive threats and strategic Read more…

By Doug Black

Perverse Incentives? How Economics (Mis-)shaped Academic Science

July 12, 2017

The unintended consequences of how we fund academic research—in the U.S. and elsewhere—are strangling innovation, putting universities into debt and creatin Read more…

By Ken Chiacchia, Senior Science Writer, Pittsburgh Supercomputing Center

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This