AMD Refreshes Vision for HPC Future

By Nicole Hemsoth

February 13, 2014

Although they’ve been rather quiet compared to their competitors in the general server, GPU and of course, overall HPC market, it might be too early to write off AMD just yet. If we’re to look at their silence as the “calm before the storm” consider it typhoon season, at least according Suresh Gopalakrishnan, corporate vice president and general manager of the AMD server business unit, whom we spoke with this week.

The last time we checked in with AMD, we were told that HPC represented a small share of the overall business focus. At the time, they had a dwindling share of the Top 500 (which hasn’t recovered—AMD claims less than 45 systems across processor generations on the list) and their focus seemed to be targeting anything but high performance computing workloads. But with stiff competition in the mainstream server market from the largely-dominant Intel, the drawn-out death of the PC, and a struggling presence in high-end computing, AMD did the smart thing—they branched out to tackle key segments of the market where they still have a chance. Among those areas is still the ARM server ecosystem—one that they’ll be aggressively attacking with their “Seattle” approach this year. Add to that their APU, which has an HSA shine for developers and a rather powerful GPU to exploit, and they might reclaim their status in an HPC ecosystem that’s moved on with rising shares of discrete GPUs and increasingly, coprocessors like the Xeon Phi.

With all of this in mind, during our chat this week, Gopalakrishnan told us that while their first generation APUs were unquestionably targeting graphics rendering, media and gaming markets, all roads for HPC now lead to “Berlin,” (which we’ll get to in a moment) and a strong ARM presence that’s sparked some surprising interest.

“When we first started talking about [codename Seattle and] ARM, the idea was around hyperscale, storage, cloud and such, but when we went to SC13, we were surprised at the interest from folks we met there who wanted to use ARM in HPC environments,” he revealed. “When we talked to those in Europe, we found that a lot of the research facilities there were also interested in ARM for HPC so a lot of them signed up for our evaluation boards.”

AMDInside1

“Seattle” is first to market with a 64-bit ARM-based server SoC from a proven server processor supplier.  As he described, “Seattle” is an 8 and then 16-core CPU based on the ARM Cortex-A57 core and is expected to run at or greater than 2 GHz and will offer two to four times the performance of the Opteron X-Series processor with significant improvement in compute-per-watt.” Additionally, Seattle is set to deliver 128GB DRAM support and “extensive offload engines for better power efficiency and reduced CPU loading, server caliber encryption, and compression and legacy networking including integrated 10GbE.  It will be the first processor from AMD to integrate AMD’s advanced Freedom Fabric for dense compute systems directly onto the chip.”

He said that this interest at SC and elsewhere made them realize that they have all the components—it’s a matter of wrapping an HPC message around what already exists. “The 1:1 disk to core ratio, 10GbE interconnects, and PCI 3 (for adding Inifiniband, for example) all made it a good fit for HPC.”

The other key to AMD’s HPC future in HPC is found in the x86-based Berlin processors, which are built on the “Steamroller” 28nm architecture, feature an integrated graphics unit that will support HSA, allowing unified GPU/CPU memory access.  “Berlin has a lot of graphics compute capabilities coming and it’s just the first in a series of processors that are HAS compliant with associated caching on the GPU side,” said Gopalakrishnan. He notes that initial interest in their APUs is coming from a range of potential areas, including the oil and gas industry (where there’s some stiff competition since many oil and gas shops were early CUDA adopters) as well as for those seeking a platform for Hadoop framework and machine learning or pattern recognition workloads.

BerlinProcessors

While AMD has only released their 2014 roadmap thus far, Gopalakrishnan says that further down the line, they’re planning on rolling out a steady stream of GPU capability increases that follow the same trajectory of their Radeon discrete GPUs. They’re also bolstering efforts on the developer ecosystem around their APU, by bringing new compilers from PGI and others, working to support OpenACC directives, partnering with SUSE for a GCC compiler to provide OpenMP directives and perhaps most important for their broader goals, working with Oracle to bring Java to entire GPU/CPU side.

Although the programmatic ease Gopalakrishnan talked about, enabled by HSA, is attractive, AMD is forever in a slow race with Intel, now especially in the accelerator/co-processor market. When asked about gaining an edge against the Phi, he said the question becomes one of making sure that the right task is being scheduled at the right point—as with Phi and you’re forced to take programming to that level. “Phi addresses one part of the programming ease issue, which is that you don’t need to use CUDA or OpenCL but instead x86 for the parallelization. Even still, you have to worry about separating the tasks, sending things to the right place and passing data back and forth between the two systems. We’re bringing the ability to be able to compile directly from Fortran, C or other high level languages to give OpenACC or OpenMP directives and be able to compile directly on the APU—in this way we’re making sure the scheduling is handled from the tool side and the memory accesses are within the same memory pool so to minimize passing.”

Gopalakrishnan  says the same concept applies to how they’re bringing Java into the fold. Almost all HPC apps are in C, Fortran or CUDA in conjunction with one of those. “We’re enabling Java onto the APUs and have been working with Oracle for many years on that. We released our own parallel API, which was the start for developers to use Java and GPU compute.” With the release of Java 9 these APIs will become part of the mesh. “We’re bringing an additional level of programming into this and seeing traction from people saying this opens up apps to more than just the traditional developers for future HPC applications.”

While much of this remains to be seen throughout 2014, it’s safe to say, “welcome back, AMD—the race has been quiet without you”….because the more competitor, the merrier, right?

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Inspur Establishes Artificial Intelligence (AI) Department

Google Showcases 2017 AI Research Highlights

January 23, 2018

Looking for a good snapshot of the state of AI research? Cloud giant Google recently reviewed its 2017 AI research and application highlights in a two-part blog. While hardly comprehensive, it’s a worthwhile, fast read Read more…

By John Russell

UCSD, AIST Forge Tighter Alliance with AI-Focused MOU

January 18, 2018

The rich history of collaboration between UC San Diego and AIST in Japan is getting richer. The organizations entered into a five-year memorandum of understanding on January 10. The MOU represents the continuation of a 1 Read more…

By Tiffany Trader

New Blueprint for Converging HPC, Big Data

January 18, 2018

After five annual workshops on Big Data and Extreme-Scale Computing (BDEC), a group of international HPC heavyweights including Jack Dongarra (University of Tennessee), Satoshi Matsuoka (Tokyo Institute of Technology), Read more…

By John Russell

HPE Extreme Performance Solutions

HPE and NREL Take Steps to Create a Sustainable, Energy-Efficient Data Center with an H2 Fuel Cell

As enterprises attempt to manage rising volumes of data, unplanned data center outages are becoming more common and more expensive. As the cost of downtime rises, enterprises lose out on productivity and valuable competitive advantage without access to their critical data. Read more…

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown and Spectre security updates on the performance of popular H Read more…

By Tiffany Trader

UCSD, AIST Forge Tighter Alliance with AI-Focused MOU

January 18, 2018

The rich history of collaboration between UC San Diego and AIST in Japan is getting richer. The organizations entered into a five-year memorandum of understandi Read more…

By Tiffany Trader

New Blueprint for Converging HPC, Big Data

January 18, 2018

After five annual workshops on Big Data and Extreme-Scale Computing (BDEC), a group of international HPC heavyweights including Jack Dongarra (University of Te Read more…

By John Russell

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

Fostering Lustre Advancement Through Development and Contributions

January 17, 2018

Six months after organizational changes at Intel's High Performance Data (HPDD) division, most in the Lustre community have shed any initial apprehension aroun Read more…

By Carlos Aoki Thomaz

When the Chips Are Down

January 11, 2018

In the last article, "The High Stakes Semiconductor Game that Drives HPC Diversity," I alluded to the challenges facing the semiconductor industry and how that may impact the evolution of HPC systems over the next few years. I thought I’d lift the covers a little and look at some of the commercial challenges that impact the component technology we use in HPC. Read more…

By Dairsie Latimer

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

Momentum Builds for US Exascale

January 9, 2018

2018 looks to be a great year for the U.S. exascale program. The last several months of 2017 revealed a number of important developments that help put the U.S. Read more…

By Alex R. Larzelere

ANL’s Rick Stevens on CANDLE, ARM, Quantum, and More

January 8, 2018

Late last year HPCwire caught up with Rick Stevens, associate laboratory director for computing, environment and life Sciences at Argonne National Laboratory, f Read more…

By John Russell

Inventor Claims to Have Solved Floating Point Error Problem

January 17, 2018

"The decades-old floating point error problem has been solved," proclaims a press release from inventor Alan Jorgensen. The computer scientist has filed for and Read more…

By Tiffany Trader

US Coalesces Plans for First Exascale Supercomputer: Aurora in 2021

September 27, 2017

At the Advanced Scientific Computing Advisory Committee (ASCAC) meeting, in Arlington, Va., yesterday (Sept. 26), it was revealed that the "Aurora" supercompute Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Leading Solution Providers

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

Delays, Smoke, Records & Markets – A Candid Conversation with Cray CEO Peter Ungaro

October 5, 2017

Earlier this month, Tom Tabor, publisher of HPCwire and I had a very personal conversation with Cray CEO Peter Ungaro. Cray has been on something of a Cinderell Read more…

By Tiffany Trader & Tom Tabor

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

HPC Chips – A Veritable Smorgasbord?

October 10, 2017

For the first time since AMD's ill-fated launch of Bulldozer the answer to the question, 'Which CPU will be in my next HPC system?' doesn't have to be 'Whichever variety of Intel Xeon E5 they are selling when we procure'. Read more…

By Dairsie Latimer

  • arrow
  • Click Here for More Headlines
  • arrow
Share This