Details Emerging on Japan’s Future Exascale System

By Nicole Hemsoth

March 18, 2014

The Big Data and Extreme Computing meeting in Fukuoka, Japan concluded recently, pushing a great deal of information about international progress toward exascale initiatives into the global community.

As the host country, Japan had ample opportunity to gather many of the researchers building out the next incarnation of the K Computer, which is expected to be the country’s first exascale system—a $1.38 billion undertaking that’s already underway with expected installation in 2019 and full-steam production in 2020.

According to the roadmap put forth by Yoshio Kawaguchi from Japan’s Office for Promotion of Computing Science/MEXT, basic development for the future system is swiftly moving on software, accelerator, processor and scientific project planning fronts. Fujitsu, Hitachi and NEC are key vendors providing the system and support, along with technical staff at the University of Tokyo, the University of Tsukuba, the Tokyo Institute of Technology, Tohoku University and of course, at RIKEN, site of the K Computer and future hub of its successor.

Called “postK” in reference to its ability to step up the power of the original former top system, K, the timeline for the exascale system is laid out as a projection–with additional research notes (summarized below) to highlight various tracks of the early development and system/stack design.

Japan_Exascale_RoadmapJapan has its sights set on a number of potential problems that might be solved on postK, including the development of safer cars, the evolution of drugs with mitigated or reduced side effects, better prediction and responses to natural disasters, and specific projects, like the development of better batteries, the creation of electronic devices using novel materials, and the enhanced ability to kick galaxy simulation up several (thousand) notches.

JapanExascaleChart

ExascaleChart2

Of course, to do all of this at a reasonable cost is going to take some serious innovation. A few of the key researchers behind the components to building postK shared details, including Dr. Mitsushisa Sato from the Center for Computational Sciences at the University of Tsukba and team leader for the Programming Environment Research Team behind the K Computer at RIKEN.

His work is centered around optimal accelerators for massive heterogeneous systems, which has led to the creation of what the team calls an “extreme SIMD architecture” designed for compute oriented applications. This involves tightly coupled accelerators and a few unique memory refinements, including the addition of high bandwidth memory (HBM in the chart below).

This architecture would be designed to tackle molecular dynamics and N-body-type simulations as well as stencil apps and according to Sato, will aim for high performance in the area of around 10 teraflops per chip using a 10nm silicon technology that will arrive somewhere in the 2018-2020 timeframe. While that’s not staggering when you really think about it, the real story seems to be (at this point anyway) that most of the crunch is being handled by the on-board accelerator with the added weight of the memory on the same package and associated networking.

Accelerator_Arch

Sato and team are exploring possible programming models for this approach via a C extension for the in-the-weeds aspects, an OpenACC-based model for stencil applications to help ease porting existing codes, a DSL and application framework for building with as well as the option of OpenCL. There is no mention of CUDA here, which should likely tell you something about the nature of the accelerator. Again, as with all aspects of this article, we’ll be following up as soon as we can secure more information.

ArchitecturesOn the processor front, this is again seen as a natural evolution of the K system. According to Yutaka Ishikawa from the University of Tokyo, the team will carry over lessons learned with the general processor environment to target far greater efficiency and to meet a software stack that’s designed for both the proposed and commodity-based systems. The ridiculously bright yellow chart on the left shows the various processor approaches they’ve been testing during their current cycles.

In a presentation from the application and system feasibility study teams, they noted the many parallels in terms of challenges and potential problems the system could solve between K and the exascale system of 2020. The K Computer, which was put into production in 2011, currently has over 1,431 users and is running around 136 projects. Each of the sites in Japan’s national infrastructure is dedicated to a specific strategic application area (although not exclusively running projects in the domain). At RIKEN the K system is devoted in particular to life sciences and drug design problems. Other sites are focused on materials science, climate and geosciences, manufacturing and astrophysics. The system has supported two notable Gordon Bell prizes since its inception, in addition to topping the Top 500 list in 2011.

Keep in mind that the United States is a partner on the software side of the project. As Kawaguchi’s slide highlights, the partnership will continue into the next phases of system development. The team notes that “international collaboration for system software has been considered”

Exascale_Partnership_Japan

We’ll be bringing much more insight into this story as soon as we’re able to secure it but we did want to point to the details as soon as possible. You can view more about these and other presentations around exascale (not to mention a lot of talk about big data) at the main site, where the presentations have just gone live: http://www.exascale.org/bdec/agenda/fukuoka-japan

Our thanks to Dr. Jack Dongarra to the early insight he was able to provide. Follow-up coming soon, stay tuned…

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