Manufacturing Exascale

July 7, 2014

Exascale systems are certainly the current buzz in high performance computing. While theoretical projections suggest the possibility to have an exascale system by 2018, reality tells us that a usable supercomputer of that size will require at least few years into the next decade. Simply adopting the current approach – more of the same but bigger and faster – will not work, due to constraints in power availability, cost and scalability of applications. The entire HPC industry has taken very seriously the exascale challenge and a wealth of investments has been deployed in order to overcome what would otherwise be a possible showstopper for the progress in science and technology.

The challenge of building a supercomputer capable of executing exaflop/s calculations is holistic, involving every aspect of an HPC system design, from chip to application. Manufactures and integrators, in particular, have to master many disciplines like computer science, electronics, electrical engineering, mechanical engineering, thermodynamics and even hydraulics.

One HPC system manufacturer that has always nurtured skills and technologies that could prove useful to the exascale challenge is Eurotech, a global supercomputing and Aurora Tigon Eurora Installation at CINECAembedded systems company based in northern Italy.

Eurotech HPC division designs and manufactures HPC systems and delivers HPC solutions to a variety of customers. Eurotech makes every part of their HPC systems (boards, interconnects, water cooling, mechanics…) and hence retains the control over the entire system development. These competences, together with a history of successful collaborations with relevant European research institutions, have made Eurotech an ideal partner for exascale research projects.

At Eurotech, they think the big contribution they can give to exascale is taking computer science theory and the best technologies available into systems that are usable and affordable. This is the approach Eurotech has taken in research projects like DEEP and QPACE2, which are at the forefront of the European exascale run.

Both projects aim to develop novel HPC architectures, where accelerators, coupled with low power CPUs or CPU clusters, take the heavy part of the computation, delivering very high energy efficiency results.

“Eventually we aim to get products out of the R&D projects we are involved” – says Giovanbattista Mattiussi, marketing manager HPC at Eurotech – “For instance, in QPACE2 we are applying a new, extremely energy efficient and modular architecture which will provide the base for a new Aurora line. Productizing new technologies and architectures makes them usable and cost effective, so available to everybody”

Eurotech envisages that the combination of novel extremely energy efficient architectures and liquid cooling should provide the grounds to build exascale systems.

Regarding power consumption, Eurotech has always used an “energy aware” approach in their HPC design so that now they manufacture some of the most energy efficient machines in the market. Recently, Eurotech presented a new HPC architecture, based on X-Gene, the Applied Micro ARM 64 bit CPU, with the support for 4 Nvidia Tesla K40. This is an additional step in the direction of higher energy efficiency.

Contact cooling is widely used within Eurotech for applications other than HPC, like embedded computing. According to Paul Arts, R&D director at Eurotech, the competence for cooling and thermal design is far from new in the group. This has allowed the company to develop a sound experience in direct water cooling, taking it through different improvement stages to the new version of the Aurora hot direct cooling, lighter, more compact and more effective.

It is highly likely that future exascale systems will be heterogeneous, including in one system different computation and storage components, like processors, accelerators, FPGAs, Aurora Bricks System NodeNVMs… This is one of the reasons the company developed the Aurora Bricks, an innovative and modular HPC system that allows composing and configuring different types of HPC servers starting from out of the box components.

Also, exascale systems will use so many components, that it will be almost impossible for the whole system to operate without faults. Resiliency, so the ability to recover from faults, will be paramount. As a manufacturer, Eurotech aims to make their systems as much reliable as possible and also providing to applications all information they need to prevent and manage faults. The balance of prevention, system reliability and resilience is the most promising approach for large scale systems fault management.

Eurotech also thinks that technologies for exascale will be leveraged in many systems that won’t necessarily perform at exaflop/s level. Requirements for exascale, like extreme energy efficiency, density, heterogeneity, reliability will also fit many applications where now power, space and performance constraints are preventing feasible solutions. The fact Eurotech has an HPEC (high performance embedded computing) development centre in California demonstrates the will of the company to fulfil a pervasive high performance computing vision.

Building an exascale machine will be most probably possible soon. It is HPC system manufacturers that will have to make that machine affordable and usable. It is the HPC community that will need to develop the programming models needed to support a new generation of parallel applications.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a community infrastructure in support of machine learning research Read more…

By John Russell

DARPA Continues Investment in Post-Moore’s Technologies

July 24, 2017

The U.S. military long ago ceded dominance in electronics innovation to Silicon Valley, the DoD-backed powerhouse that has driven microelectronic generation for decades. With Moore's Law clearly running out of steam, the Read more…

By George Leopold

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in 2017 with scale-up production for enterprise datacenters and Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE Servers Deliver High Performance Remote Visualization

Whether generating seismic simulations, locating new productive oil reservoirs, or constructing complex models of the earth’s subsurface, energy, oil, and gas (EO&G) is a highly data-driven industry. Read more…

Trinity Supercomputer’s Haswell and KNL Partitions Are Merged

July 19, 2017

Trinity supercomputer’s two partitions – one based on Intel Xeon Haswell processors and the other on Xeon Phi Knights Landing – have been fully integrated are now available for use on classified work in the Nationa Read more…

By HPCwire Staff

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a comm Read more…

By John Russell

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Fujitsu Continues HPC, AI Push

July 19, 2017

Summer is well under way, but the so-called summertime slowdown, linked with hot temperatures and longer vacations, does not seem to have impacted Fujitsu's out Read more…

By Tiffany Trader

Researchers Use DNA to Store and Retrieve Digital Movie

July 18, 2017

From abacus to pencil and paper to semiconductor chips, the technology of computing has always been an ever-changing target. The human brain is probably the com Read more…

By John Russell

The Exascale FY18 Budget – The Next Step

July 17, 2017

On July 12, 2017, the U.S. federal budget for its Exascale Computing Initiative (ECI) took its next step forward. On that day, the full Appropriations Committee Read more…

By Alex R. Larzelere

Women in HPC Luncheon Shines Light on Female-Friendly Hiring Practices

July 13, 2017

The second annual Women in HPC luncheon was held on June 20, 2017, during the International Supercomputing Conference in Frankfurt, Germany. The luncheon provid Read more…

By Tiffany Trader

Satellite Advances, NSF Computation Power Rapid Mapping of Earth’s Surface

July 13, 2017

New satellite technologies have completely changed the game in mapping and geographical data gathering, reducing costs and placing a new emphasis on time series Read more…

By Ken Chiacchia and Tiffany Jolley

Intel Skylake: Xeon Goes from Chip to Platform

July 13, 2017

With yesterday’s New York unveiling of the new “Skylake” Xeon Scalable processors, Intel made multiple runs at multiple competitive threats and strategic Read more…

By Doug Black

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This