The Intelligence Advanced Research Projects Activity (IARPA) has officially commenced a multi-year research effort to develop a superconducting computer as a long-term solution to the power, cooling and space constraints that afflict modern high-performance computing. First revealed in February 2013, when the agency put out a call for proposals, the Cryogenic Computer Complexity (C3) program aims to pave the way for a new generation of superconducting supercomputers that are far more energy efficient than machines based on complementary metal oxide semiconductor (CMOS) technology.

Studies indicate the technology, which uses low temperatures in the 4-10 kelvin range to enable information to be transmitted with minimal energy loss, could yield one-petaflop systems that use just 25 kW and 100 petaflop systems that operate at 200 kW, including the cryogenic cooler. Compare this to the current greenest system, the L-CSC supercomputer from the GSI Helmholtz Center, which achieved 5.27 gigaflops-per-watt on the most-recent Green500 list. If scaled linearly to an exaflop supercomputing system, it would consume about 190 megawatts (MW), still quite a bit short of DARPA targets, which range from 20MW to 67MW.

The C3 project, which recently awarded an unspecified amount of funding to vendors IBM, Raytheon-BBN and Northrop Grumman Corporation, will focus on developing and integrating superconducting logic with new kinds of cryogenic memory as the basis for a small-scale working model of a superconducting computer. Superconducting circuit fabrication will be provided by MIT Lincoln Laboratory and independent test and evaluation will be carried out by NIST, Boulder.

Funding high-risk/high-payoff research in support of national intelligence is IARPA’s speciality, and superconducting computing is seen as a serious post-silicon contender for HPC, according to C3 Program Manager Dr. Marc Manheimer, who was interviewed for this piece. A long-time laboratory physicist with expertise in superconducting and in cryogenic magnetic phenomena, Dr. Manheimer provided additional details about the state of the technology and the scope of the program.

HPCwire: You’ve written about the promise of superconducting and cryogenic technologies to address the space and energy challenges of traditional silicon-based supercomputing. How tractable a problem is superconducting supercomputing?

Dr. Manheimer: IARPA only takes on the hardest problems, so it’s a serious technical challenge, but we think we have a path forward to solve all of the challenges associated with superconducting supercomputing. In particular, the challenge that I see as the hardest is to develop high-density, high-efficiency, low-latency, cryogenic memory.

HPCwire: More so than the logic?

Dr. Manheimer: The logic has been around in primitive forms for about 25-30 years, and a number of primitive circuits have been fabricated and tested, so we think we can move forward with the logic in a pretty straight-forward manner. We’ve developed a fabrication facility at the Lincoln Laboratory, and we’re upgrading that so that fab can produce circuits at the level that we need to prove out this technology. On the other hand, these cryogenic memory ideas – the other half of the program – are very new, and are for the most part untested, and we will have to go through developing the basic memory cells and put them into an array and drive them and control them in a pretty short time frame as compared with typical technology development.

HPCwire: The release put out by IARPA mentions the program would be carried out in two stages: components development for the memory and logic subsystems, then integration. Is the roadmap still following the three year plus two year split outlined last year?

Dr. Manheimer: Yes, for the first three years, the logic people have to produce some key demonstration circuits and the memory people have to produce a small-scale but complete memory, including decoders and drivers, and we also need the performers to develop a plan for how they are going to integrate these. That’s the first stage. Then we’ll have another call for proposals for the second stage.

HPCwire: So the three vendors that were awarded funding, are these first-phase partners?

Dr. Manheimer: These are independent projects. Northrup Grumman has two projects that they’ve succeeded in getting funding for. One is a logic program and one is a memory program. The Raytheon Corporation is running a memory program, and the IBM Corporation is running a logic program. So there are two logic projects and two memory projects.

HPCwire: The release also mentioned standard benchmarking programs…can you tell me more about these?

Dr. Manheimer: We’re developing a prototype, a small-scale computer, and we’re going to have to figure out what applications it’s suitable for as we scale it up. We’re going to be talking to a variety of customers with a variety of application types and we’re going to have our customers develop programs that they think will be useful in telling them what the potential of superconducting supercomputing computing is to their applications.

HPCwire: How different of an ecosystem is this compared to traditional silicon-based CMOS?

Dr. Manheimer: What we’re planning to do is reuse programs so we can use standard software, but one of the things that is missing from our ecosystem that is readily available in the semiconducting system is the development software suite. Right now if you want to develop a superconducting logic circuit of any scale, you pretty much have to do it on your own. There is no Mentor Graphics program, for example, available for superconducting computing.

HPCwire: Is IARPA thinking about specific applications yet and is this a general purpose system?

Dr. Manheimer: For now, we’re thinking general-purpose computing and we’ll see what develops in the next few years.

HPCwire: Do you think superconducting logic will be the main successor to silicon-based CMOS or is it more likely that we will have multiple computing device-level technologies that will evolve to fill this gap?

Dr. Manheimer: For high-performance computing, I think superconducting supercomputing has a high probability of being the winner. For smaller scale applications, I think CMOS will be perfectly fine for providing general-purpose computing for almost everyone. Clearly, superconducting computing won’t be useful for any portable format. Everyone will be carrying around his or her own cryogenic cooler…no, that’s not going to happen, so CMOS will be around for a long time.

HPCwire: Speaking of cryo-coolers, how much space do they take up?

Dr. Manheimer: Not much, I did a comparison between Titan at Oak Ridge and a projection of our superconducting technology, and we think that including the cryo-cooler, our supercomputer will take up about one-twentieth of the floor space, and that doesn’t include Titan’s cooling system.

HPCwire: Moving over to performance, what kind of performance goals have you set for the project and in what kind of timeframe? Is it possible to get to exascale and beyond with this technology?

Dr. Manheimer: We’ve only set goals for the C3 program, and we hope to be able to judge from the C3 program results how scalable the technology is. But we have very specific energy goals in mind for C3 and throughput goals, which are hosted on the website [and depicted below]. There are two things that we have to learn from C3. The first is whether you can actually build a supercomputer based on this technology if you really wanted to, and second do you really want to? Is it going to be prohibitively expensive and is the amount of technology required going to be too high with just no clear path forward? So those are questions that we have to seriously address at the end of C3.

HPCwire: Any estimate as to how much it will cost to build the world’s first superconducting supercomputer?

Dr. Manheimer: Not really, but if you look at conventional CMOS computers, these big supercomputers take several hundred million dollars.