Intel’s efforts to advance exascale computing concepts received a boost with the extension of the company’s research collaboration with the Barcelona Supercomputing Center (BSC) – one of four Intel exascale labs in Europe. Begun in 2011 and now extended to September 2017, the Intel-BSC work focuses on scalability issues with parallel applications.

“[A major goal] is to improve scalability of threaded applications on manycore nodes through the OmpSs programming model, an extension of the OpenMP model,” says Karl Solchenbach, Intel’s director, Innovation Pathfinding Architecture Group in Europe.

OmpSs has directionality clauses to specify the access to the operands that is used by the runtime to compute dependences between tasks at runtime and to automatically perform data transfers in heterogeneous accelerated and distributed systems. Intel hopes the BSC-Intel work will influence future direction of the OpenMP standard.

Two key priorities for the new phase of the collaboration include:

• Many Core. The Intel-BSC Exascale Lab will continue to work with BSC programming models within a single node, with an emphasis on their application on Intel Xeon Phi processor based architectures as well as in field-programmable gate array (FPGA) architectures.

• Big Data. In the area of programming, one of the Intel-BSC objectives is to use the BSC parallel Python development (PyCOMPs) to improve the efficiency of big data applications. One example of the latter is planned work with Repsol, a Spanish oil company, on new algorithms for full waveform inversion, optimized for the next generation Intel Xeon Phi processor (Knights Landing).

Tool development is also an important component of BSC-Intel efforts. “Large HPC systems require applications to run with a very high so-called parallel efficiency,” notes Solchenbach. “Inhibitors of parallel efficiency include the transfer of data between nodes, the waiting time in MPI calls, and load imbalance on node level.”

The collaboration has developed a methodology to define and measure these effects separately. “An automatic tool not only provides a detailed analysis of performance inhibitors, but also it allows a projection to a higher number of nodes,” says Solchenbach.

BSC, long active in HPC tool creation, has delivered an instrumentation package (Extrae), a performance data browser (Paraver), and a simulator (Dimemas) for what if studies. In recent years, the tools have been extended with performance analytics capabilities leveraging techniques from other areas of science and engineering in order to squeeze the captured data for more information and insight.

“The Barcelona work is pretty big scale for us,” says Charlie Wuischpard, VP & GM High Performance Computing at Intel. “A major part of what we’re proposing going forward is work on many core architecture. Our roadmap is to continue to add more and more cores all the time.”

A key problem, known for years, is the need for optimizing and modernizing the portfolio of software applications that exist for HPC. Very many HPC applications were written for one core running at as fast a clock speed as possible – an approach that is rapidly running out of steam.

“Our Knights Landing product that is coming out will have 60 or more cores running at a slightly slower clock speed but give you vastly better performance,” says Wuischpard.

Getting the most out of manycore architectures will require collaboration within the entire HPC community, he says, “One of the things we started really doing at the end of 2013 and turned the jets on in 2014 is get much more heavily involved with the entire ecosystem through a number of collaborations and co-design efforts. We know we can’t do it alone.”

Last year Intel actively solicited proposals for parallel programming computing centers, all grant-based and mostly around key scientific open source codes, and eventually funded 45 proposals. “It’s pattern of investments and collaborations we are doing around the world to help move the whole industry forward in this regard,” says Wuischpard. Intel supports exascale labs in Paris, Juelich, Leuven, and Barcelona.

It’s hard to imagine a more picturesque setting for supercomputing than the BSC site where MareNostrum, one of the most powerful supercomputers in Europe, is located in the century old, former Torre Girona chapel.

The mission of BSC is to investigate, develop and manage information technology in order to facilitate scientific progress. With this aim, special dedication has been taken to areas such as Computer Sciences, Life Sciences, Earth Sciences and Computational Applications in Science and Engineering

“We are really enjoying the dynamic and cooperative interaction with Intel teams that helps promote and improve our R&D activities,” added Jesús Labarta, director of the Computer Sciences Department at BSC.