IBM, NVIDIA and Mellanox Launch Design Center for HPC

By John Russell

July 2, 2015

Today’s launch by IBM, NVIDIA, and Mellanox of a new POWER Acceleration and Design Center in Montpellier, France, ratchets up their campaign to attract a wider developer community to the OpenPOWER platform and their efforts to build momentum for the march into the Intel-dominated HPC landscape.

The Montpellier-based center is the second of its kind, complementing the previously announced center in Germany at the Jülich Supercomputing Center in November. IBM has tens of client centers around the world and a rollout of similar design centers at other IBM sites seems likely. Technical experts from IBM, NVIDIA and Mellanox will help developers take advantage of OpenPOWER systems leveraging IBM’s open and licensable POWER architecture with the NVIDIA Tesla Accelerated Computing Platform and Mellanox InfiniBand networking solutions.

“[These centers] are crucial for engagement with the developer community and our clients. If you look at we are going with OpenPOWER at this point, it is trying to get the entire ecosystem of high performance computing, machine learning, data analytics, enterprise computing software developers, and ISVs onto the POWER platform,” Sumit Gupta, IBM vice president of HPC and OpenPOWER Operations told HPCwire in a pre-release briefing.

Not surprisingly, the OpenPOWER camp has broad goals. “If you look at the architecture NVIDIA and Mellanox are building with us, it is of course about scaling an application to hundreds and thousands of servers, but it’s also about taking massive advantage of a single server. Everything we do about scaling at the 100 petaflops level also helps the departmental cluster,” he said.

Quoted in the official announcement this morning, Stefan Kraemer, director of HPC business development, EMEA, at NVIDIA, said, “Increasing computational performance while minimizing energy consumption is a challenge the industry must overcome in the race to exascale computing. By providing systems combining IBM Power CPUs with GPU accelerators and the NVIDIA NVLink high-speed GPU interconnect technology, we can help the new Center address both objectives, enabling scientists to achieve new breakthroughs in their research.”

“The new POWER Acceleration and Design Center will help scientists and engineers address the grand challenges facing society in the fields of energy and environment, information and health care using the most advanced HPC architectures and technologies,” said Gilad Shainer, vice president of marketing at Mellanox Technologies. “Only Mellanox offloads data movement, management and even data manipulations (for example Message Passing – MPI collective communications) which are performed at the network level, enabling more valuable CPU cycles to be dedicated to the research applications.”

“Our launch of this new Center reinforces IBM’s commitment to open-source collaboration and is a next step in expanding the software and solution ecosystem around OpenPOWER,” said Dave Turek, IBM’s Vice President of HPC Market Engagement. “Teaming with NVIDIA and Mellanox, the Center will allow us to leverage the strengths of each of our companies to extend innovation and bring higher value to our customers around the world.” (see Is IBM Getting Openness Right?)

Come One, Come All?

According to Gupta the center is open for business now. Formally, the center is available to clients, all OpenPOWER members and free to academia. He was quick to add, “We are also proactively reaching out to the research community and application community. We have a very large application engagement team and welcome anyone who wants to work with us. Just get in touch with IBM we’re happy to engage.”

You can see his email inbox filling quickly.

The design center differs from the SuperVessel developer program (see IBM Introduces SuperVessel), which was launched in March in China. Supervessel is cloud-based (on OpenStack) while the Montpellier center is a traditional brick and mortar facility with an HPC cluster. Leading edge technology and expertise will be available from all three collaborators. Besides benefiting the developer and client community, Gupta notes it will enable NVIDIA, Mellanox and IBM to get faster feedback on how their technologies are working together.

As one would expect the competitive zeal runs hot in the battle between the Intel and OpenPOWER camps.

In characterizing POWER’s advantage, Gupta said, “The [POWER] CPU core is higher performance than an x86 core. We’ve been able to clock some of our cores up to 4GHz. Every core has eight threads while x86 only has two threads per core. On four processors sockets we can have 96 threads where on x86 you would have at best 24 threads. Our memory bandwidth is three times higher than x86 in most HPC applications. We can connect up to a terabyte of memory to any of our processor sockets which again enable us to operate on bigger data[sets].”

Intel would no doubt dispute the specific advantages and the battle of specs is likely to continue. What’s most important for OpenPOWER is winning support from a sufficient portion of the developer community and porting key HPC applications to the platform.

Gupta said, “One of the key metrics we look at is the number of developers that are adopting our platform. I think that’s critical for us to measure and there’s many ways to do it. You look at the number of developers but you also look at the number of applications that get onto the POWER platform and then of course you look eventually at the number of customers that are using your product.”

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a community infrastructure in support of machine learning research Read more…

By John Russell

DARPA Continues Investment in Post-Moore’s Technologies

July 24, 2017

The U.S. military long ago ceded dominance in electronics innovation to Silicon Valley, the DoD-backed powerhouse that has driven microelectronic generation for decades. With Moore's Law clearly running out of steam, the Read more…

By George Leopold

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in 2017 with scale-up production for enterprise datacenters and Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

HPE Servers Deliver High Performance Remote Visualization

Whether generating seismic simulations, locating new productive oil reservoirs, or constructing complex models of the earth’s subsurface, energy, oil, and gas (EO&G) is a highly data-driven industry. Read more…

Trinity Supercomputer’s Haswell and KNL Partitions Are Merged

July 19, 2017

Trinity supercomputer’s two partitions – one based on Intel Xeon Haswell processors and the other on Xeon Phi Knights Landing – have been fully integrated are now available for use on classified work in the Nationa Read more…

By HPCwire Staff

NSF Project Sets Up First Machine Learning Cyberinfrastructure – CHASE-CI

July 25, 2017

Earlier this month, the National Science Foundation issued a $1 million grant to Larry Smarr, director of Calit2, and a group of his colleagues to create a comm Read more…

By John Russell

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Fujitsu Continues HPC, AI Push

July 19, 2017

Summer is well under way, but the so-called summertime slowdown, linked with hot temperatures and longer vacations, does not seem to have impacted Fujitsu's out Read more…

By Tiffany Trader

Researchers Use DNA to Store and Retrieve Digital Movie

July 18, 2017

From abacus to pencil and paper to semiconductor chips, the technology of computing has always been an ever-changing target. The human brain is probably the com Read more…

By John Russell

The Exascale FY18 Budget – The Next Step

July 17, 2017

On July 12, 2017, the U.S. federal budget for its Exascale Computing Initiative (ECI) took its next step forward. On that day, the full Appropriations Committee Read more…

By Alex R. Larzelere

Women in HPC Luncheon Shines Light on Female-Friendly Hiring Practices

July 13, 2017

The second annual Women in HPC luncheon was held on June 20, 2017, during the International Supercomputing Conference in Frankfurt, Germany. The luncheon provid Read more…

By Tiffany Trader

Satellite Advances, NSF Computation Power Rapid Mapping of Earth’s Surface

July 13, 2017

New satellite technologies have completely changed the game in mapping and geographical data gathering, reducing costs and placing a new emphasis on time series Read more…

By Ken Chiacchia and Tiffany Jolley

Intel Skylake: Xeon Goes from Chip to Platform

July 13, 2017

With yesterday’s New York unveiling of the new “Skylake” Xeon Scalable processors, Intel made multiple runs at multiple competitive threats and strategic Read more…

By Doug Black

Google Pulls Back the Covers on Its First Machine Learning Chip

April 6, 2017

This week Google released a report detailing the design and performance characteristics of the Tensor Processing Unit (TPU), its custom ASIC for the inference Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Facebook Open Sources Caffe2; Nvidia, Intel Rush to Optimize

April 18, 2017

From its F8 developer conference in San Jose, Calif., today, Facebook announced Caffe2, a new open-source, cross-platform framework for deep learning. Caffe2 is the successor to Caffe, the deep learning framework developed by Berkeley AI Research and community contributors. Read more…

By Tiffany Trader

Leading Solution Providers

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

MIT Mathematician Spins Up 220,000-Core Google Compute Cluster

April 21, 2017

On Thursday, Google announced that MIT math professor and computational number theorist Andrew V. Sutherland had set a record for the largest Google Compute Engine (GCE) job. Sutherland ran the massive mathematics workload on 220,000 GCE cores using preemptible virtual machine instances. Read more…

By Tiffany Trader

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Share This