Contrary View: CPUs Sometimes Best for Big Data Visualization

By Jim Jeffers, Intel

December 1, 2015

Editor’s Note: Perhaps not surprisingly, Intel is mounting arguments that CPUs are a viable alternative for many visualization applications traditionally best served by GPUs. Here, Jim Jeffers, Engineering Manager & PE, Visualization Engineering at Intel, makes the case for CPU-based Software Defined Visualization.

Contrary to conventional thinking, GPUs are often not the best vehicles for big data visualization. In this commentary, I discuss several key technical reasons why a CPU-based “Software Defined Visualization” approach can deliver a more flexible, performant, scalable, cost effective, and power efficient solution to big data visualization than a conventional GPU-based approach.

An example from my Intel Developer Forum 2015 talk, Software Defined Visualization: Fast, Flexible Solutions For Rendering Big Data1 showed that a single Intel Xeon processor E7 v3 workstation containing 3TB (trillion bytes) of RAM was able to render a 12-billion particle, 450 GB cosmology dataset at seven frames per second2. For that input data set, it would take more than 75 GPUs with 6GBs local memory to perform the same scientific visualization task. The on-par performance of a single Intel Xeon processor vs. a 128-node GPU cluster has been confirmed in the technical literature. Similarly, my IDF 2015 presentation highlighted a ray-tracing benchmark driven by a SIGGRAPH ‘14 paper review committee request to realistically compare performance between Intel’s CPU-based Ray tracing solutions and NIVIDA’s GPU-based solutions. We found on recent typical HPC level CPU and GPU platforms with several different data models, there is a nearly 4x performance superiority of Intel’s CPU-based Software Defined Visualization (SDVis) approach for our Embree open-source project, in an apples-to-apples comparison over NVIDIA’s hardware accelerated Optix ray-tracing engine (See Figure 1 below).

Intel.Jeffers Fig 1.12.1.15Looking forward, massive memory, faster on-package memory, lots-of-cores providing in-situ visualization options are a few of the characteristics that will give the forthcoming Intel Xeon Phi code name Knights Landing the ability to deliver significantly better performance, which should make Intel Xeon Phi processor-based platforms a premier scientific visualization and professional rendering platform over the next few years – a hardware advantage that will continue to catapult software defined visualization into even greater prominence due to the use of in-situ visualization that can minimize expensive data movement as the industry transitions into the Exascale computing era.

Software Defined Visualization

The idea behind SDVis is that the size of the data, which generally maps to simulation accuracy and also image fidelity is often too big even for today’s high-end GPU memory to render without multiple tiling passes and associated data transfer penalties. Focusing rendering solutions on handling both the size and type of data rather than primarily for gaming uses means that SDVis software components can be designed to best utilize massive-memory hardware and parallel algorithms that can scale as needed across the nodes in a cluster or inside a computational cloud. We have been focused on creating and supporting freely downloadable open-source packages such as: (1) the OSPRay open, scalable, and portable ray tracing engine; (2) the Embree library of high-performance ray-tracing kernels; and (3) OpenSWR, a drop-in OpenGL highly scalable and performant CPU-based software rasterizer These all provide core functionality to enable current and new SDVis applications.

The motivation for SDVis can be summarized in the following three points:

  1. The size of the data alone is reason enough for adopting a Software Defined Visualization approach as the quantity of data implies a visualization quality (or fidelity) that is too big for the memory of discrete PCIe devices like GPUs. As we will see, limited GPU memory and the limited bandwidth of the PCIe bus conspire to make GPUs uneconomical for big-data visualization. The SDVis approach also gives developers the freedom to exploit the nearly three orders of magnitude greater RAM capacity of a high-end Intel Xeon processor-based workstation (measured in terabytes) as compared to the low gigabytes of memory that can be installed on a discrete GPU.
  2. As we move toward ever larger and more detailed simulations, it is necessary to scale visualization with the simulation software so that the big data can be quickly rendered, which is why in-situ visualization will likely become a requirement as the industry moves towards Exascale computing. Data movement is simply becoming too expensive from a time and power perspective, yet discrete GPUs don’t have the memory capacity and PCIe bandwidth to run both the rendering software and scientific simulation on the same hardware at the same time.
  3. Finally, flexibility is a must, which is why we at Intel focused on a software defined visualization approach for HPC and large data systems as opposed to targeted graphics hardware. This focus from a company famous for its hardware reflects the strong motivations and benefits behind the decision to adopt a software-based approach.

The cosmology visualization example from my previously mentioned IDF 2015 talk, Software Defined Visualization: Fast, Flexible Solutions For Rendering Big Data, illustrated in Figure 2, brings concreteness to this discussion as a single quad-socket Intel Xeon processor E7 v3 workstation was able to visualize a 12-billion (450 GB,) particle dataset and render it with a 4k resolution at 7 FPS (Frames Per Second)2. This highly detailed visualization included ambient occlusion using a zero-overhead p-k-d tree and required no changes to level-of-detail or other form of simplification.

Jeffers.Intel.2Figure 2: Example rendering of the 12-billion particle (450 GB) Cosmic Web dataset (Complements of Ingo Wald, Aaron Knoll, Gregory P. Johnson, Will Usher, Valerio Pascucci and Michael E. Papka. “CPU Ray Tracing Large Particle Data with P-k-d Trees.”

In comparison, PCIe devices like GPUs are at a disadvantage for big memory visual applications because of their limited amount of on-board memory plus the fact that they can only access host memory (and hence network and storage data) via a very slow (relative to the memory subsystem of a modern Xeon processor) PCIe bus. This means that currently even the most advanced PCIe based devices can only read data at a peak theoretical bandwidth of 16 GB/s (billion bytes per second), although in reality the actual observed PCIe data transfer rate will be lower. Still, we can calculate that 29 theoretically ideal PCIe devices will be required to read a 450 GB dataset in one second (e.g. 450 GB ÷ 16 GB/s = 29 devices). Thus a cluster containing a minimum of 203 (29 * 7) ideal PCIe devices – each on a dedicated PCIe bus as there can be no bandwidth sharing – will be required to provide sufficient PCIe bandwidth to load the example 450 GB cosmology dataset in 1/7th of a second. The end result is that we can estimate that at least 200 GPUs will be required to read a constantly changing 450 GB numerical dataset quickly enough to even have a chance of matching the 7 FPS display rate delivered by the single Intel Xeon processor-based workstation. Obviously, a 200 GPU visualization cluster cannot compete against the superior price/performance and performance/watt ratios of a single big-memory processor-based workstation.

Moving from estimation to benchmarking, the 2015 IEEE Visualization paper by Wald, et.al., CPU Ray Tracing Large Particle Data with Balanced P-k-d Trees reported that a single, 72-core Intel Xeon processor-based workstation delivered rendering performance that was on-par with a 120-GPU visualization cluster. However, the CPU vs. GPU comparison was only a side-point in the paper.

The important contribution of CPU Ray Tracing Large Particle Data with Balanced P-k-d Trees is the introduction of an efficient CPU algorithm and zero-overhead data structure, the p-k-d tree, for traversing, classifying and ray tracing data. Based on results using an OSPRay software implementation, the authors’ claim their approach, “is able to render up to billions of particles on a typical workstation, purely on the CPU, without any approximations or level-of-detail techniques, and optionally with attribute-based color mapping, dynamic range query, and advanced lighting models such as ambient occlusion and path tracing.” For this reason, the CPU vs. GPU comparative results reported in the paper required simplified visualization techniques to run a gigascale visualizations on the GPU.

Ray-tracing is an embarrassingly parallel application that can fully exploit the SPMD (Single Program Multiple Data) parallel processing capabilities of both GPUs and CPUs. This is the reason why many of the optimized Embree kernels as well as the scalable and portable OPSRay ray-tracing engine utilize the freely downloadable ISPC (Intel SPMD Program Compiler).

From a SPMD point of view, the discriminators between the CPU and GPU processing are twofold: (1) Ray-tracing has significant serial bottlenecks including the use of tree-based data structures to identify visible objects, and (2) GPUs are locked into a hardware rasterization model that is good for gaming and other such applications – in particular triangle based depth buffering – but not for big data and ray-tracing algorithms.

Drilling down, we see that low-level standards-based raster APIs force the processing of triangles rather than visual objects. This means that all raster-based visual objects have to be expressed as a mesh of triangles where every triangle in the mesh has to be processed for visibility against a depth-buffer. While hardware optimized triangle processing can be fast – as exemplified by the success of GPUs in the gaming markets – SDVis optimized ray-tracing APIs can eliminate the triangle processing requirement altogether. This gives the SDVis library developers the freedom they need to create new ray-tracing API calls and optimized methods that can deliver algorithmic speedups far beyond what can be achieved through triangle-based hardware optimizations. This is one of several reasons why the optimized Embree and OSPRay packages are able to deliver the speedups observed on an Intel Xeon processor relative to a high-end GPU shown in Figure 1. Succinctly: we don’t play games. Instead we focus on photorealism and scientific visualization.

Of course, our SDVis approach is a natural fit for the next generation Intel Xeon Phi processor code name Knights Landing product family. Rendering, in general, is embarrassingly parallel, which provides a natural transition to the lots-of-cores parallelism of this new family of Intel Xeon Phi devices. For this reason we expect these codename Knights Landing processors to become a premiere platform for SDVis over the next few years.

Enabling Better OpenGL
Our SDVis initiative also delivers improved CPU-based OpenGL raster-graphics performance for large memory footprint scientific visualization as compared to the current standard open source CPU solution, llvmpipe in MESA3D. Figure 4 (below) shows a dramatic performance benefit on a dual socket Intel Xeon processor platform with ParaView from Kitware, Inc when using the OpenSWR path incorporated into MESA3D to render a well-known scientific data model with increasing input data sizes vs. llvmpipe.

Jeffers.Intel.3OpenSWR, with its design focus on full thread and vector parallelism for typical scientific data sets provides 29x-50x+ performance over llvmpipe.   It should be noted that llvmpipe’s primary purpose is to support the breadth of OpenGL features for each new standard version with reasonable performance across many use cases.   OpenSWR’s current focus is on supporting the most prevalent scientific visualization tools and applications, specifically, ParaView and the Visualization ToolKit from Kitware, Inc, the community open source project VisIt, and EnSight from CEI, Inc.   However, OpenSWR installs and is enabled just like any OpenGL library so no special knowledge is needed to run the supported applications.   In fact, the plan is to upstream OpenSWR to the MESA3D project allowing its use from source build to deployment to be the same MESA3D mechanisms already in place. As discussed before, for large data systems, scalability is important and early testing of OpenSWR indicates close to linear scalability when adding cores as shown in the bottom portion of Figure 3 (above).   This bodes well for allowing visual data analysts to match the data set size to the appropriate level of interactivity to best gain insight from their data visualizations.

Considering current “lessons learned” as the industry moves towards an Exascale computing future, we know that data movement is expensive in terms of runtime and power consumption. This makes in-situ visualization (which minimizes data movement by running the visualization and simulation software on the same hardware) a “must-have”. Succinctly, a picture is worth an “Exabyte”.

Current SDVis software packages like OpenSWR, Embree and OSPRay naturally support in-situ visualization as they are already designed to utilize the massive memory capacity of Intel Xeon processor and the forthcoming Intel Xeon Phi products plus, due to the excellent scaling behavior of ray-tracing algorithms like P-k-d trees and the OpenSWR OpenGL pipeline, plus these packages can run across large numbers of nodes in a compute cluster or within a computational cloud. As a result, our SDVis approach appears to be Petascale and likely Exascale capable.

In-situ visualization also provides many other advantages including the ability to immediately see the simulation results and potentially “steer” the numerical simulation while it is running. There is no need to follow a more traditional visualization workflow of: (a) simulate, (b) write to storage, (c) transfer the data to a visualization cluster and then (d) wait in a queue on the visualization cluster before being able view the results.

Application profiling has also demonstrated that the performance of memory subsystem is critical to ray-tracing performance. For this reason, we expect that the new MCDRAM memory available on some of the forthcoming Intel Xeon Phi products will provide a significant boost in performance for many rendering workloads. There is no doubt that once released, the Intel Xeon Phi processor code name Knights Landing devices will be closely scrutinized by the HPC visualization, professional rendering, and special effects communities. Unfortunately, I cannot provide performance numbers at this time except to note that our SDVis solutions are already running on a pre-production Knights Landing platform as we have demonstrated at both ISC’15 in Frankfurt and at IDF’15 in San Francisco.

Using SDVis for Non-Rendering
For those who wish to consider our SDVis approach for applications other than rendering, check out the chapter “Radio Frequency Ray-Tracing” by Christiaan Gribble and Jefferson Amstutz in High Performance Parallelism Pearls Volume 2. In this chapter – and through the example source code that is freely available on lotsofcores.com – Gribble and Amstutz demonstrated the flexibility of SDVis by adapting the Intel Embree and OSPRay packages to model the propagation of radio frequency (RF) energy in the presence of complex outdoor terrain features such as those found in urban environments. The authors state in their chapter that this capability “is critical to planning, optimizing, and analyzing wireless communication and data networks”.

jeffers.intel.headshotSo, in summary, the current performance, flexibility, and forthcoming products on the Intel Xeon processor and Intel Xeon Phi processor roadmap all reinforce Intel’s decision to follow an SDVis approach. As a result, we are able to directly address the needs of the scientific and professional rendering communities without having to fight limited memory capacity, legacy APIs, PCIe bottlenecks, and gaming raster-optimized hardware. Big memory and in-situ visualization are not luxuries, they are necessities!

Author Bio: Jim Jeffers is Engineering Manager & PE, Visualization Engineering at Intel

Footnotes:

1 Software-Defined Visualization: Fast, Flexible Solutions for Rendering Big Data” in also available in a streaming video formats

2 Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark* and MobileMark* , are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to http://www.intel.com/performance.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Simulating Car Crashes with Supercomputers – and Lego

October 18, 2019

It’s an experiment many of us have carried out at home: crashing two Lego creations into each other, bricks flying everywhere. But for the researchers at the General German Automobile Club (ADAC) – which is comparabl Read more…

By Oliver Peckham

NASA Uses Deep Learning to Monitor Solar Weather

October 17, 2019

Solar flares may be best-known as sci-fi MacGuffins, but those flares – and other space weather – can have serious impacts on not only spacecraft and satellites, but also on Earth-based systems such as radio communic Read more…

By Oliver Peckham

Federated Learning Applied to Cancer Research

October 17, 2019

The ability to share and analyze data while protecting patient privacy is giving medical researchers a new tool in their efforts to use what one vendor calls “federated learning” to train models based on diverse data Read more…

By George Leopold

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

NSB 2020 S&E Indicators Dig into Workforce and Education

October 16, 2019

Every two years the National Science Board is required by Congress to issue a report on the state of science and engineering in the U.S. This year, in a departure from past practice, the NSB has divided the 2020 S&E Read more…

By John Russell

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

HPE Extreme Performance Solutions

Intel FPGAs: More Than Just an Accelerator Card

FPGA (Field Programmable Gate Array) acceleration cards are not new, as they’ve been commercially available since 1984. Typically, the emphasis around FPGAs has centered on the fact that they’re programmable accelerators, and that they can truly offer workload specific hardware acceleration solutions without requiring custom silicon. Read more…

IBM Accelerated Insights

How Do We Power the New Industrial Revolution?

[Attend the IBM LSF, HPC & AI User Group Meeting at SC19 in Denver on November 19!]

Almost everyone is talking about artificial intelligence (AI). Read more…

What’s New in HPC Research: Rabies, Smog, Robots & More

October 14, 2019

In this bimonthly feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

NSB 2020 S&E Indicators Dig into Workforce and Education

October 16, 2019

Every two years the National Science Board is required by Congress to issue a report on the state of science and engineering in the U.S. This year, in a departu Read more…

By John Russell

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Summit Simulates Braking – on Mars

October 14, 2019

NASA is planning to send humans to Mars by the 2030s – and landing on the surface will be considerably trickier than landing a rover like Curiosity. To solve Read more…

By Staff report

Trovares Drives Memory-Driven, Property Graph Analytics Strategy with HPE

October 10, 2019

Trovares, a high performance property graph analytics company, has partnered with HPE and its Superdome Flex memory-driven servers on a cybersecurity capability the companies say “routinely” runs near-time workloads on 24TB-capacity systems... Read more…

By Doug Black

Intel, Lenovo Join Forces on HPC Cluster for Flatiron

October 9, 2019

An HPC cluster with deep learning techniques will be used to process petabytes of scientific data as part of workload-intensive projects spanning astrophysics to genomics. AI partners Intel and Lenovo said they are providing... Read more…

By George Leopold

Optimizing Offshore Wind Farms with Supercomputer Simulations

October 9, 2019

Offshore wind farms offer a number of benefits; many of the areas with the strongest winds are located offshore, and siting wind farms offshore ameliorates many of the land use concerns associated with onshore wind farms. Some estimates say that, if leveraged, offshore wind power... Read more…

By Oliver Peckham

Harvard Deploys Cannon, New Lenovo Water-Cooled HPC Cluster

October 9, 2019

Harvard's Faculty of Arts & Sciences Research Computing (FASRC) center announced a refresh of their primary HPC resource. The new cluster, called Cannon after the pioneering American astronomer Annie Jump Cannon, is supplied by Lenovo... Read more…

By Tiffany Trader

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Chinese Company Sugon Placed on US ‘Entity List’ After Strong Showing at International Supercomputing Conference

June 26, 2019

After more than a decade of advancing its supercomputing prowess, operating the world’s most powerful supercomputer from June 2013 to June 2018, China is keep Read more…

By Tiffany Trader

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

A Behind-the-Scenes Look at the Hardware That Powered the Black Hole Image

June 24, 2019

Two months ago, the first-ever image of a black hole took the internet by storm. A team of scientists took years to produce and verify the striking image – an Read more…

By Oliver Peckham

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Intel Debuts Pohoiki Beach, Its 8M Neuron Neuromorphic Development System

July 17, 2019

Neuromorphic computing has received less fanfare of late than quantum computing whose mystery has captured public attention and which seems to have generated mo Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Quantum Bits: Neven’s Law (Who Asked for That), D-Wave’s Steady Push, IBM’s Li-O2- Simulation

July 3, 2019

Quantum computing’s (QC) many-faceted R&D train keeps slogging ahead and recently Japan is taking a leading role. Yesterday D-Wave Systems announced it ha Read more…

By John Russell

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This