Contrary View: CPUs Sometimes Best for Big Data Visualization

By Jim Jeffers, Intel

December 1, 2015

Editor’s Note: Perhaps not surprisingly, Intel is mounting arguments that CPUs are a viable alternative for many visualization applications traditionally best served by GPUs. Here, Jim Jeffers, Engineering Manager & PE, Visualization Engineering at Intel, makes the case for CPU-based Software Defined Visualization.

Contrary to conventional thinking, GPUs are often not the best vehicles for big data visualization. In this commentary, I discuss several key technical reasons why a CPU-based “Software Defined Visualization” approach can deliver a more flexible, performant, scalable, cost effective, and power efficient solution to big data visualization than a conventional GPU-based approach.

An example from my Intel Developer Forum 2015 talk, Software Defined Visualization: Fast, Flexible Solutions For Rendering Big Data1 showed that a single Intel Xeon processor E7 v3 workstation containing 3TB (trillion bytes) of RAM was able to render a 12-billion particle, 450 GB cosmology dataset at seven frames per second2. For that input data set, it would take more than 75 GPUs with 6GBs local memory to perform the same scientific visualization task. The on-par performance of a single Intel Xeon processor vs. a 128-node GPU cluster has been confirmed in the technical literature. Similarly, my IDF 2015 presentation highlighted a ray-tracing benchmark driven by a SIGGRAPH ‘14 paper review committee request to realistically compare performance between Intel’s CPU-based Ray tracing solutions and NIVIDA’s GPU-based solutions. We found on recent typical HPC level CPU and GPU platforms with several different data models, there is a nearly 4x performance superiority of Intel’s CPU-based Software Defined Visualization (SDVis) approach for our Embree open-source project, in an apples-to-apples comparison over NVIDIA’s hardware accelerated Optix ray-tracing engine (See Figure 1 below).

Intel.Jeffers Fig 1.12.1.15Looking forward, massive memory, faster on-package memory, lots-of-cores providing in-situ visualization options are a few of the characteristics that will give the forthcoming Intel Xeon Phi code name Knights Landing the ability to deliver significantly better performance, which should make Intel Xeon Phi processor-based platforms a premier scientific visualization and professional rendering platform over the next few years – a hardware advantage that will continue to catapult software defined visualization into even greater prominence due to the use of in-situ visualization that can minimize expensive data movement as the industry transitions into the Exascale computing era.

Software Defined Visualization

The idea behind SDVis is that the size of the data, which generally maps to simulation accuracy and also image fidelity is often too big even for today’s high-end GPU memory to render without multiple tiling passes and associated data transfer penalties. Focusing rendering solutions on handling both the size and type of data rather than primarily for gaming uses means that SDVis software components can be designed to best utilize massive-memory hardware and parallel algorithms that can scale as needed across the nodes in a cluster or inside a computational cloud. We have been focused on creating and supporting freely downloadable open-source packages such as: (1) the OSPRay open, scalable, and portable ray tracing engine; (2) the Embree library of high-performance ray-tracing kernels; and (3) OpenSWR, a drop-in OpenGL highly scalable and performant CPU-based software rasterizer These all provide core functionality to enable current and new SDVis applications.

The motivation for SDVis can be summarized in the following three points:

  1. The size of the data alone is reason enough for adopting a Software Defined Visualization approach as the quantity of data implies a visualization quality (or fidelity) that is too big for the memory of discrete PCIe devices like GPUs. As we will see, limited GPU memory and the limited bandwidth of the PCIe bus conspire to make GPUs uneconomical for big-data visualization. The SDVis approach also gives developers the freedom to exploit the nearly three orders of magnitude greater RAM capacity of a high-end Intel Xeon processor-based workstation (measured in terabytes) as compared to the low gigabytes of memory that can be installed on a discrete GPU.
  2. As we move toward ever larger and more detailed simulations, it is necessary to scale visualization with the simulation software so that the big data can be quickly rendered, which is why in-situ visualization will likely become a requirement as the industry moves towards Exascale computing. Data movement is simply becoming too expensive from a time and power perspective, yet discrete GPUs don’t have the memory capacity and PCIe bandwidth to run both the rendering software and scientific simulation on the same hardware at the same time.
  3. Finally, flexibility is a must, which is why we at Intel focused on a software defined visualization approach for HPC and large data systems as opposed to targeted graphics hardware. This focus from a company famous for its hardware reflects the strong motivations and benefits behind the decision to adopt a software-based approach.

The cosmology visualization example from my previously mentioned IDF 2015 talk, Software Defined Visualization: Fast, Flexible Solutions For Rendering Big Data, illustrated in Figure 2, brings concreteness to this discussion as a single quad-socket Intel Xeon processor E7 v3 workstation was able to visualize a 12-billion (450 GB,) particle dataset and render it with a 4k resolution at 7 FPS (Frames Per Second)2. This highly detailed visualization included ambient occlusion using a zero-overhead p-k-d tree and required no changes to level-of-detail or other form of simplification.

Jeffers.Intel.2Figure 2: Example rendering of the 12-billion particle (450 GB) Cosmic Web dataset (Complements of Ingo Wald, Aaron Knoll, Gregory P. Johnson, Will Usher, Valerio Pascucci and Michael E. Papka. “CPU Ray Tracing Large Particle Data with P-k-d Trees.”

In comparison, PCIe devices like GPUs are at a disadvantage for big memory visual applications because of their limited amount of on-board memory plus the fact that they can only access host memory (and hence network and storage data) via a very slow (relative to the memory subsystem of a modern Xeon processor) PCIe bus. This means that currently even the most advanced PCIe based devices can only read data at a peak theoretical bandwidth of 16 GB/s (billion bytes per second), although in reality the actual observed PCIe data transfer rate will be lower. Still, we can calculate that 29 theoretically ideal PCIe devices will be required to read a 450 GB dataset in one second (e.g. 450 GB ÷ 16 GB/s = 29 devices). Thus a cluster containing a minimum of 203 (29 * 7) ideal PCIe devices – each on a dedicated PCIe bus as there can be no bandwidth sharing – will be required to provide sufficient PCIe bandwidth to load the example 450 GB cosmology dataset in 1/7th of a second. The end result is that we can estimate that at least 200 GPUs will be required to read a constantly changing 450 GB numerical dataset quickly enough to even have a chance of matching the 7 FPS display rate delivered by the single Intel Xeon processor-based workstation. Obviously, a 200 GPU visualization cluster cannot compete against the superior price/performance and performance/watt ratios of a single big-memory processor-based workstation.

Moving from estimation to benchmarking, the 2015 IEEE Visualization paper by Wald, et.al., CPU Ray Tracing Large Particle Data with Balanced P-k-d Trees reported that a single, 72-core Intel Xeon processor-based workstation delivered rendering performance that was on-par with a 120-GPU visualization cluster. However, the CPU vs. GPU comparison was only a side-point in the paper.

The important contribution of CPU Ray Tracing Large Particle Data with Balanced P-k-d Trees is the introduction of an efficient CPU algorithm and zero-overhead data structure, the p-k-d tree, for traversing, classifying and ray tracing data. Based on results using an OSPRay software implementation, the authors’ claim their approach, “is able to render up to billions of particles on a typical workstation, purely on the CPU, without any approximations or level-of-detail techniques, and optionally with attribute-based color mapping, dynamic range query, and advanced lighting models such as ambient occlusion and path tracing.” For this reason, the CPU vs. GPU comparative results reported in the paper required simplified visualization techniques to run a gigascale visualizations on the GPU.

Ray-tracing is an embarrassingly parallel application that can fully exploit the SPMD (Single Program Multiple Data) parallel processing capabilities of both GPUs and CPUs. This is the reason why many of the optimized Embree kernels as well as the scalable and portable OPSRay ray-tracing engine utilize the freely downloadable ISPC (Intel SPMD Program Compiler).

From a SPMD point of view, the discriminators between the CPU and GPU processing are twofold: (1) Ray-tracing has significant serial bottlenecks including the use of tree-based data structures to identify visible objects, and (2) GPUs are locked into a hardware rasterization model that is good for gaming and other such applications – in particular triangle based depth buffering – but not for big data and ray-tracing algorithms.

Drilling down, we see that low-level standards-based raster APIs force the processing of triangles rather than visual objects. This means that all raster-based visual objects have to be expressed as a mesh of triangles where every triangle in the mesh has to be processed for visibility against a depth-buffer. While hardware optimized triangle processing can be fast – as exemplified by the success of GPUs in the gaming markets – SDVis optimized ray-tracing APIs can eliminate the triangle processing requirement altogether. This gives the SDVis library developers the freedom they need to create new ray-tracing API calls and optimized methods that can deliver algorithmic speedups far beyond what can be achieved through triangle-based hardware optimizations. This is one of several reasons why the optimized Embree and OSPRay packages are able to deliver the speedups observed on an Intel Xeon processor relative to a high-end GPU shown in Figure 1. Succinctly: we don’t play games. Instead we focus on photorealism and scientific visualization.

Of course, our SDVis approach is a natural fit for the next generation Intel Xeon Phi processor code name Knights Landing product family. Rendering, in general, is embarrassingly parallel, which provides a natural transition to the lots-of-cores parallelism of this new family of Intel Xeon Phi devices. For this reason we expect these codename Knights Landing processors to become a premiere platform for SDVis over the next few years.

Enabling Better OpenGL
Our SDVis initiative also delivers improved CPU-based OpenGL raster-graphics performance for large memory footprint scientific visualization as compared to the current standard open source CPU solution, llvmpipe in MESA3D. Figure 4 (below) shows a dramatic performance benefit on a dual socket Intel Xeon processor platform with ParaView from Kitware, Inc when using the OpenSWR path incorporated into MESA3D to render a well-known scientific data model with increasing input data sizes vs. llvmpipe.

Jeffers.Intel.3OpenSWR, with its design focus on full thread and vector parallelism for typical scientific data sets provides 29x-50x+ performance over llvmpipe.   It should be noted that llvmpipe’s primary purpose is to support the breadth of OpenGL features for each new standard version with reasonable performance across many use cases.   OpenSWR’s current focus is on supporting the most prevalent scientific visualization tools and applications, specifically, ParaView and the Visualization ToolKit from Kitware, Inc, the community open source project VisIt, and EnSight from CEI, Inc.   However, OpenSWR installs and is enabled just like any OpenGL library so no special knowledge is needed to run the supported applications.   In fact, the plan is to upstream OpenSWR to the MESA3D project allowing its use from source build to deployment to be the same MESA3D mechanisms already in place. As discussed before, for large data systems, scalability is important and early testing of OpenSWR indicates close to linear scalability when adding cores as shown in the bottom portion of Figure 3 (above).   This bodes well for allowing visual data analysts to match the data set size to the appropriate level of interactivity to best gain insight from their data visualizations.

Considering current “lessons learned” as the industry moves towards an Exascale computing future, we know that data movement is expensive in terms of runtime and power consumption. This makes in-situ visualization (which minimizes data movement by running the visualization and simulation software on the same hardware) a “must-have”. Succinctly, a picture is worth an “Exabyte”.

Current SDVis software packages like OpenSWR, Embree and OSPRay naturally support in-situ visualization as they are already designed to utilize the massive memory capacity of Intel Xeon processor and the forthcoming Intel Xeon Phi products plus, due to the excellent scaling behavior of ray-tracing algorithms like P-k-d trees and the OpenSWR OpenGL pipeline, plus these packages can run across large numbers of nodes in a compute cluster or within a computational cloud. As a result, our SDVis approach appears to be Petascale and likely Exascale capable.

In-situ visualization also provides many other advantages including the ability to immediately see the simulation results and potentially “steer” the numerical simulation while it is running. There is no need to follow a more traditional visualization workflow of: (a) simulate, (b) write to storage, (c) transfer the data to a visualization cluster and then (d) wait in a queue on the visualization cluster before being able view the results.

Application profiling has also demonstrated that the performance of memory subsystem is critical to ray-tracing performance. For this reason, we expect that the new MCDRAM memory available on some of the forthcoming Intel Xeon Phi products will provide a significant boost in performance for many rendering workloads. There is no doubt that once released, the Intel Xeon Phi processor code name Knights Landing devices will be closely scrutinized by the HPC visualization, professional rendering, and special effects communities. Unfortunately, I cannot provide performance numbers at this time except to note that our SDVis solutions are already running on a pre-production Knights Landing platform as we have demonstrated at both ISC’15 in Frankfurt and at IDF’15 in San Francisco.

Using SDVis for Non-Rendering
For those who wish to consider our SDVis approach for applications other than rendering, check out the chapter “Radio Frequency Ray-Tracing” by Christiaan Gribble and Jefferson Amstutz in High Performance Parallelism Pearls Volume 2. In this chapter – and through the example source code that is freely available on lotsofcores.com – Gribble and Amstutz demonstrated the flexibility of SDVis by adapting the Intel Embree and OSPRay packages to model the propagation of radio frequency (RF) energy in the presence of complex outdoor terrain features such as those found in urban environments. The authors state in their chapter that this capability “is critical to planning, optimizing, and analyzing wireless communication and data networks”.

jeffers.intel.headshotSo, in summary, the current performance, flexibility, and forthcoming products on the Intel Xeon processor and Intel Xeon Phi processor roadmap all reinforce Intel’s decision to follow an SDVis approach. As a result, we are able to directly address the needs of the scientific and professional rendering communities without having to fight limited memory capacity, legacy APIs, PCIe bottlenecks, and gaming raster-optimized hardware. Big memory and in-situ visualization are not luxuries, they are necessities!

Author Bio: Jim Jeffers is Engineering Manager & PE, Visualization Engineering at Intel

Footnotes:

1 Software-Defined Visualization: Fast, Flexible Solutions for Rendering Big Data” in also available in a streaming video formats

2 Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark* and MobileMark* , are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more information go to http://www.intel.com/performance.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

University of Stuttgart Inaugurates ‘Hawk’ Supercomputer

February 20, 2020

This week, the new “Hawk” supercomputer was inaugurated in a ceremony at the High-Performance Computing Center of the University of Stuttgart (HLRS). Officials, scientists and other stakeholders celebrated the new sy Read more…

By Staff report

US to Triple Its Supercomputing Capacity for Weather and Climate with Two New Crays

February 20, 2020

The blizzard of news around the race for weather and climate supercomputing leadership continues. Just three days after the UK announced a £1.2 billion plan to build the world’s largest weather and climate supercomputer, the U.S. National Oceanic and Atmospheric Administration... Read more…

By Oliver Peckham

Indiana University Researchers Use Supercomputing to Model the State’s Largest Watershed

February 20, 2020

With water stressors on the rise, understanding and protecting water supplies is more important than ever. Now, a team of researchers from Indiana University has created a new climate change data portal to help Indianans Read more…

By Staff report

TACC – Supporting Portable, Reproducible, Computational Science with Containers

February 20, 2020

Researchers who use supercomputers for science typically don't limit themselves to one system. They move their projects to whatever resources are available, often using many different systems simultaneously, in their lab Read more…

By Aaron Dubrow

China Researchers Set Distance Record in Quantum Memory Entanglement

February 20, 2020

Efforts to develop the necessary capabilities for building a practical ‘quantum-based’ internet have been ongoing for years. One of the biggest challenges is being able to maintain and manage entanglement of remote q Read more…

By John Russell

AWS Solution Channel

Challenging the barriers to High Performance Computing in the Cloud

Cloud computing helps democratize High Performance Computing by placing powerful computational capabilities in the hands of more researchers, engineers, and organizations who may lack access to sufficient on-premises infrastructure. Read more…

IBM Accelerated Insights

Intelligent HPC – Keeping Hard Work at Bay(es)

Since the dawn of time, humans have looked for ways to make their lives easier. Over the centuries human ingenuity has given us inventions such as the wheel and simple machines – which help greatly with tasks that would otherwise be extremely laborious. Read more…

New Algorithm Allows PCs to Challenge HPC in Weather Forecasting

February 19, 2020

Accurate weather forecasting has, by and large, been situated squarely in the domain of high-performance computing – just this week, the UK announced a nearly $1.6 billion investment in the world’s largest supercompu Read more…

By Oliver Peckham

US to Triple Its Supercomputing Capacity for Weather and Climate with Two New Crays

February 20, 2020

The blizzard of news around the race for weather and climate supercomputing leadership continues. Just three days after the UK announced a £1.2 billion plan to build the world’s largest weather and climate supercomputer, the U.S. National Oceanic and Atmospheric Administration... Read more…

By Oliver Peckham

Japan’s AIST Benchmarks Intel Optane; Cites Benefit for HPC and AI

February 19, 2020

Last April Intel released its Optane Data Center Persistent Memory Module (DCPMM) – byte addressable nonvolatile memory – to increase main memory capacity a Read more…

By John Russell

UK Announces £1.2 Billion Weather and Climate Supercomputer

February 19, 2020

While the planet is heating up, so is the race for global leadership in weather and climate computing. In a bombshell announcement, the UK government revealed p Read more…

By Oliver Peckham

The Massive GPU Cloudburst Experiment Plays a Smaller, More Productive Encore

February 13, 2020

In November, researchers at the San Diego Supercomputer Center (SDSC) and the IceCube Particle Astrophysics Center (WIPAC) set out to break the internet – or Read more…

By Oliver Peckham

Eni to Retake Industry HPC Crown with Launch of HPC5

February 12, 2020

With the launch of its Dell-built HPC5 system, Italian energy company Eni regains its position atop the industrial supercomputing leaderboard. At 52-petaflops p Read more…

By Tiffany Trader

Trump Budget Proposal Again Slashes Science Spending

February 11, 2020

President Donald Trump’s FY2021 U.S. Budget, submitted to Congress this week, again slashes science spending. It’s a $4.8 trillion statement of priorities, Read more…

By John Russell

Policy: Republicans Eye Bigger Science Budgets; NSF Celebrates 70th, Names Idea Machine Winners

February 5, 2020

It’s a busy week for science policy. Yesterday, the National Science Foundation announced winners of its 2026 Idea Machine contest seeking directions for futu Read more…

By John Russell

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

Julia Programming’s Dramatic Rise in HPC and Elsewhere

January 14, 2020

Back in 2012 a paper by four computer scientists including Alan Edelman of MIT introduced Julia, A Fast Dynamic Language for Technical Computing. At the time, t Read more…

By John Russell

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

SC19: IBM Changes Its HPC-AI Game Plan

November 25, 2019

It’s probably fair to say IBM is known for big bets. Summit supercomputer – a big win. Red Hat acquisition – looking like a big win. OpenPOWER and Power processors – jury’s out? At SC19, long-time IBMer Dave Turek sketched out a different kind of bet for Big Blue – a small ball strategy, if you’ll forgive the baseball analogy... Read more…

By John Russell

Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI

November 17, 2019

Intel today revealed a few more details about its forthcoming Xe line of GPUs – the top SKU is named Ponte Vecchio and will be used in Aurora, the first plann Read more…

By John Russell

IBM Unveils Latest Achievements in AI Hardware

December 13, 2019

“The increased capabilities of contemporary AI models provide unprecedented recognition accuracy, but often at the expense of larger computational and energet Read more…

By Oliver Peckham

SC19: Welcome to Denver

November 17, 2019

A significant swath of the HPC community has come to Denver for SC19, which began today (Sunday) with a rich technical program. As is customary, the ribbon cutt Read more…

By Tiffany Trader

Fujitsu A64FX Supercomputer to Be Deployed at Nagoya University This Summer

February 3, 2020

Japanese tech giant Fujitsu announced today that it will supply Nagoya University Information Technology Center with the first commercial supercomputer powered Read more…

By Tiffany Trader

51,000 Cloud GPUs Converge to Power Neutrino Discovery at the South Pole

November 22, 2019

At the dead center of the South Pole, thousands of sensors spanning a cubic kilometer are buried thousands of meters beneath the ice. The sensors are part of Ic Read more…

By Oliver Peckham

Leading Solution Providers

SC 2019 Virtual Booth Video Tour

AMD
AMD
ASROCK RACK
ASROCK RACK
AWS
AWS
CEJN
CJEN
CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
IBM
IBM
MELLANOX
MELLANOX
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
SIX NINES IT
SIX NINES IT
VERNE GLOBAL
VERNE GLOBAL
WEKAIO
WEKAIO

Jensen Huang’s SC19 – Fast Cars, a Strong Arm, and Aiming for the Cloud(s)

November 20, 2019

We’ve come to expect Nvidia CEO Jensen Huang’s annual SC keynote to contain stunning graphics and lively bravado (with plenty of examples) in support of GPU Read more…

By John Russell

Top500: US Maintains Performance Lead; Arm Tops Green500

November 18, 2019

The 54th Top500, revealed today at SC19, is a familiar list: the U.S. Summit (ORNL) and Sierra (LLNL) machines, offering 148.6 and 94.6 petaflops respectively, Read more…

By Tiffany Trader

Azure Cloud First with AMD Epyc Rome Processors

November 6, 2019

At Ignite 2019 this week, Microsoft's Azure cloud team and AMD announced an expansion of their partnership that began in 2017 when Azure debuted Epyc-backed instances for storage workloads. The fourth-generation Azure D-series and E-series virtual machines previewed at the Rome launch in August are now generally available. Read more…

By Tiffany Trader

Intel’s New Hyderabad Design Center Targets Exascale Era Technologies

December 3, 2019

Intel's Raja Koduri was in India this week to help launch a new 300,000 square foot design and engineering center in Hyderabad, which will focus on advanced com Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

In Memoriam: Steve Tuecke, Globus Co-founder

November 4, 2019

HPCwire is deeply saddened to report that Steve Tuecke, longtime scientist at Argonne National Lab and University of Chicago, has passed away at age 52. Tuecke Read more…

By Tiffany Trader

IBM Debuts IC922 Power Server for AI Inferencing and Data Management

January 28, 2020

IBM today launched a Power9-based inference server – the IC922 – that features up to six Nvidia T4 GPUs, PCIe Gen 4 and OpenCAPI connectivity, and can accom Read more…

By John Russell

Cray Debuts ClusterStor E1000 Finishing Remake of Portfolio for ‘Exascale Era’

October 30, 2019

Cray, now owned by HPE, today introduced the ClusterStor E1000 storage platform, which leverages Cray software and mixes hard disk drives (HDD) and flash memory Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This