NSF Seeks ‘Breakthroughs’ for Energy-Efficient Computing

By John Russell

March 7, 2016

Breakthroughs, by their nature, are rarely generated on demand. That said, the energy problem in computing today is so acute that the National Science Foundation and Semiconductor Research Corporation are joining forces to stimulate research into developing ‘breakthroughs’ in energy-efficient computing. The new NSF-NRC grants program, Energy-Efficient Computing: from Devices to Architectures (E2CDA), has a budget of up to $4 million per year and is currently seeking proposals due in late March.

“Truly disruptive breakthroughs are now required, and not just from any one segment of the technology stack. Rather, due to the complexity of the challenges, revolutionary new approaches are needed at each level in the hierarchy. Furthermore, simultaneous co-optimization across all levels is essential for the creation of new, sustainable computing platforms,” is the rather dramatic call in the NSF-SRC solicitation.

The new effort, according to NSF, will specifically support new research to minimize the energy impacts of processing, storing, and moving data within future computing systems, and will be synergistic with other research activities that address other aspects of this overarching energy-constrained computing performance challenge.

“Through this joint solicitation, NSF and SRC aim to support game-changing research that can set the stage for the next paradigm of computing – from mobile devices to data centers – by minimizing the energy impact of future computing systems,” wrote Sankar Basu, one of the E2CDA managers, and NSF program Director for Computing and Communication Foundations, in a blogpost last week.

Clearly the HPC community has been bumping up against power issues for some time and resorted to a wide variety of energy management techniques. (Power dissipation alone has prompted a variety of cooling solutions – but they don’t help other power-related computing challenges.) One near-term power challenge that encompasses the full computing infrastructure is DOE’s stated goal to build an exascale computer that operates with a 25MW budget.

The urgent need now, says NSF-SRC, is research and innovation around devices with switching mechanisms that are fundamentally different from that of the conventional FET (field effect transistor), and architectures than are fundamentally different from the von Neumann architecture.

Shown below is a slide taken from a January webinar on E2CDA and its very familiar contents reflect slide presentations that have taken place throughout the computer industry in recent times. (Here’s a link to the slides from the webinar: https://www.nsf.gov/attachments/137395/public/E2CDA_webinar_slides_2016-01-21.pdf)

Screen Shot 2016-03-07 at 5.02.57 PM

The NFS-SRC grants take aim at two broad types (terms of the grant) of approaches to energy reduction and management in computing:

  1. Type One. Disruptive system architectures, circuit microarchitectures, and attendant device and interconnect technology aimed at achieving the highest level of computational energy efficiency for general purpose computing systems.
  1. Type Two. Revolutionary device concepts and associated circuits and architectures that will greatly extend the practical engineering limits of energy-efficient computation.

NSF-SRC has set ambitious goals. For type one (architecture and connectivity), proposals must target at least a 100X reduction or more in energy per delivered operation as compared to projected high-performance computing (HPC) systems utilizing conventional CMOS architectures and deeply scaled technology at the end of the roadmap. “As just one example of a metric goal, demonstrations that achieve system-level performance of > 1 Giga-MAC/s/nW could be targeted (MAC = multiply and accumulate operations),” spells out the RFP.

Investigation of new alternative connectivity technologies such as plasmonic, photonic, terahertz or “any others that can enable a dramatic lowering of overall system energy dissipation” are encouraged; so are interconnect technologies that enable functionality (such as embedded ‘intelligent’ routing, etc.) beyond point-to-point connectivity and the architectures that implement them are “also within the scope of interest.”

In addition, proposals are strongly encouraged to include an approach for merging heuristic learning and predictive functionality on the same physical platform as a programmable algorithmic capability.

Type two proposals also have a high bar; they must demonstrate new device concepts with the potential to reduce the energy dissipation involved in processing, storing, and moving information by two or more orders of magnitude.

“Any new switch is likely to have characteristics very different from those of a conventional field effect transistor. The interplay between device characteristics and optimum circuit architectures therefore means that circuit architectures must be reconsidered – this includes digital circuits, but also analog, memory, communication, and/or other more specialized functions. Devices combining digital/analog/memory functions may lend themselves particularly well to unconventional information processing architectures,” notes the RFP.

Proposed architectures should enable a broad range of useful functions, rather than being dedicated to one function or a few particular functions. More details for the terms of the E2CDA grants are show here (below).

NSF_SRC Energy Grant_2016-03-07 PM

Deadline for proposals is March 28. The E2CDA solicitation was posted on NSF on December 29, 2015, with a webinar held on January 21. No awards have been made as of this writing. That Basu wrote the guest post on the The CCC Blog (Computing Community Consortium) last week possibly suggests that responses to the solicitation may have been low so far.

The solicitation also offers guidance on what not to propose. Here are a few examples for both types:

Type one (proposals not sought):

  • Evolutionary extensions of existing general purpose computing platform architectures.
  • Systems that preclude substantially expanding the functionality and performance capabilities of general purpose computing, even if they are also aimed at significantly improving the overall level of energy efficiency.
  • System architectures that cannot be demonstrated to economically support the levels of reliability and physical dimension requirements projected for the future applications being targeted.
    System architectures that are not sufficiently scalable to support a broad base of applications.

Type two (proposals not sought):

  • Materials or device concepts that incrementally extend the capabilities of commercially established devices for logic and memory.
  • CMOS-based approaches to energy-conserving circuits and architectures;
  • Device concepts already the focus of research within established projects and centers, unless the proposed research is a substantive step beyond the currently-funded research.
  • Highly-specialized circuit architectures (“accelerators”) suited to a particular function or a limited set of functions, unless these circuits can be envisioned as economically integrated in a hybrid system capable of more generalized functions.
  • Devices and architectures for quantum computing – although proposals that explore the semi-classical regime (perhaps instantiating state variables with small ensembles of quantum states) or proposals that embrace some attributes of quantum computing achievable in the classical limit (such as energy-conserving circuits) are welcome.

Here is a link for information on the E2CDA grants: http://www.nsf.gov/pubs/2016/nsf16526/nsf16526.htm

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

RIKEN Post-K Supercomputer Named After Japan’s Tallest Peak

May 23, 2019

May 23 -- RIKEN President Hiroshi Matsumoto announced that the successor to the K computer will be named Fugaku, another name for Mount Fuji, which is the tallest mountain peak in Japan. Supercomputer Fugaku, developed b Read more…

By Tiffany Trader

Cray’s Emerging Market & Technology Director Arti Garg Peers Around HPC/AI Corner

May 23, 2019

In her position as emerging market and technology director at Cray, Arti Garg doesn't just have a front-row seat to the future of computing, she plays an active role in making that future happen. Key to Garg's role is understanding how deep learning scientists are using state-of-the-art HPC infrastructures and figuring out how to push those limits further. Read more…

By Tiffany Trader

Combining Machine Learning and Supercomputing to Ferret out Phishing Attacks

May 23, 2019

The relentless ingenuity that drives cyber hacking is a global engine that knows no rest. Anyone with a laptop and run-of-the-mill computer smarts can buy or rent a phishing kit and start attacking – or it can be done Read more…

By Doug Black

HPE Extreme Performance Solutions

HPE and Intel® Omni-Path Architecture: How to Power a Cloud

Learn how HPE and Intel® Omni-Path Architecture provide critical infrastructure for leading Nordic HPC provider’s HPCFLOW cloud service.

For decades, HPE has been at the forefront of high-performance computing, and we’ve powered some of the fastest and most robust supercomputers in the world. Read more…

IBM Accelerated Insights

Who’s Driving Your Car?

Delivering a fully autonomous driving (AD) vehicle remains a key priority for both manufacturers and technology firms (“firms”). However, passenger safety is now a top-of-mind concern due in great part, to fatalities resulting from driving tests over the past years. Read more…

TACC’s Upgraded Ranch Data Storage System Debuts New Features, Exabyte Potential

May 22, 2019

There's a joke attributed to comedian Steven Wright that goes, "You can't have everything. Where would you put it?" Users of advanced computing can likely relate to this. The exponential growth of data poses a steep challenge to efforts for its reliable storage. For over 12 years, the Ranch system at the Texas Advanced Computing Center... Read more…

By Jorge Salazar, TACC

Cray’s Emerging Market & Technology Director Arti Garg Peers Around HPC/AI Corner

May 23, 2019

In her position as emerging market and technology director at Cray, Arti Garg doesn't just have a front-row seat to the future of computing, she plays an active role in making that future happen. Key to Garg's role is understanding how deep learning scientists are using state-of-the-art HPC infrastructures and figuring out how to push those limits further. Read more…

By Tiffany Trader

Combining Machine Learning and Supercomputing to Ferret out Phishing Attacks

May 23, 2019

The relentless ingenuity that drives cyber hacking is a global engine that knows no rest. Anyone with a laptop and run-of-the-mill computer smarts can buy or re Read more…

By Doug Black

Cray – and the Cray Brand – to Be Positioned at Tip of HPE’s HPC Spear

May 22, 2019

More so than with most acquisitions of this kind, HPE’s purchase of Cray for $1.3 billion, announced last week, seems to have elements of that overused, often Read more…

By Doug Black and Tiffany Trader

HPE to Acquire Cray for $1.3B

May 17, 2019

Venerable supercomputer pioneer Cray Inc. will be acquired by Hewlett Packard Enterprise for $1.3 billion under a definitive agreement announced this morning. T Read more…

By Doug Black & Tiffany Trader

Deep Learning Competitors Stalk Nvidia

May 14, 2019

There is no shortage of processing architectures emerging to accelerate deep learning workloads, with two more options emerging this week to challenge GPU leader Nvidia. First, Intel researchers claimed a new deep learning record for image classification on the ResNet-50 convolutional neural network. Separately, Israeli AI chip startup Hailo.ai... Read more…

By George Leopold

CCC Offers Draft 20-Year AI Roadmap; Seeks Comments

May 14, 2019

Artificial Intelligence in all its guises has captured much of the conversation in HPC and general computing today. The White House, DARPA, IARPA, and Departmen Read more…

By John Russell

Cascade Lake Shows Up to 84 Percent Gen-on-Gen Advantage on STAC Benchmarking

May 13, 2019

The Securities Technology Analysis Center (STAC) issued a report Friday comparing the performance of Intel's Cascade Lake processors with previous-gen Skylake u Read more…

By Tiffany Trader

Nvidia Claims 6000x Speed-Up for Stock Trading Backtest Benchmark

May 13, 2019

A stock trading backtesting algorithm used by hedge funds to simulate trading variants has received a massive, GPU-based performance boost, according to Nvidia, Read more…

By Doug Black

Cray, AMD to Extend DOE’s Exascale Frontier

May 7, 2019

Cray and AMD are coming back to Oak Ridge National Laboratory to partner on the world’s largest and most expensive supercomputer. The Department of Energy’s Read more…

By Tiffany Trader

Graphene Surprises Again, This Time for Quantum Computing

May 8, 2019

Graphene is fascinating stuff with promise for use in a seeming endless number of applications. This month researchers from the University of Vienna and Institu Read more…

By John Russell

Why Nvidia Bought Mellanox: ‘Future Datacenters Will Be…Like High Performance Computers’

March 14, 2019

“Future datacenters of all kinds will be built like high performance computers,” said Nvidia CEO Jensen Huang during a phone briefing on Monday after Nvidia revealed scooping up the high performance networking company Mellanox for $6.9 billion. Read more…

By Tiffany Trader

It’s Official: Aurora on Track to Be First US Exascale Computer in 2021

March 18, 2019

The U.S. Department of Energy along with Intel and Cray confirmed today that an Intel/Cray supercomputer, "Aurora," capable of sustained performance of one exaf Read more…

By Tiffany Trader

ClusterVision in Bankruptcy, Fate Uncertain

February 13, 2019

ClusterVision, European HPC specialists that have built and installed over 20 Top500-ranked systems in their nearly 17-year history, appear to be in the midst o Read more…

By Tiffany Trader

Intel Reportedly in $6B Bid for Mellanox

January 30, 2019

The latest rumors and reports around an acquisition of Mellanox focus on Intel, which has reportedly offered a $6 billion bid for the high performance interconn Read more…

By Doug Black

Looking for Light Reading? NSF-backed ‘Comic Books’ Tackle Quantum Computing

January 28, 2019

Still baffled by quantum computing? How about turning to comic books (graphic novels for the well-read among you) for some clarity and a little humor on QC. The Read more…

By John Russell

Deep Learning Competitors Stalk Nvidia

May 14, 2019

There is no shortage of processing architectures emerging to accelerate deep learning workloads, with two more options emerging this week to challenge GPU leader Nvidia. First, Intel researchers claimed a new deep learning record for image classification on the ResNet-50 convolutional neural network. Separately, Israeli AI chip startup Hailo.ai... Read more…

By George Leopold

Leading Solution Providers

SC 18 Virtual Booth Video Tour

Advania @ SC18 AMD @ SC18
ASRock Rack @ SC18
DDN Storage @ SC18
HPE @ SC18
IBM @ SC18
Lenovo @ SC18 Mellanox Technologies @ SC18
NVIDIA @ SC18
One Stop Systems @ SC18
Oracle @ SC18 Panasas @ SC18
Supermicro @ SC18 SUSE @ SC18 TYAN @ SC18
Verne Global @ SC18

The Case Against ‘The Case Against Quantum Computing’

January 9, 2019

It’s not easy to be a physicist. Richard Feynman (basically the Jimi Hendrix of physicists) once said: “The first principle is that you must not fool yourse Read more…

By Ben Criger

Deep500: ETH Researchers Introduce New Deep Learning Benchmark for HPC

February 5, 2019

ETH researchers have developed a new deep learning benchmarking environment – Deep500 – they say is “the first distributed and reproducible benchmarking s Read more…

By John Russell

IBM Bets $2B Seeking 1000X AI Hardware Performance Boost

February 7, 2019

For now, AI systems are mostly machine learning-based and “narrow” – powerful as they are by today's standards, they're limited to performing a few, narro Read more…

By Doug Black

Arm Unveils Neoverse N1 Platform with up to 128-Cores

February 20, 2019

Following on its Neoverse roadmap announcement last October, Arm today revealed its next-gen Neoverse microarchitecture with compute and throughput-optimized si Read more…

By Tiffany Trader

Intel Launches Cascade Lake Xeons with Up to 56 Cores

April 2, 2019

At Intel's Data-Centric Innovation Day in San Francisco (April 2), the company unveiled its second-generation Xeon Scalable (Cascade Lake) family and debuted it Read more…

By Tiffany Trader

Announcing four new HPC capabilities in Google Cloud Platform

April 15, 2019

When you’re running compute-bound or memory-bound applications for high performance computing or large, data-dependent machine learning training workloads on Read more…

By Wyatt Gorman, HPC Specialist, Google Cloud; Brad Calder, VP of Engineering, Google Cloud; Bart Sano, VP of Platforms, Google Cloud

Nvidia Claims 6000x Speed-Up for Stock Trading Backtest Benchmark

May 13, 2019

A stock trading backtesting algorithm used by hedge funds to simulate trading variants has received a massive, GPU-based performance boost, according to Nvidia, Read more…

By Doug Black

In Wake of Nvidia-Mellanox: Xilinx to Acquire Solarflare

April 25, 2019

With echoes of Nvidia’s recent acquisition of Mellanox, FPGA maker Xilinx has announced a definitive agreement to acquire Solarflare Communications, provider Read more…

By Doug Black

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This