ARM Ltd., the U.K. chip design and licensing vendor, is targeting datacenters and processors intended for high-performance computing in a chip process technology deal with the world’s largest chip foundry.
ARM (LSE: ARM, NASDAQ: ARMH) and Taiwan Semiconductor Manufacturing Co. (NYSE: TSM) announced a multiyear agreement this week to collaborate on leading-edge 7-nanometer FinFET process technology. (FinFET stands for fin-shaped field-effect transistor, an emerging process technology that reduces leakage current in systems-on-chip, or SoCs.)
The partners said the deal extends their existing partnership to push the latest device process technology into datacenters and next-generation networks. It also builds on previous collaboration on earlier generations of FinFET process technology used in ARM’s chip intellectual property offerings.
Chip scaling is advancing in parallel with hyper-convergence in datacenters. ARM is attempting to make inroads in datacenters dominated by x86-based infrastructure through what it claims are up to 10-fold increases in compute density for specific datacenter workloads. The deal with TSMC enables the chip vendor to design processors aimed datacenters and network infrastructure that are optimized for the Taiwan foundry’s 7-nanometer FinFET process technology.
The scaling of chip component densities translates to higher compute density across IT infrastructure while reducing power consumption, the partners claimed.
For TSMC, Hsinchu, Taiwan, collaboration with ARM allows it to migrate its chip process technology from mostly mobile devices to high performance computing as advanced scale architectures make inroads in the datacenter and other IT infrastructure.
TSMC said high-performance computing SoCs based on its latest chip processing technology would boost performance without a power penalty while reducing power consumption at the 10-nanometer FinFET process node.
ARM and TSMC have collaborated on previous generations of FinFET process technology. ARM’s Cortex-A72 processor is based on TSMC’s 16- and 10-nanometer FinFET process nodes.
ARM cores have slowly made their way into server SoCs. Late last year it announced new math libraries running on its 64-bit processors aimed at HPC servers. “The HPC community are early adopters of ARM-based servers and the introduction of optimized math routines build a foundation for enabling scientific computing on 64-bit ARM based compute platforms,” the chip designer noted in statement releasing the libraries.
ARM also announced a partnership with chip networking specialist Cavium (NASDAQ: CAVM) to develop HPC and big data analytics software running on its ARM-based processing platform.
Meanwhile, semiconductor foundries like TSMC have been steadily moving down the chip-scaling curve from 16- to 10- to 7-nanometer designs based on lower power FinFET process technology. TSMC said in January it expects to begin production at the 7-nanometer node in 2017.
Along with HPC, ARM continues to target Internet of Things applications. Its IoT strategy focuses on development and scaling of its “mbed” technology, which includes a “full-stack” operating system tailored to its Cortex-M 32-bit microcontrollers and a “device server” that handles connections from IoT devices.
The chip vendor announced plans last September to collaborate with IBM on an IoT platform that would integrate ARM devices with IBM analytics services designed to collect data from networked appliances and sensors.
Questions about ARM traction in the server market have swirled for some time. The move to a smaller feature size may help build momentum. Filippo Mantovani, coordinator of the European Mont-Blanc Project (Barcelona Supercomputer Center) intended to explore new ways to achieve energy efficient architecture for supercomputing (See the 2013 Mont-Blanc paper, Supercomputing with Commodity CPUs: Are Mobile SoCs Ready for HPC?”) offered these observation about ARM market traction in an earlier HPCwire article.
“It depends which ARM processors are we looking at. Enhancements of mobile System on Chips (SoCs) are driven by big producers of mobile devices (Apple, Samsung, Huawei, etc.). From this market we will see surprisingly good and increasingly powerful SoCs, but I consider unlikely that one of them will be integrated as-is in a high-end HPC system, unless some of these big players want to enter HPC market. Due to its cost effectiveness, I [still] consider [that] mobile technology is extremely interesting for compute intensive embedded applications as well as small labs and companies looking for cheap/mobile/easy scientific computation, not necessarily in the HPC area,” said Mantovani.
“If we are looking at ARM processors in the server market, then the things are slightly different. The ARM-based chips for servers, in fact, seem to evolve fast and [are becoming] more popular (X-Gene, Cavium ThunderX). Strangely enough, I consider it more urgent to have reliable and unified software support for the ARM platforms appearing on the market, than adding specific features to the silicon. This support would allow ARM technology to be “better socially accepted” within the HPC community. In this sense, Mont-Blanc is going to contribute with this system software stack and programming model, but in terms of compilers a strong contribution from IP designers and SoC producers is [still] required.”
Last year, the Mont-Blanc project received a three extension to further develop the OmpSs parallel programming model to automatically exploit multiple cluster nodes, transparent application check pointing for fault tolerance, support for ARMv8 64-bit processors, and the initial design of the Mont-Blanc exascale architecture.
This article first appeared in HPCwire’s sister publication, EnterpriseTech.