China Sets Ambitious Goal to Reach Exascale by 2020

By Tiffany Trader

May 2, 2016

At the 12th HPC Connections Workshop in Wuhan, China, Beihang University Professor Depei Qian disclosed new information regarding HPC development in China and exascale plans that are shaping up under China’s 13th five-year plan (2016-2020). Since 1996 Professor Professor Qian has served on the expert committee for the National High-tech Research & Development Program (the 863 program). Currently, he is the chief scientist of the 863 key project on high productivity computer and application service environment.

Professor Qian acknowledged that despite export restrictions on processor and software technology imposed by the US, work continues on two 100 petaflops (peak) systems: the next iteration of Tianhe-2, installed at the National Supercomputer Center in Guangzhou, and the upcoming Sunway system coming to the Jiangnan Institute of Computer Technology in Wuxi, China, near Shanghai. The official line is that these systems will be ready “by the end of the year,” but there have been rumblings that one or both of these systems will be introduced during the ISC’16 event in June.

In a Tuesday session at ISC, Professor Dr. Guangwen Yang, the director of the National Supercomputer Center at Wuxi, China, is slated to deliver talk titled “The New Sunway Supercomputer System at Wuxi.” Dr. Yang will describe the hardware and software elements that make up the system and some of the applications that will be deployed on it. A notice for that talk mentions that the system will be formally announced this summer.

China has been known to play its cards close to the vest before and launched its current supercomputing star, Tianhe-2, two years ahead of schedule. With a theoretical peak speed of 54.9 petaflops and a LINPACK rating of 33.86 petaflops, Tianhe-2 (the name means “Milky Way”) has been the world’s fastest number-cruncher since it debuted on the June 2013 TOP500 list.

The implementation scheme of the second phase of Tienhe-2 was evaluated and approved in July 2014. The original plan was to use next-generation Intel Xeon Phi (Knights Landing) processors for the upgrade path but due to export blocks put in place by the US, China was stimulated to accelerate its native chip development efforts. The new plan relies on Chinese made processors. “The development of the new FeiTeng processor is underway and we are waiting for the processor to upgrade the Tianhe-2 system,” said Professor Quin.

The second 100 petaflops system (Sunway) will use the next-generation Chinese-made ShenWei chips and will be implemented together with a general purpose cluster system of 1 petaflops performance. This configuration is designed to meet a wide variety of application requirements.

Both systems were developed under the auspices of China’s 12th five-year plan (2011 to 2015). Also under this program, China has been exploring new operation models and mechanism for CNGrid (China’s national HPC environment) and developing cloud-like application villages over CNGrid to promote applications.

CNGrid

The CNGrid service environment is a major resource of computing and storage across China. Currently, this environment is enabled by the CNGrid Suite, a software package used for the operation of the environment, Qian noted. There are 14 nodes altogether, more than 8 petaflops aggregated computing power and more than 15 petabytes of storage. The organizers have deployed more than 400 software applications and tools and also use this environment to support more than 1,000 projects.

Domain-oriented application villages are being established on top of CNGrid to provide services to the users. There are three current application villages under development: industrial product design and optimization, new drug discovery and digital media.

China has also deployed a number of parallel software development efforts to support fusion simulation, CFD for aircraft design, drug discovery, rendering for digital media, structural mechanics for large machinery, and simulation for electro-magnetic environment. The level of parallelism required is more than 300,000 cores with an efficiency of more than 30 percent.

Challenges

Depei Qian ASC16 China WeaknessProfessor Qian provided an overview of China’s main weaknesses, the most significant being a gap in kernel technologies and the lack of a suitable accelerator for the Tienhe-2 upgrade on account of the US embargo. “Currently there is no available accelerator to upgrade the system and it’s a major issue from the point of view of the Chinese government,” he said. “We had to change our plan and rely on our own processors. We are in urgent need for the system software, for the domestic processor, for the tool software and also the application software. Without an ecosystem around the domestic processors, we will not succeed in this respect.”

Also noted were a weakness in novel devices — memory storage and network as well as large-scale parallel algorithms and programs, system software, commercial software. “This is a very special phenomenon in China,” said Qian. “Currently China relies on the imported commercial application software, that software is very expensive and also limited in parallelism and limited by regulations. The center in Guangzhou cannot freely purchase system software from the vendor.” The third weakness is one shared by many countries: a talent shortage. “We don’t have enough people to work in HPC because either they only know the IT side or the domain side. We need more talented people that are also cross-disciplinary,” stated Qian.

13th Five-Year Plan Targets Exascale

After updating the continued supercomputing progress being made under the 12th five-year plan, Qian walked through brand-new elements of China’s 13th five-year plan, which puts into motion one of the most ambitious exascale programs in the world. If successful the program will stand up an exaflops (peak) supercomputer by the end of 2020 within a 35 MW power limit.

China is in the midst of overhauling its national research system and restructuring 100 programs into five tracks: Basic research program; mega-research program; key research and development program; enterprise-oriented research program; research centers and talents program.

The new track that is being focused on in the session is the third one – the key research and development program. A proposal for the track-3 key project on HPC was submitted in September 2015 and launched on February 2016.

The primary pillars for the key project are developing exascale computers, promoting computer industry by technology transfer and a China-controlled HPC technology set. The major tasks are next-generation supercomputing development, CNGrid upgrading and transformation, and domain HPC applications development. A robust supercomputing program is seen as a critical for addressing grand challenge problems spanning the environment, energy, climate, medicine, industry and science.

Depei Qian ASC16 Motivations slide

According to Professor Qian, the number one priority task is the development of an exascale supercomputer, based on a multi-objective optimized architecture that balances performance, energy consumption programmability, reliability and cost.

To achieve this goal, China is funding research into novel high performance interconnects with 3-D chip packaging, silicon photonics and on-chip networks. Programming models for heterogeneous computers will emphasize ease in writing programs and exploitation of performance of the heterogeneous architectures.

The program includes the development of prototype systems for verification of the exascale computer technologies. The computer scientists will explore possible exascale computer architectures, interconnects which can support more than 10,000 nodes, and energy efficiency technologies, as power demand is known to be one of the biggest obstacles toward exascale.

The exascale prototype will be about 512 nodes, offering 5-10 teraflops-per-node, 10-20 Gflops/watt, point to point bandwidth greater than 200 Gbps. MPI latency should be less than 1.5 us, said Qian. Development will also include system software and three typical applications that will be used to verify effectiveness.

From there, work will begin on an energy-efficient computing node and a scheme for high-performance processor/accelerator design.

Depei Qian ASC16 exascale key technology slide

“Based on those key technology developments, we will finally build the exascale system,” said Qian. “Our goal is not so ambitious – it is to have exaflops in peak. We are looking for a LINPACK efficiency of greater than 60 percent. Memory is rather limited, about 10 petabytes, with exabyte levels of storage.

“We don’t think we can reach the 20 megawatts system goal in less than five years so our goal is about 35 megawatts for the system; that means 30 Gflops/watt energy efficiency. The expected interconnect performance is greater than 500 Gbps.”

Depei Qian ASC16 exascale system slide

The final goal of the exascale program is technology transfer. Qian said that China will work to field high-end domain-oriented servers based on exascale system technologies. These servers will take advantage of the advances at the node, the interconnect, scalable I/O, storage, energy savings, reliability and application software.

The professor also spoke at length about China’s software strategies.”We cannot distinguish key technologies from applications, so there will be a joint effort in this direction.” Demo applications span a numerical nuclear reactor, a numerical aircraft, a numerical earth and a numerical engine.

The plan is to transfer some of the software into products to be adopted by a minimum of 50 users. To support this effort, China will establish three national-level research and development centers for HPC application software.

The professor emphasized that China’s “self-control” strategy to eliminate dependence on foreign tech doesn’t just refer to the processor and other hardware. “One of the efforts reflected in our plan is to develop parallel algorithms and parallel libraries for the system to improve the capability of developing modern-scale systems,” he said.

The final new element of China’s renovated program is the development of a platform for education that will provide computing resources and service to undergraduate and graduate students.

A call for proposals for the new key project was issued on February 19, 2016. The proposals will be reviewed over the next two months and then the selected projects will be announced.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

The Case for an Edge-Driven Future for Supercomputing

September 24, 2021

“Exascale only becomes valuable when it’s creating and using data that we care about,” said Pete Beckman, co-director of the Northwestern-Argonne Institute of Science and Engineering (NAISE), at the most recent HPC Read more…

Three Universities Team for NSF-Funded ‘ACES’ Reconfigurable Supercomputer Prototype

September 23, 2021

As Moore’s law slows, HPC developers are increasingly looking for speed gains in specialized code and specialized hardware – but this specialization, in turn, can make testing and deploying code trickier than ever. Now, researchers from Texas A&M University, the University of Illinois at Urbana... Read more…

Qubit Stream: Monte Carlo Advance, Infosys Joins the Fray, D-Wave Meeting Plans, and More

September 23, 2021

It seems the stream of quantum computing reports never ceases. This week – IonQ and Goldman Sachs tackle Monte Carlo on quantum hardware, Cambridge Quantum pushes chemistry calculations forward, D-Wave prepares for its Read more…

Asetek Announces It Is Exiting HPC to Protect Future Profitability

September 22, 2021

Liquid cooling specialist Asetek, well-known in HPC circles for its direct-to-chip cooling technology that is inside some of the fastest supercomputers in the world, announced today that it is exiting the HPC space amid multiple supply chain issues related to the pandemic. Although pandemic supply chain... Read more…

TACC Supercomputer Delves Into Protein Interactions

September 22, 2021

Adenosine triphosphate (ATP) is a compound used to funnel energy from mitochondria to other parts of the cell, enabling energy-driven functions like muscle contractions. For ATP to flow, though, the interaction between the hexokinase-II (HKII) enzyme and the proteins found in a specific channel on the mitochondria’s outer membrane. Now, simulations conducted on supercomputers at the Texas Advanced Computing Center (TACC) have simulated... Read more…

AWS Solution Channel

Introducing AWS ParallelCluster 3

Running HPC workloads, like computational fluid dynamics (CFD), molecular dynamics, or weather forecasting typically involves a lot of moving parts. You need a hundreds or thousands of compute cores, a job scheduler for keeping them fed, a shared file system that’s tuned for throughput or IOPS (or both), loads of libraries, a fast network, and a head node to make sense of all this. Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-apples) datacenter and edge categories. Perhaps more interesti Read more…

The Case for an Edge-Driven Future for Supercomputing

September 24, 2021

“Exascale only becomes valuable when it’s creating and using data that we care about,” said Pete Beckman, co-director of the Northwestern-Argonne Institut Read more…

Three Universities Team for NSF-Funded ‘ACES’ Reconfigurable Supercomputer Prototype

September 23, 2021

As Moore’s law slows, HPC developers are increasingly looking for speed gains in specialized code and specialized hardware – but this specialization, in turn, can make testing and deploying code trickier than ever. Now, researchers from Texas A&M University, the University of Illinois at Urbana... Read more…

Qubit Stream: Monte Carlo Advance, Infosys Joins the Fray, D-Wave Meeting Plans, and More

September 23, 2021

It seems the stream of quantum computing reports never ceases. This week – IonQ and Goldman Sachs tackle Monte Carlo on quantum hardware, Cambridge Quantum pu Read more…

Asetek Announces It Is Exiting HPC to Protect Future Profitability

September 22, 2021

Liquid cooling specialist Asetek, well-known in HPC circles for its direct-to-chip cooling technology that is inside some of the fastest supercomputers in the world, announced today that it is exiting the HPC space amid multiple supply chain issues related to the pandemic. Although pandemic supply chain... Read more…

TACC Supercomputer Delves Into Protein Interactions

September 22, 2021

Adenosine triphosphate (ATP) is a compound used to funnel energy from mitochondria to other parts of the cell, enabling energy-driven functions like muscle contractions. For ATP to flow, though, the interaction between the hexokinase-II (HKII) enzyme and the proteins found in a specific channel on the mitochondria’s outer membrane. Now, simulations conducted on supercomputers at the Texas Advanced Computing Center (TACC) have simulated... Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-ap Read more…

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight. Hyperion Research analyst and noted storage expert Mark Nossokoff looks at key storage trends in the context of the evolving HPC (and AI) landscape... Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. “We’ve been scaling our neural network training compute dramatically over the last few years,” said Milan Kovac, Tesla’s director of autopilot engineering. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

Leading Solution Providers

Contributors

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make it seem like it's two nodes behind? For Intel, the response was to change how it refers to its nodes with the aim of better reflecting its positioning within the leadership semiconductor manufacturing space. Intel revealed its new node nomenclature, and... Read more…

Latest MLPerf Results: Nvidia Shines but Intel, Graphcore, Google Increase Their Presence

June 30, 2021

While Nvidia (again) dominated the latest round of MLPerf training benchmark results, the range of participants expanded. Notably, Google’s forthcoming TPU v4 Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire