TACC Director Lays Out Details of 2nd-Gen Stampede System

By Tiffany Trader

June 2, 2016

With a $30 million award from the National Science Foundation announced today, the Texas Advanced Computing Center (TACC) at The University of Texas at Austin (UT Austin) will stand up a second-generation Stampede system based on Dell PowerEdge servers equipped with Intel “Knights Landing” processors, next-generation Xeon chips and future 3D XPoint memory. Announced today at TACC’s 15th anniversary event, Stampede 2 will deliver an estimated peak performance of 18 petaflops, doubling the compute power of the current flagship system. The award from the National Science Foundation (NSF) continues the leadership-class supercomputing technology and expertise established by the first Stampede system, which was funded by NSF 2011.

As with the first Stampede system, Stampede 2 will be deployed with vendor partners Dell and Intel. Seagate Technology joins the collaboration and will be providing a Lustre storage system that offers roughly twice the storage capability of the current Stampede machine. A cyberinfrastructure team from TACC, UT Austin, Clemson University, Cornell University, the University of Colorado at Boulder, Indiana University, and Ohio State University will handle operations for the supercomputer, which, like its predecessor, will be part of the XSEDE network, providing a vital resource to thousands of researchers across the US.

HPCwire reached out to Dan Stanzione, executive director of the Texas Advanced Computing Center, for additional details and context.

HPCwire: Can you recap what the selection process was like – was it an open bid?

Dan Stanzione: Not precisely. We talked to a number of vendors so this was another NSF proposal. The original Stampede award had an option for renewal – so based on our second or third year annual review, they invited us to submit a renewal proposal. We worked with various vendors and decided to stick with our original team of Intel and Dell and we did add Seagate to do storage as a new partner. We proposed that and it’s gone through over the last year, culminating with the NSF officially making the award yesterday.

HPCwire: Do you need to do any facilities upgrades?

Stanzione: That’s the nice thing about this award. Unlike Ranger and Stampede the first time this machine will start out being built adjacent to Stampede and then we will slowly replace the existing Stampede. It’s obviously a lot faster system but the physical node count is about the same because it’s the same amount of money that’s coming into it. The Knights Corner accelerator cards, the coprocessors in the original Stampede, were fairly big and bulky nodes. This new system footprint-wise is actually going to be a little bit smaller and take a little less power than the current Stampede, so it will fit into our current datacenter. This means for the first time over the span of our last three very large machines, we don’t have to do facilities and that’s a wonderful thing.

HPCwire: How would you characterize the value equation of this refresh with respect to performance, footprint, system costs, and power costs compared to previous generations?

Stanzione: If you look at the steps, we’re about four years apart in our big systems, almost five by the time everything gets done. From Ranger to Stampede, we went up by a factor of four in that time period [2008-2013], but then we added the coprocessor cards and that changed the physical footprint, the power and it changed the peak performance.

There are two ways to look at it. The base Stampede system was about 2 petaflops, but with the coprocessors, it was about 9.5 petaflops – so in some ways just a couple times faster, and in some ways a lot faster. The [Knights Corner] coprocessors were always sort of an interim step in the way that things were packaged so now we’ll have the Knights Landing Xeon Phi nodes in the new system as the primary processor in the node – so in some ways this machine would be twice as fast as Stampede if you count all the coprocessors and other things we did to boost performance. If you just look at the base system, it’s about nine times faster than the old base system in that time line of 2013 to 2017.

We expected just because we knew that the coprocessors were basically an interim stem, that the physical footprint would change a lot and that we should keep getting these power efficiencies. We were getting more and more nodes and spending more and more money, but once the budget levels off — this system is roughly the same node count as Stampede. Stampede was a few more nodes than Ranger but we went from four socket nodes to two socket nodes, so the price per socket has been fairly constant for a long time.

HPCwire: What is the timeline for getting Stampede 2 installed, deployed and upgraded?

Stanzione: We are going to do it in several phases. We actually have a preliminary system that we’re doing right now that we’ll have by ISC that is actually the last milestone of the original Stampede project. We’re rolling out 500 second-generation Xeon Phi “Knights Landing” nodes that we’re bringing up right now. We’ll have those available right after ISC and build some experience on those on the end of the original Stampede project and use those to get ready for the new big system. We haven’t quite nailed down the timelines yet, but some of the system will be Knights Landing based and that we’ll be doing in the first half of 2017 – the first big phase – and then we’ll do some next-generation Xeon processor nodes in a second phase that will probably be the latter half of 2017, and then we’ll add some of the 3D XPoint nonvolatile memory and that will probably spill into 2018.

HPCwire: How will you handle the 500 KNLs as you switch over?

Stanzione: Those are running in a spare row. We built out a little more space in the datacenter for them – they will be part of the existing Stampede system but with a separate queue with separate build nodes that you log into, but we’re going to share the existing Stampede file systems and user accounts. Everybody that can run on the current Stampede, once these move into full production will have full access to them by logging into Stampede and jumping over to the Knights Landing queue. They’ll get integrated into the new system when the time comes.

HPCwire: Do you have specific info on number of nodes, cores, etc.?

Stanzione: We’re anticipating that the whole system when done will come in around 18 petaflops. We have some various performance targets we’re chasing and we want to build some experience before we set the exact breakdown between the kinds of nodes that we’ll have in there – so at this time I don’t have precise node counts or core counts to give you. We don’t have exact performance yet the future Xeon processors and even the Knights Landing core counts aren’t official yet.

HPCwire: What version of OmniPath will this system use?

Stanzione: Given the timeframe of taking deliveries later this year into early next year, the first generation OmniPath, and it made more sense to do the whole thing in a single fabric.

HPCwire: Are there specs available for the Seagate Lustre file system?

Stanzione: Not at the moment but it will be at least twice as big as the current Stampede file system. We tried to go at least double in every dimension, but in network bandwidth, file system, memory capacity, etc.

HPCwire: I think this is the first system announcement for 3D-XPoint.

Stanzione: I hadn’t thought of that but hopefully we’ll be first to market with that. The 3D-XPoint is coming in several form factors, starting with PCI drives – those are coming earlier, but these are the DIMMs, the in-memory socket 3D-XPoint. It might be actually be announced in one of the big DOE systems that’s also in the 2018 timeframe.

I will say the way we phased it and because the racks are denser and because we have a little extra space – even with those multiple phases – we’ll keep running parts of the old machine as the new phases come up – so we will always have a Stampede system running throughout the transition. Until we hit that second major phase of the future Xeon processors, we’ll still have some of the original system running – so even though it’s going to be in the same part of the datacenter, we won’t have any break in service from the users’ perspective.

HPCwire: So you’re employing memory hierarchies?

Stanzione: To some degree. The Knights Landing nodes do have the MCDRAM [Multi-Channel DRAM] in them – so the memory hierarchy gets deeper to that extent. Eventually, a subset of the nodes will have the non-volatile memory, the 3D XPoint. At that point, we’ll have cache, level one, level two, level three cache, MCDRAM, main memory and then some nodes will have the non-volatile memory as well, so we’ll have a pretty deep hierarchy. We’re just doing this sort of experiment in the 3D-XPoint non-volatile memory now – it’s not going to be the whole system – just to figure out how people would use that deep a memory hierarchy. We expect some layers to get pruned away as the years go on in terms of how people use memory. I know some future Knights Landing systems that have been announced will just use MCDRAM and not use regular DDR4 DRAM in them. For the very broad mix of applications that we have, we weren’t ready to make that decision yet. So we’re still keeping some main memory in all the nodes as well. We’ll have a very deep memory hierarchy and it will be very interesting to see how people use that.

HPCwire: How would you characterize Stampede in relation to your other systems?

Stanzione: Stampede is our flagship supercomputing system. Stampede 2 will be too. Stampede is still in top 10 even though it’s three-and-a-half years old – which is fairly remarkable all by itself. For over three years, it has stayed in the top 10 of the TOP500. It is our NSF XSEDE system so we support open science users for any funded university partner and it’s had remarkably broad usage. We’ve had more than 2,500 different projects on Stampede, more than 10,000 users who use it directly, and we’ve put out about 3 billion core hours on the machine to users. Those 2,500 projects are probably in 100 different fields of science and research so it’s been an enormously broad and general purpose machine and we’ve always maintained things like the large memory system and the visualization system so we can support the range of things that people want to do – and we think Stampede 2 will be the same. It’s also our NSF flagship system here, competing to be one of the top systems in the world and open to many thousands of users. We expect all of those thousands of projects that run on Stampede will roll over to Stampede 2.

HPCwire: You probably saw that Omar Ghattas, a computational geoscientist/engineer at UT Austin and recent winner of the Gordon Bell prize for the most outstanding achievement in HPC was quoted in the official system announcement from NSF saying, “Stampede has […] given us a window into a future in which simulation is but an inner iteration of a ‘what-if?’ outer loop. Stampede 2’s massive performance increase will make routine the principled exploration of parameter space entailed in this outer loop.”

Could you provide some real-world context for this quote?

Stanzione: In general terms, it’s about the relationship between computing and what has become known as big data problems. Traditionally people think of big data as acquired from an instrument or a trace of the Internet, but we produce an awful lot of data in simulation too. We’ve moved from the world – and I would say that the weather and climate people have led the way – where a single simulation is the output to where you’re doing an ensemble of simulations and looking at thousands of possibilities and doing big data techniques on that. You then data mine the results of what are a thousand possible paths for this hurricane; add that to a database of a thousand simulations of past storms and the actual storm tracks and then bring this data mining and machine learning to the data we produce in simulation. So instead of thinking about what can we do in one simulation, it’s thinking about what if we could do an unlimited number of simulations and how does that chance how we approach science and it becomes like any other big data problem, in that you start needing machine learning to parse all that data and derive useful insights from it.

HPCwire: And these workflows leverage TACC’s other viz and data-oriented systems?

Stanzione: Stampede is our most general-purpose system I would say, but we certainly have lot of specialized use cases, like Wrangler for our more data-intensive users and Maverick is our GPU intensive platform for really doing interactive visualization and interacting with data – and we see all those use cases in the workload. In fact Stampede 2 like Stampede will connect to our stockyard shared storage infrastructure so you can generate your massive amount of simulation output on Stampede and analyze it on Wrangler or visualization it on Maverick and share between the different platforms that way.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight. Hyperion Research analyst and noted storage expert Mark No Read more…

GigaIO Gets $14.7M in Series B Funding to Expand Its Composable Fabric Technology to Customers

September 16, 2021

Just before the COVID-19 pandemic began in March 2020, GigaIO introduced its Universal Composable Fabric technology, which allows enterprises to bring together any HPC and AI resources and integrate them with networking, Read more…

What’s New in HPC Research: Solar Power, ExaWorks, Optane & More

September 16, 2021

In this regular feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here. Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

AWS Solution Channel

Supporting Climate Model Simulations to Accelerate Climate Science

The Amazon Sustainability Data Initiative (ASDI), AWS is donating cloud resources, technical support, and access to scalable infrastructure and fast networking providing high performance computing (HPC) solutions to support simulations of near-term climate using the National Center for Atmospheric Research (NCAR) Community Earth System Model Version 2 (CESM2) and its Whole Atmosphere Community Climate Model (WACCM). Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight Read more…

Cerebras Brings Its Wafer-Scale Engine AI System to the Cloud

September 16, 2021

Five months ago, when Cerebras Systems debuted its second-generation wafer-scale silicon system (CS-2), co-founder and CEO Andrew Feldman hinted of the company’s coming cloud plans, and now those plans have come to fruition. Today, Cerebras and Cirrascale Cloud Services are launching... Read more…

AI Hardware Summit: Panel on Memory Looks Forward

September 15, 2021

What will system memory look like in five years? Good question. While Monday's panel, Designing AI Super-Chips at the Speed of Memory, at the AI Hardware Summit, tackled several topics, the panelists also took a brief glimpse into the future. Unlike compute, storage and networking, which... Read more…

ECMWF Opens Bologna Datacenter in Preparation for Atos Supercomputer

September 14, 2021

In January 2020, the European Centre for Medium-Range Weather Forecasts (ECMWF) – a juggernaut in the weather forecasting scene – signed a four-year, $89-million contract with European tech firm Atos to quintuple its supercomputing capacity. With the deal approaching the two-year mark, ECMWF... Read more…

Quantum Computer Market Headed to $830M in 2024

September 13, 2021

What is one to make of the quantum computing market? Energized (lots of funding) but still chaotic and advancing in unpredictable ways (e.g. competing qubit tec Read more…

Amazon, NCAR, SilverLining Team for Unprecedented Cloud Climate Simulations

September 10, 2021

Earth’s climate is, to put it mildly, not in a good place. In the wake of a damning report from the Intergovernmental Panel on Climate Change (IPCC), scientis Read more…

After Roadblocks and Renewals, EuroHPC Targets a Bigger, Quantum Future

September 9, 2021

The EuroHPC Joint Undertaking (JU) was formalized in 2018, beginning a new era of European supercomputing that began to bear fruit this year with the launch of several of the first EuroHPC systems. The undertaking, however, has not been without its speed bumps, and the Union faces an uphill... Read more…

How Argonne Is Preparing for Exascale in 2022

September 8, 2021

Additional details came to light on Argonne National Laboratory’s preparation for the 2022 Aurora exascale-class supercomputer, during the HPC User Forum, held virtually this week on account of pandemic. Exascale Computing Project director Doug Kothe reviewed some of the 'early exascale hardware' at Argonne, Oak Ridge and NERSC (Perlmutter), while Ti Leggett, Deputy Project Director & Deputy Director... Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Berkeley Lab Debuts Perlmutter, World’s Fastest AI Supercomputer

May 27, 2021

A ribbon-cutting ceremony held virtually at Berkeley Lab's National Energy Research Scientific Computing Center (NERSC) today marked the official launch of Perlmutter – aka NERSC-9 – the GPU-accelerated supercomputer built by HPE in partnership with Nvidia and AMD. Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. “We’ve been scaling our neural network training compute dramatically over the last few years,” said Milan Kovac, Tesla’s director of autopilot engineering. Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Iran Gains HPC Capabilities with Launch of ‘Simorgh’ Supercomputer

May 18, 2021

Iran is said to be developing domestic supercomputing technology to advance the processing of scientific, economic, political and military data, and to strengthen the nation’s position in the age of AI and big data. On Sunday, Iran unveiled the Simorgh supercomputer, which will deliver.... Read more…

Leading Solution Providers

Contributors

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire