Think Fast – Is Neuromorphic Computing Set to Leap Forward?

By John Russell

August 15, 2016

Steadily advancing neuromorphic computing technology has created high expectations for this fundamentally different approach to computing. Its strengths – like the human brain it attempts to mimic – are pattern recognition (space and time) and inference reasoning. Advocates say it will also be possible to compute at much lower power than current paradigms. At ISC this year Karlheinz Meier, a physicist-turned-neuromorphic computing pioneer and a leader of the European Human Brain Project (HBP), gave an overview that served as both an update and primer.

Moving to neuromorphic computing architectures, he believes, will make emulating brain function not only more effective and efficient, but also eventually accelerate computational learning and processing significantly beyond the speed of biological systems opening up new applications. Sometimes it’s best to start with the conclusions: Meier offered these summary bullets describing the state of neuromorphic computing today (not all covered in this article) at the end of his talk:

  • Neuromorphic ComputingAfter 10 years of development available hardware systems have reached a high degree of maturity, ready for non-expert use cases
  • High degree of configurability with dedicated software tools, but obviously no replacement for general purpose machines
  • Only way to access multiple time scales present in large-scale neural systems, making them functional
  • Well suited for stochastic inference computing
  • Well suited for use of deep-submicron, non-CMOS devices

Meier is predictably bullish, citing the already proven power of deep learning and cognitive computing while still using traditional computer architectures by players like Google, Baidu, IBM, and Facebook. Indeed, computer-based neural networking isn’t new. It’s a mainstay in a wide variety of applications, typically assisted by one or another type of accelerator (GPU, FPGA, etc). Notably, NVIDIA launched its ‘purpose-built’ deep learning development server this year, basically an all GPU machine.

Many of these cognitive computing/deep learning efforts on traditional machines are quite impressive. Google’s AlphaGo algorithm from subsidiary DeepMind handily beat the world Go champion this year. But simply adapting neural networking to traditional to von Newmann architectures has drawbacks. One is power – not that it’s bad by conventional standards – but it shows no sign of the being able to approach the tiny 20W or so requirement for the human brain versus megawatts per year for supercomputers.

Also problematic is the time required to train networks. Talking about the AlphaGo victory, which he lauds, Meier said, “What people don’t see or what Google doesn’t tell people is that it took something like a year to train this system on a big cluster of graphic cards, certainly several hundred kilowatts of power over a very long time scale, many, many months. Of course the system looked at many Go games to discover the rules and structure and to play very well.”

Let’s acknowledge the training problem persists in neuromorphic computing as well. That said, neuromorphic, or brain inspired, computing seeks to mimic more directly how the human brain works. In the brain, neurons, the key components of brain processing, are connected in a vast network of networks. Individual neurons typically act in what’s called an integrate-and-fire fashion – that’s when the neuron’s membrane potential reaches a threshold and suddenly fires. Reaching that potential may involve numerous synaptic inputs that together sum to cross the firing threshold.

One of the staggering aspects of the brain is the range of physical size and ‘event’ durations it encompasses. In rough terms from tiny synapses to the whole brain there are seven orders of spatial magnitude, noted Meier, and in terms of time there are eleven orders of magnitude spanning activities from neuron firing to long-term learning. “Typically brains consist of neurons that spike and produce these kinds of action potentials, which are at the millisecond or sub millisecond level. And as you all know the time to learn things is months to years,” he said.

There have been successful efforts to map neural networks onto a supercomputer. One such effort on Japan’s K computer deployed a relatively simple network (~ one percent of the brain) and ran 1500X slower than the brain. This early work on the K computer by Markus Diesmann, another leader in European Human Brain Project (HPB), was the largest neural net simulation to date and an impressive achievement. However, it was a far cry from the efficiency (energy or processing capability) of the human brain.

Neuromorphic_K_computer“You have to wait four years for a single simulated day. A day is nothing in the life of a brain. If you consider how you learn, real rewiring the structure of the brain, which takes many, many years at the beginning of your life, these time scales are inaccessible on conventional computers. And that will not change if you just go to exascale [on traditional architectures]. One of the ways out is neuromorphic computing,” he said. Neuromorphic architectures “aren’t doing numerical calculations but generic pattern recognition and discrimination processing just as the brain does.”

Three of the more prominent neuromorphic systems in operation today are:

  • IBM’s TrueNorth uses the TrueNorth chip implemented in CMOS. Since memory, computation, and communication are handled in each of the 4096 neurosynaptic cores, TrueNorth circumvents the von-Neumann-architecture bottlenecks and is very energy-efficient, consuming 70 milliwatts, about 1/10,000th the power density of conventional microprocessors. This spring IBM announced a collaboration with Lawrence Livermore National Laboratory in which it will provide a scalable TrueNorth platform expected to process the equivalent of 16 million neurons and 4 billion synapses and consume the energy equivalent of a hearing aid battery – a mere 2.5 watts of power.
  • Neuromorphic Computing.HBPThe SpiNNaker project, run by Steve Furber, one of the inventors of the ARM architecture and a researcher at the University of Manchester, has roughly 500K arm processors. It’s a digital processor approach. The reason for selecting ARM, said Meier, is that ARM cores are cheap, at least if you make them very simple (integer operation). The challenge is to overcome scaling required. “Steve implemented a router on each of his chips, which is able to very efficiently communicate, action potentials called spikes, between individual arm processors,” said Meier. SpiNNaker’s bidirectional links to between chips is a distinguishing feature – think of it as a mini Internet, optimized to transmit ‘biological signal spikes, said Meier. The SpiNNaker architecture acts well as a real time simulator.
  • The BrainScaleS machine effort, led by Meier, “makes physical models of cell neurons and synapses. Of course we are not using a biological substrate. We use CMOS. Technically it’s a mixed CMOS signal approach. In reality is it pretty much how the real brain operates. The big thing is you can automatically scale this by adding synapses. When it is running you can change the parameters,” he said. It’s a local analogue computing approach with four million neurons and one billion synapses – binary, asynchronous communication.

Training the networks – basically programming an application – remains a challenge for all the machines. In essence, the problem and solutions become baked into the structure of the network with training. In the brain this occurs via synaptic plasticity in which the connections (synapses) between neurons are strengthened or weakened based on experience. Neuromorphic computing emulates learning and synaptic plasticity through a variety of techniques.

In his ISC presentation, Meier walked through three examples of neural networks and their training: deterministic supervised; deterministic unsupervised; and stochastic supervised.

“Most of the neural networks in use today are deterministic. You have an input and output pattern, and they are linked by the network – [in other words] if you repeat the experiment you will always get the same result. Of course the configuration of a network has to happen through learning,” said Meier. The supervision involves telling the computer, during learning, whether it has made a right or wrong choice.

You can also have stochastic networks: “You say that reality is a distributions of patterns. What you do in your networks is store a stochastic distribution of patterns, which reflect your prior knowledge, and which is acquired through learning. You can use those stored patterns either to generate distributions without any input or you can do inference,” he explained.

Neuromorphic Spiking NeuronDeterministic Supervised Learning
Taking an example from nature, Meier showed an instance of deterministic supervised learning in which a neural network mimics an insect’s natural ability to uses its chemical sensors to distinguish between different flowers. “These are circuits that we reverse engineered using neuroscience,” he explained. “We have receptor neurons that respond to certain chemical substances and you have a layer, called a de-correlation layer, which is basically contrast enhancement. You see that in all perceptive systems in biology. On the right side you see association layer to take combined inputs and make a decision based on what kind of flower you have,” said Meier.

It’s basically a data classification exercise. “The trick is to configure the links between those the de-correlation and association layers and this is done by supervised learning (telling the machine if it is correct or incorrect), through things like back propagation, Monte Carlo techniques, you really have to configure the synaptic link. Does it work? Actually it works very nicely,” said Meier.

As a general rule, he said, spiking activity is high at input layers but then drops markedly. “We see in the intermediate layer that connects association with the input layer, there is also spiking activity but it’s rare, it’s sparse. That’s a very important thing and may be one of the reasons nature has invented spikes because it saves energy. Where interesting computation is being done, the firing rate is sparse.”

Neuromorphic.Unsupervised LearningDeterministic Unsupervised Learning
As an example of unsupervised deterministic learning, Meier reviewed how owls find prey in the dark. In biology the model is very straightforward. “Since the mouse is on the right side, it is a short flight path for the sound to right ear and a long path to the left ear. [Detecting this is] is done by a circuit encoding compensating for the short path in air by a long path in the brain. You depict the time coincidence between two input impulses to produce a stronger signal and that is done in a completely unsupervised way,” said Meier. This neural net is fairly straightforward to implement in hardware.

Neuromorphic. Rabbit.DuckStochastic Supervised Learning
Do you see a duck or a rabbit in the image shown here? It could be a duck or a rabbit but you only see one at a given moment.

“You have this stored distribution of probabilities in your brain and you take samples and jump between two options. This can be implemented with Boltzmann machines, in particular, with spiking Boltzmann machines. One of the machines has a network of symmetrically connected stochastic nodes where the stage of the nodes is described by a vector of binary random variables.”

If you are wondering how a spiking vector be a variable, Meier said, “We have developed a theory [in which] zeros and one are presented by neurons that is either active or in a refractory state. The probability that this network converges to a target is a Boltzmann distribution,” said Meier.

“Here of course it is a neural network where we are connecting weights between neurons. How do you train these things? There is a very well established mechanism where you clamp the visible unit of the input layer to the value of a particular pattern and then you weight the interaction between any two nodes. This is the learning process but it’s slow,” said Meier.

Neuromorphic.Spiking.BoltzmannWhile a great deal of progress in neuromorphic computing has been accomplished, thorny issues remain. For example, it’s still not clear what the base technology should be – CMOS chips, wafer scale lithographic ‘emulations’ of neurons, etc. – and more options are on the horizon. IBM recently published a paper around phase-change memristor technology that shows promise.

The wafer scale integration used for BrainScaleS is probably the most novel and brain-like approach so far. During the post-presentation discussion, questions arose around process and device variability and degradation issues for various technologies.

Meier noted, “There is no degradation in the sense of aging. CMOS systems stay as bad or as good as they are. Nano devices still show some endurance problems. The big challenge for the BrainScaleS system is the static variability arising from the CMOS production process. This is like “fixed pattern noise“ on a CCD sensor. You can calibrate it but for really large systems we have to learn how to implement homeostatic“ adaptation like in biology. Our new digital learning center concept will just be doing that.” (

About memristor technology Meier said, “really cool devices, but people have so far totally ignored the aspect of variability. It’s much, much bigger than CMOS. I don’t see how you can calibrate a memristor in a large circuit. [With CMOS] you can calibrate the synapse on a neuron because there are parameters, and SRAM to store the parameters. You can measure and if it doesn’t work too well and I can fix it by going in and calibrating it. How do you do that with memristors?”

Challenges aside, the IBM-LLNL project and two European systems should help accelerate neuromorphic development. Meier notes that access to SpiNNaker and BrainScaleS is not restricted to Europeans although restrictions for some countries exist due to national technology export law.

“There are plenty of users for the small prototype systems. The SpiNNaker boards are in particular attractive because they can be used by anyone trained in standard software tools. There are more than 100 users. The small scale BrainScaleS system has attracted about 10 users but the use is very different from normal computers so people struggle more. The numbers of external users of the HBP collaboratory (including all platforms) is shown in the attached plot. About 10% of them are using the large scale NM systems,” said Meier. Here are a handful of access points:

  • For information on SpiNNaker contact Furber at the University of Manchester, U.K.
  • Software tools to configure and control the systems are described in the Neuromorphic Guidebook.

Neuromorphic Use“Clearly the machines we are building at the moment are research devices but they have one important feature, they are really extremely configurable. In particular you can also read out the activity of network because you want to understand what is going on,” said Meier. This will change when putting neuromorphic systems into real-world practice.

“Our idea on long term development is to give up on configurability and to give up on monitoring because if you have a neuromorphic chip, for example, that has to detect certain patterns you don’t really want to look as a user on your cell phone, you don’t want to read out any membrane potential or look at all the spike transistors, and look at all the correlations. You just want the thing to work.”

Large-scale systems, similar to those described here, are more likely to be used “to develop circuits that are interesting, that solve interesting problems. Then you export it and you make special dedicated chips optimized to solve this single problem without any configurability or monitoring capability.”

Think neuromorphic FPGAs, said Meier, “You want a dedicated things that can be mass produced and does one thing very well. That’s the way I see it evolving.”

One issue is implementaing local learning (on chip) when the device is in the field, enabling the system to adapt to changing environments. It would open up a new range of applications, agreed Meier, “There’s a study under way now looking at how a car engine changes all the time, its performance changes, and you always want to optimize the efficiency of the engine. It would be really nice to have these local learning capabilities on chip on the system in the field being applied.” There are no technical barriers in theory he said, but still missing technology components.

Nearer term, Meier is optimistic that accelerating learning will occur and that it represents the needed enabler for broader use of neuromorphic computing and for shortening time needed for training. Spike-based systems will play a role here, he believes – “there is very good argument to say the spikes are not only contributing to energy efficiency but also for learning speed. Once you accelerate learning it will be breakthrough for this technology and may change the way you compute fundamentally.”

Slide Source: Prof Karlheinz Meier presenation at ISC2016 (Neuromorphic Computing Concepts, Achievements & Challenges)

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

China Plans 2019 Exascale Machine To Grow Sea Power

August 23, 2017

The glory of having the world's fastest supercomputer, as measured by the Linpack benchmark, has been China's for four years running, first with the 33-petaflops Tianhe-2 and currently with the 93-petaflops TaihuLight. T Read more…

By Tiffany Trader

Microsoft, Intel Unveil FPGA-driven Project Brainwave

August 23, 2017

We know about the seeming light-speed processing power of FPGAs and the natural fit they pose for data-dense AI workloads. But we also know that FPGAs present usability and programmability problems that flummox IT shops. Read more…

By Doug Black

Study Identifies Best Practices for Public-Private HPC Engagement

August 22, 2017

What's the best way for HPC centers in the public sphere to engage with private industry partners to boost the competitiveness of the companies and the larger communities? That question is at the heart of a new study pub Read more…

By Tiffany Trader

HPE Extreme Performance Solutions

Leveraging Deep Learning for Fraud Detection

Advancements in computing technologies and the expanding use of e-commerce platforms have dramatically increased the risk of fraud for financial services companies and their customers. Read more…

Google Launches Site to Share its NYC-based Algorithm Research

August 22, 2017

Much of Google’s algorithm development occurs in groups scattered throughout New York City. Yesterday, Google launched a single website - NYC Algorithms and Optimization Team page - to provide a deeper view into all of Read more…

By John Russell

China Plans 2019 Exascale Machine To Grow Sea Power

August 23, 2017

The glory of having the world's fastest supercomputer, as measured by the Linpack benchmark, has been China's for four years running, first with the 33-petaflop Read more…

By Tiffany Trader

Microsoft, Intel Unveil FPGA-driven Project Brainwave

August 23, 2017

We know about the seeming light-speed processing power of FPGAs and the natural fit they pose for data-dense AI workloads. But we also know that FPGAs present u Read more…

By Doug Black

Study Identifies Best Practices for Public-Private HPC Engagement

August 22, 2017

What's the best way for HPC centers in the public sphere to engage with private industry partners to boost the competitiveness of the companies and the larger c Read more…

By Tiffany Trader

Tech Giants Outline Battle Plans for Future HPC Market

August 21, 2017

Four companies engaged in a cage fight for leadership in the emerging HPC market of the 2020s are, despite deep differences in some areas, in violent agreement Read more…

By Doug Black

Microsoft Bolsters Azure With Cloud HPC Deal

August 15, 2017

Microsoft has acquired cloud computing software vendor Cycle Computing in a move designed to bring orchestration tools along with high-end computing access capabilities to the cloud. Terms of the acquisition were not disclosed. Read more…

By George Leopold

HPE Ships Supercomputer to Space Station, Final Destination Mars

August 14, 2017

With a manned mission to Mars on the horizon, the demand for space-based supercomputing is at hand. Today HPE and NASA sent the first off-the-shelf HPC system i Read more…

By Tiffany Trader

AMD EPYC Video Takes Aim at Intel’s Broadwell

August 14, 2017

Let the benchmarking begin. Last week, AMD posted a YouTube video in which one of its EPYC-based systems outperformed a ‘comparable’ Intel Broadwell-based s Read more…

By John Russell

Deep Learning Thrives in Cancer Moonshot

August 8, 2017

The U.S. War on Cancer, certainly a worthy cause, is a collection of programs stretching back more than 40 years and abiding under many banners. The latest is t Read more…

By John Russell

How ‘Knights Mill’ Gets Its Deep Learning Flops

June 22, 2017

Intel, the subject of much speculation regarding the delayed, rewritten or potentially canceled “Aurora” contract (the Argonne Lab part of the CORAL “ Read more…

By Tiffany Trader

Nvidia’s Mammoth Volta GPU Aims High for AI, HPC

May 10, 2017

At Nvidia's GPU Technology Conference (GTC17) in San Jose, Calif., this morning, CEO Jensen Huang announced the company's much-anticipated Volta architecture a Read more…

By Tiffany Trader

Reinders: “AVX-512 May Be a Hidden Gem” in Intel Xeon Scalable Processors

June 29, 2017

Imagine if we could use vector processing on something other than just floating point problems.  Today, GPUs and CPUs work tirelessly to accelerate algorithms Read more…

By James Reinders

Russian Researchers Claim First Quantum-Safe Blockchain

May 25, 2017

The Russian Quantum Center today announced it has overcome the threat of quantum cryptography by creating the first quantum-safe blockchain, securing cryptocurrencies like Bitcoin, along with classified government communications and other sensitive digital transfers. Read more…

By Doug Black

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

Quantum Bits: D-Wave and VW; Google Quantum Lab; IBM Expands Access

March 21, 2017

For a technology that’s usually characterized as far off and in a distant galaxy, quantum computing has been steadily picking up steam. Just how close real-wo Read more…

By John Russell

Google Debuts TPU v2 and will Add to Google Cloud

May 25, 2017

Not long after stirring attention in the deep learning/AI community by revealing the details of its Tensor Processing Unit (TPU), Google last week announced the Read more…

By John Russell

Groq This: New AI Chips to Give GPUs a Run for Deep Learning Money

April 24, 2017

CPUs and GPUs, move over. Thanks to recent revelations surrounding Google’s new Tensor Processing Unit (TPU), the computing world appears to be on the cusp of Read more…

By Alex Woodie

Leading Solution Providers

HPC Compiler Company PathScale Seeks Life Raft

March 23, 2017

HPCwire has learned that HPC compiler company PathScale has fallen on difficult times and is asking the community for help or actively seeking a buyer for its a Read more…

By Tiffany Trader

Six Exascale PathForward Vendors Selected; DoE Providing $258M

June 15, 2017

The much-anticipated PathForward awards for hardware R&D in support of the Exascale Computing Project were announced today with six vendors selected – AMD Read more…

By John Russell

Trump Budget Targets NIH, DOE, and EPA; No Mention of NSF

March 16, 2017

President Trump’s proposed U.S. fiscal 2018 budget issued today sharply cuts science spending while bolstering military spending as he promised during the cam Read more…

By John Russell

CPU-based Visualization Positions for Exascale Supercomputing

March 16, 2017

In this contributed perspective piece, Intel’s Jim Jeffers makes the case that CPU-based visualization is now widely adopted and as such is no longer a contrarian view, but is rather an exascale requirement. Read more…

By Jim Jeffers, Principal Engineer and Engineering Leader, Intel

Top500 Results: Latest List Trends and What’s in Store

June 19, 2017

Greetings from Frankfurt and the 2017 International Supercomputing Conference where the latest Top500 list has just been revealed. Although there were no major Read more…

By Tiffany Trader

IBM Clears Path to 5nm with Silicon Nanosheets

June 5, 2017

Two years since announcing the industry’s first 7nm node test chip, IBM and its research alliance partners GlobalFoundries and Samsung have developed a proces Read more…

By Tiffany Trader

Graphcore Readies Launch of 16nm Colossus-IPU Chip

July 20, 2017

A second $30 million funding round for U.K. AI chip developer Graphcore sets up the company to go to market with its “intelligent processing unit” (IPU) in Read more…

By Tiffany Trader

Singularity HPC Container Technology Moves Out of the Lab

May 4, 2017

Last week, Singularity – the fast-growing HPC container technology whose development has been spearheaded by Gregory Kurtzer at Lawrence Berkeley National Lab Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This