NERSC is Busily Using Dungeons to Slay Code Dragons

By John Russell

August 24, 2016

Work to modernize codes for use on the National Energy Research Scientific Computing Center (NERSC) Cori supercomputer and its Intel Xeon Phi Knight’s Landing manycore architecture is making steady progress, says NERSC, which has now held eight Dungeon code development sessions with Intel and Cray. The most recent was held earlier this month. These Dungeon sessions, just as the name suggests, bring NERSC researchers together with vendor experts for intense code tweaking sessions.

Approximately 20 members in six teams from the NERSC Exascale Science Applications Program (NESAP) made the latest trip to the ‘Dungeon’ at Intel, working for three days with Intel and Cray engineers. The teams represented six specific codes that were chosen last year for the NESAP program: Quantum ESPRESSO, a materials modeling code; M3D-C1, a plasma simulation code; ACME, CESM and MPAS, all climate modeling codes; and Chombo, an adaptive mesh refinement code used in flow simulations, according to an the NERSC website.

Some of the results:

  • Quantum ESPRESSO. “The team was able to achieve speedups of approximately 2x in the benchmark time, primarily by improving thread scaling and vector and streaming instruction generation with OpenMP (an application program interface) pragmas and employing cache blocking/tiling techniques where appropriate.”
  • M3D-C1. “Bringing two source kernels to the dungeon session, the M3D-C1 team spent their time focusing on two key aspects of the M3D-C1 code: optimizing the matrix assembly stage and testing particle-in-cell (PIC) codes within M3D-C1. In the first instance, they used the Intel Math library to streamline one of the most time-consuming processes in matrix assembly; and also restructured some functions to eliminate overhead and bad speculations, which led to an overall 8x speedup. They also parallelized the code using OpenMP and saw a good parallel scaling for up to 68 cores on a KNL node,” according to the NERSC article. A 3.9x speedup was achieved with PIC.

“Each team came in with a set of goals, parts of their applications that they wanted to investigate at a very deep level,” said Jack Deslippe of the NERSC contingent. “We try to prepare ahead of time to bring the types of problems that can only be solved with the experts at Intel and Cray present – deep questions about the architecture and how applications use the Xeon Phi processor. It’s all geared toward optimizing the codes to run on the new manycore architecture and on Cori.” There were also representatives from several other facilities, including Princeton Plasma Physics Laboratory, Argonne National Laboratory, RPI and NCAR.

Here’s a link to the full article on the NERSC site: http://www.nersc.gov/news-publications/nersc-news/nersc-center-news/2016/latest-nerscintelcray-dungeon-session-yields-impressive-speedups/

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