SC16 Preview: Modernizing, Modularizing Fortran Codes

By Mark Potts

November 9, 2016

The programming language Fortran has been in existence since 1957, and a large percentage of software that runs on HPC systems worldwide is written, at least in part, in Fortran. Since it has been in existence for so long, and so many scientists and engineers learned it early in their careers and have utilized it extensively, much of this code is not up to modern standards of software development.

Although there is no doubt that most of that code works well and runs fast, as codes have grown more complex and involve more developers, errors can easily be introduced. As I’ll discuss in greater detail next week at SC16, these types of errors can be greatly reduced with a more disciplined approach to software development.

Fortunately, the Fortran language has continued to evolve and has incorporated many of the most successful paradigms of more modern languages such as C++ and Java, while still retaining its overall speed and general simplicity. For example, the 2003 standard, which greatly enhanced Fortran 95, introduced pointers to procedures, object-oriented programming, and better interoperability with C among other things.

The new object-oriented paradigm is particularly useful when refactoring existing Fortran code to make it more modular and robust. It is also fairly straight-forward to implement!

It is fair to ask, “Why change something that’s not broken?” In some cases, it may not make any sense to refactor legacy code, but if the code is still being developed actively, and there are multiple contributors to the code base, refactoring with OOP standards makes a lot of sense. Perhaps the most important reason to refactor is to reduce code duplication. There is a tendency among many programmers to simply copy a subroutine or function that does 90% of what is needed and then modify the new routine to fit the rest. This can lead to lots of headaches if something in the original routine needs to be changed or added, and often leads to discrepancies that are hard to trace. Fortunately, using the classes, inheritance, and polymorphism now available in Fortran 2003, this dilemma can be almost completely avoided.

When two or more files contain very similar routines, it is usually possible to combine the shared functionality in a base class and then add derived classes that “finish off” the calculation in their own unique manner. By eliminating the copied code, the new classes will now make use of the same core computation, which can be easily modified for all classes at once and also lends itself very well to the addition of unit testing—a big component to any modern software design. The figures below show a very simple example of this sort of combination using an abstract base class along with two derived classes.

hpcwire-fortran-fig1
Figure 1: This is a simple abstract base class with a procedure (process_most_data) defined to handle the common core of computation.

 

hpcwire-fortran-fig2a
.
hpcwire-fortran-fig2b
Figure 2: Sample derived classes (sample_one_class and sample_two_class)

Both derived classes inherit the process_most_data procedure from the abstract base class, and both use that function directly in their own version of process_data. The “=>” seen under the extends command refers to the fact that the process_data procedure required in the base class has been implemented locally and renamed within the specific derived class. Figure 3 below shows a sample driver routine that allocates both classes, sets the initial data value for each and then has each instance process the data according to its version of the procedure.

hpcwire-fortran-fig3
Figure 3: Sample driver program that calls two derived classes and processes sample data.

When compiled and run, the output looks as follows:

first data is now    33.000000000000000
second data is now    22.000000000000000

Both derived classes (first and second) start with data equal to 10.0 when each is called to run the process_data routine. Each then runs through the common core functionality provided by the abstract base class and then performs its own individual calculation. In the case of first, that is multiply by 3.0; for second, it is multiply by 2.0.

While this is clearly a trivial example of combining common calculations into a single procedure, it provides a template for doing so in an object-oriented manner using Fortran. Because abstract classes cannot be instantiated, the use of an abstract base class in this instance also ensures that no future developer will accidentally try to use it rather than a fully defined derived class.

Extending this idea even further, unit tests can now be added to these new classes. Using pFUnit, which is an open source unit-testing framework for Fortran, a unit test for sample_one_class would look something like Figure 4.

hpcwire-fortran-fig4
Figure 4

In the sample unit test shown in Figure 4, most of the text is boilerplate, with only the highlighted red text indicating the tailoring for the sample class. The class is included at the top of the file, it is defined under @TestCase, allocated in setup, and deallocated in tearDown—all with very simple additions to the boilerplate. The actual test takes place in testSampleOne where the process_data procedure is called after starting with an initial data value of 10.0. The AssertEqual command checks that the value of data matches 33.0, as it should after the process_data procedure is complete. This sort of test will run extremely quickly and will provide an early warning sign if the base class is changed without making sure that all derived classes are updated appropriately.

I’ll be presenting on this topic at SC16 on Wednesday, Nov. 16 at 4 p.m., and would be happy to answer your questions. Please stop by!

About the Author:

Mark Potts, Ph.D., is a Senior Computational Scientist at RedLine Performance Solutions, LLC. Dr. Potts has over 20 years of software development experience, including more than 15 years of work in research and application development using HPC systems. He joined Redline Performance Solutions in 2015 and has since been working with NOAA to accelerate and modernize their Gridpoint Statistical Interpolation (GSI) analysis code used to assimilate data into operational weather models.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Pittsburgh Supercomputer Powers Machine Learning Analysis of Rare East Asian Stamps

September 27, 2021

Setting aside the relatively recent rise of electronic signatures, personalized stamps have been a popular form of identification for formal documents in East Asia. These identifiers – easily forged, but culturally ubi Read more…

Purdue Researchers Peer into the ‘Fog of the Machine Learning Accelerator War’

September 27, 2021

Making sense of ML performance and benchmark data is an ongoing challenge. In light of last week’s release of the most recent MLPerf (v1.1) inference results, now is perhaps a good time to review how valuable (or not) Read more…

Quantum Monte Carlo at Exascale Could Be Key to Finding New Semiconductor Materials

September 27, 2021

Researchers are urgently trying to identify possible materials to replace silicon-based semiconductors. The processing power in modern computers continues to increase even as the size of the silicon on which components a Read more…

The Case for an Edge-Driven Future for Supercomputing

September 24, 2021

“Exascale only becomes valuable when it’s creating and using data that we care about,” said Pete Beckman, co-director of the Northwestern-Argonne Institute of Science and Engineering (NAISE), at the most recent HPC Read more…

Three Universities Team for NSF-Funded ‘ACES’ Reconfigurable Supercomputer Prototype

September 23, 2021

As Moore’s law slows, HPC developers are increasingly looking for speed gains in specialized code and specialized hardware – but this specialization, in turn, can make testing and deploying code trickier than ever. Now, researchers from Texas A&M University, the University of Illinois at Urbana... Read more…

AWS Solution Channel

Introducing AWS ParallelCluster 3

Running HPC workloads, like computational fluid dynamics (CFD), molecular dynamics, or weather forecasting typically involves a lot of moving parts. You need a hundreds or thousands of compute cores, a job scheduler for keeping them fed, a shared file system that’s tuned for throughput or IOPS (or both), loads of libraries, a fast network, and a head node to make sense of all this. Read more…

Qubit Stream: Monte Carlo Advance, Infosys Joins the Fray, D-Wave Meeting Plans, and More

September 23, 2021

It seems the stream of quantum computing reports never ceases. This week – IonQ and Goldman Sachs tackle Monte Carlo on quantum hardware, Cambridge Quantum pushes chemistry calculations forward, D-Wave prepares for its Read more…

Quantum Monte Carlo at Exascale Could Be Key to Finding New Semiconductor Materials

September 27, 2021

Researchers are urgently trying to identify possible materials to replace silicon-based semiconductors. The processing power in modern computers continues to in Read more…

The Case for an Edge-Driven Future for Supercomputing

September 24, 2021

“Exascale only becomes valuable when it’s creating and using data that we care about,” said Pete Beckman, co-director of the Northwestern-Argonne Institut Read more…

Three Universities Team for NSF-Funded ‘ACES’ Reconfigurable Supercomputer Prototype

September 23, 2021

As Moore’s law slows, HPC developers are increasingly looking for speed gains in specialized code and specialized hardware – but this specialization, in turn, can make testing and deploying code trickier than ever. Now, researchers from Texas A&M University, the University of Illinois at Urbana... Read more…

Qubit Stream: Monte Carlo Advance, Infosys Joins the Fray, D-Wave Meeting Plans, and More

September 23, 2021

It seems the stream of quantum computing reports never ceases. This week – IonQ and Goldman Sachs tackle Monte Carlo on quantum hardware, Cambridge Quantum pu Read more…

Asetek Announces It Is Exiting HPC to Protect Future Profitability

September 22, 2021

Liquid cooling specialist Asetek, well-known in HPC circles for its direct-to-chip cooling technology that is inside some of the fastest supercomputers in the world, announced today that it is exiting the HPC space amid multiple supply chain issues related to the pandemic. Although pandemic supply chain... Read more…

TACC Supercomputer Delves Into Protein Interactions

September 22, 2021

Adenosine triphosphate (ATP) is a compound used to funnel energy from mitochondria to other parts of the cell, enabling energy-driven functions like muscle contractions. For ATP to flow, though, the interaction between the hexokinase-II (HKII) enzyme and the proteins found in a specific channel on the mitochondria’s outer membrane. Now, simulations conducted on supercomputers at the Texas Advanced Computing Center (TACC) have simulated... Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-ap Read more…

Why HPC Storage Matters More Now Than Ever: Analyst Q&A

September 17, 2021

With soaring data volumes and insatiable computing driving nearly every facet of economic, social and scientific progress, data storage is seizing the spotlight. Hyperion Research analyst and noted storage expert Mark Nossokoff looks at key storage trends in the context of the evolving HPC (and AI) landscape... Read more…

Ahead of ‘Dojo,’ Tesla Reveals Its Massive Precursor Supercomputer

June 22, 2021

In spring 2019, Tesla made cryptic reference to a project called Dojo, a “super-powerful training computer” for video data processing. Then, in summer 2020, Tesla CEO Elon Musk tweeted: “Tesla is developing a [neural network] training computer called Dojo to process truly vast amounts of video data. It’s a beast! … A truly useful exaflop at de facto FP32.” Read more…

Enter Dojo: Tesla Reveals Design for Modular Supercomputer & D1 Chip

August 20, 2021

Two months ago, Tesla revealed a massive GPU cluster that it said was “roughly the number five supercomputer in the world,” and which was just a precursor to Tesla’s real supercomputing moonshot: the long-rumored, little-detailed Dojo system. “We’ve been scaling our neural network training compute dramatically over the last few years,” said Milan Kovac, Tesla’s director of autopilot engineering. Read more…

Esperanto, Silicon in Hand, Champions the Efficiency of Its 1,092-Core RISC-V Chip

August 27, 2021

Esperanto Technologies made waves last December when it announced ET-SoC-1, a new RISC-V-based chip aimed at machine learning that packed nearly 1,100 cores onto a package small enough to fit six times over on a single PCIe card. Now, Esperanto is back, silicon in-hand and taking aim... Read more…

CentOS Replacement Rocky Linux Is Now in GA and Under Independent Control

June 21, 2021

The Rocky Enterprise Software Foundation (RESF) is announcing the general availability of Rocky Linux, release 8.4, designed as a drop-in replacement for the soon-to-be discontinued CentOS. The GA release is launching six-and-a-half months after Red Hat deprecated its support for the widely popular, free CentOS server operating system. The Rocky Linux development effort... Read more…

Intel Completes LLVM Adoption; Will End Updates to Classic C/C++ Compilers in Future

August 10, 2021

Intel reported in a blog this week that its adoption of the open source LLVM architecture for Intel’s C/C++ compiler is complete. The transition is part of In Read more…

Hot Chips: Here Come the DPUs and IPUs from Arm, Nvidia and Intel

August 25, 2021

The emergence of data processing units (DPU) and infrastructure processing units (IPU) as potentially important pieces in cloud and datacenter architectures was Read more…

AMD-Xilinx Deal Gains UK, EU Approvals — China’s Decision Still Pending

July 1, 2021

AMD’s planned acquisition of FPGA maker Xilinx is now in the hands of Chinese regulators after needed antitrust approvals for the $35 billion deal were receiv Read more…

Google Launches TPU v4 AI Chips

May 20, 2021

Google CEO Sundar Pichai spoke for only one minute and 42 seconds about the company’s latest TPU v4 Tensor Processing Units during his keynote at the Google I Read more…

Leading Solution Providers

Contributors

HPE Wins $2B GreenLake HPC-as-a-Service Deal with NSA

September 1, 2021

In the heated, oft-contentious, government IT space, HPE has won a massive $2 billion contract to provide HPC and AI services to the United States’ National Security Agency (NSA). Following on the heels of the now-canceled $10 billion JEDI contract (reissued as JWCC) and a $10 billion... Read more…

Julia Update: Adoption Keeps Climbing; Is It a Python Challenger?

January 13, 2021

The rapid adoption of Julia, the open source, high level programing language with roots at MIT, shows no sign of slowing according to data from Julialang.org. I Read more…

10nm, 7nm, 5nm…. Should the Chip Nanometer Metric Be Replaced?

June 1, 2020

The biggest cool factor in server chips is the nanometer. AMD beating Intel to a CPU built on a 7nm process node* – with 5nm and 3nm on the way – has been i Read more…

Quantum Roundup: IBM, Rigetti, Phasecraft, Oxford QC, China, and More

July 13, 2021

IBM yesterday announced a proof for a quantum ML algorithm. A week ago, it unveiled a new topology for its quantum processors. Last Friday, the Technical Univer Read more…

Intel Launches 10nm ‘Ice Lake’ Datacenter CPU with Up to 40 Cores

April 6, 2021

The wait is over. Today Intel officially launched its 10nm datacenter CPU, the third-generation Intel Xeon Scalable processor, codenamed Ice Lake. With up to 40 Read more…

Frontier to Meet 20MW Exascale Power Target Set by DARPA in 2008

July 14, 2021

After more than a decade of planning, the United States’ first exascale computer, Frontier, is set to arrive at Oak Ridge National Laboratory (ORNL) later this year. Crossing this “1,000x” horizon required overcoming four major challenges: power demand, reliability, extreme parallelism and data movement. Read more…

Intel Unveils New Node Names; Sapphire Rapids Is Now an ‘Intel 7’ CPU

July 27, 2021

What's a preeminent chip company to do when its process node technology lags the competition by (roughly) one generation, but outmoded naming conventions make it seem like it's two nodes behind? For Intel, the response was to change how it refers to its nodes with the aim of better reflecting its positioning within the leadership semiconductor manufacturing space. Intel revealed its new node nomenclature, and... Read more…

The Latest MLPerf Inference Results: Nvidia GPUs Hold Sway but Here Come CPUs and Intel

September 22, 2021

The latest round of MLPerf inference benchmark (v 1.1) results was released today and Nvidia again dominated, sweeping the top spots in the closed (apples-to-ap Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire