KNUPATH Hermosa-based Commercial Boards Expected in Q1 2017

By John Russell

December 15, 2016

Last June tech start-up KnuEdge emerged from stealth mode to begin spreading the word about its new processor and fabric technology that’s been roughly a decade in the making. It’s nice to have patient capital, a rare commodity for startups these days. The company contends its KNUPATH Hermosa processor with 256 DSP cores and its Lambda fabric will bring performance, scalability, energy, and programmability advantages over CPUs, GPUS, and FPGAs to a wide swath of machine learning applications. The first commercial boards – code named Mavericks – are expected around March this year.

Founded in the 2005 timeframe by Daniel Goldin, the long time NASA administrator, KnuEdge has raised roughly $100M no doubt stemming from investor confidence in Goldin’s extensive technology creation and delivery history. Goldin and company believe their investors’ patience is about to start paying off. KnuEdge has two business units, KNUPATH focused on hardware accelerators based on Hermosa and Lambda technology, and KnuVerse, focused on voice and face recognition systems. The latter, said Steve Cumings, CMO, KnuEdge, has customers in the government sector. Company revenues are somewhat north of $20 million so far.

Broadly, KnuEdge’s view is that a highly scalable processor in a single socket is handicapped in addressing growing machine learning and large-scale computing challenges. In contrast, the company’s Lambda Fabric enables a large number of “KNUPATH Hermosa processors to be interconnected in low latency, high throughput mesh for massively parallel processing which is well suited for application needs that will drive the compute engines of the future.”

This isn’t exactly a new idea. The Hermosa chip and Lambda technology will enter the market amid a gush of machine learning technologies all striving to advance data-driven science and enterprise data analytics. Indeed the emergence of heterogeneous computing architectures relying on a variety of accelerator engines is a key feature of today’s computing landscape. Given Goldin’s remarkable achievements at NASA it should be interesting to watch KnuEdge’s progress.

Early developer boards with two Hermosa chips have been available for some time. Volume sales of individual chips are planned to begin in January followed by the Mavericks offering, a PCIe board with four Hermosa chips, towards the end of the quarter.

Presented as a “neural computing” approach, the KNUPATH architecture actually attempts to mimic nervous system communication more than brain-inspired spiky neuron ‘inference logic’ (discussed further below).

Patrick Patla, senior vice president and general manager of KNUPATH and a former AMD executive, said, “What’s unique about Hermosa’s 256 DSP cores is that they are hooked together at a central part of the processor with a router that has 16 ports. Using the Lambda fabric, it’s possible, at least theoretically, to scale to 500,000 Hermosa processors.

“We are a data flow machine. So you push data through the system and can have the calculation and different algorithms change on the fly. We are different than a GPU accelerator in that they use a SIMD architecture. We use multiple programs, multiple data, so on our 256 cores we could have 256 separate algorithms running. You would push data through those algorithms and then you have hits on the data at different hit rates based on the algorithms and you can tune and resend algorithms to those DSPs through packets,” explained Patla.

“Basically the packets that we send through the Lambda network are what allows the programming of the DSP, so packets deliver the program, the algorithm, and then bring the payload, and push the data through it. Not only are you getting all the data and the operating instructions with each packet, but each core also knows the next destination for that information so it’s extremely efficient.” One result is very low latency at various systems levels (see diagram below).

Patla also contrasted Hermosa’s ease of use with emerging brain-inspired neuromorphic chips such as IBM’s TrueNorth, which uses “spiking neuron” architecture.

“Spiky algorithms are notoriously difficult to program. Commonly they are trained on other networks first and then moved onto the neuromorphic chip so the actual software side of that is different,” he said.

As noted earlier the Hermosa-Lambda architecture emulates neuronal connectivity more than brain processing. “If you look at the different neuron-based approaches, our inspiration really gives you lots of little engines – that’s the background of the DSP cores, what we affectionately sometimes call tDSPs or tiny DSPs,” said Patla. Reliance on familiar DSP architecture eases programming.

“Our tools sit on a C/C++ library set on top of LLVM (compiler). And everybody is familiar with OpenCL as well as OpenMPI which is very comfortable in our architecture,” said Patla. The Hermosa/Lambda architecture also supports NUMA (non uniform memory access) and each processor has memory directly (72MB) on it. “Much of the advantage is the dataflow but also all the advantages of common programming techniques for anybody that has worked on OpenMPI. Many of the other [neuromorphic] architecture require a different set of tools.”

Hermosa Development Board

KnuEdge has had a software developer kit out for “quite some time” and it is already in the hands of many developers, according to Patla.

It all sounds great. In April KnuEdge will hold a Hermosa developers’ conference at UCSD as well as a “heterogeneous neural network conference” in partnership with UCSD for the development of next generation algorithms that can take advantage of new architectures such as Hermosa. Patla said performance benchmarks for chip will be forthcoming with the release of the commercial product; it seems like the developer conference would be a good place to do so, but he wouldn’t specify when beyond the first half of the year.

“Right now, as you would imagine, we are in the labs with our SDKs and final verification of those commercial systems as we are tuning and bringing all of our code to the processors. In the future we’ll show configurations of 4, 8, 12, 16, Hermosas together to show the scalability of the Lambda fabric. When Steve talked about mimicking the nervous systems it really is about our connectivity and the fact that when you add more Hermosas to the network, we continue to scale because with every socket you are adding more memory as well. Each processor has 72MB of onchip memory that is sufficient for the programming of our kinds of algorithms and the workload we are trying to tackle.”

Currently the chip is being fabbed by GLOBALFOUNDARIES on the 32nm process. “It’s a well behaved chip where these 256 cores and fabric and everything lives in a 35-watt part,” said Patla.

The KNUPATH folks believe Hermosa has the potential to meet a wide variety of machine-learning kinds of applications performed in heterogeneous computing environments as well as an opportunity to replace existing approaches to those applications.

‘We have a demo on the website that compares us to the most current NVIDIA card and we have a 2.5x performance. It is very interesting that a video card isn’t very good at video compression that we are good at because of the parallelism of communication we handle across the memory. So that’s one of the spaces we’ll be aiming at. And of course it will also find its way into many of the single board computer spaces because at 35 watts and the ability to do signal processing and such fine grained computing we actually expect it to replace many FPGAs in a lot of environments.”

Patla argues Hermosa/Lambda’s flexibility is a major benefit and door opener – one could divvy the chips up and have a multipurpose SOC instead of dedicating it to just one task. He used a video analysis application as an example of flexibility and reprogrammability.

“You can reprogram a core by just delivering a new packet. For example, if you were doing video analysis and were searching within videos, you could be looking for ball caps. You could have all the different algorithms looking at ball caps and you could just all of a sudden reprogram and divide the chip and have 25 percent of the chip looking for red ball caps and 25 percent looking for blue caps. You could flip to four different algorithms in nanoseconds. Then when you have high hit rates and you realize the one you are really looking for, and you could say OK now all care about our green ball caps and that algorithm would propagate against all the cores and you’d be able to take your throughput up. It’s very fast, very flexible,” he said.

At SC16, the KNUPATH team was busily evangelizing. Patla said they talked to a number of cloud providers as well as national labs that expressed interest to the point that he is expecting some new workloads to emerge.

There’s still much to do. Patla ticked off desirable milestones for 2017 – getting out of the lab, showcasing a couple of commercial customers and workloads, integrating the many machine learning frameworks, making sure Hermosa-based systems get into the cloud somewhere for development and production purposes, to name but a few.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

HPC in Life Sciences Part 1: CPU Choices, Rise of Data Lakes, Networking Challenges, and More

February 21, 2019

For the past few years HPCwire and leaders of BioTeam, a research computing consultancy specializing in life sciences, have convened to examine the state of HPC (and now AI) use in life sciences. Without HPC writ large, modern life sciences research would quickly grind to a halt. It’s true most life sciences research computing... Read more…

By John Russell

Arm Unveils Neoverse N1 Platform with up to 128-Cores

February 20, 2019

Following on its Neoverse roadmap announcement last October, Arm today revealed its next-gen Neoverse microarchitecture with compute and throughput-optimized silicon designs catered toward general-purpose cloud computing Read more…

By Tiffany Trader

The Internet of Criminal Things—Trust in the Gods but Verify!

February 20, 2019

“Are we under attack?” asked Professor Elmarie Biermann of the Cyber Security Institute during the recent South African Centre for High Performance Computing’s (CHPC) National Conference in Cape Town. A quick show Read more…

By Elizabeth Leake, STEM-Trek

HPE Extreme Performance Solutions

HPE and Intel® Omni-Path Architecture: How to Power a Cloud

Learn how HPE and Intel® Omni-Path Architecture provide critical infrastructure for leading Nordic HPC provider’s HPCFLOW cloud service.

powercloud_blog.jpgFor decades, HPE has been at the forefront of high-performance computing, and we’ve powered some of the fastest and most robust supercomputers in the world. Read more…

IBM Accelerated Insights

The Perils of Becoming Trapped in the Cloud

Terms like ‘open systems’ have been bandied about for decades. While modern computer systems are relatively open compared to their predecessors, there are still plenty of opportunities to become locked into proprietary interfaces. Read more…

Machine Learning Takes Heat for Science’s Reproducibility Crisis

February 19, 2019

Scientists are raising red flags about the accuracy and reproducibility of conclusions drawn by machine learning frameworks. Among the remedies are developing new ML systems that can question their own predictions, show Read more…

By George Leopold

HPC in Life Sciences Part 1: CPU Choices, Rise of Data Lakes, Networking Challenges, and More

February 21, 2019

For the past few years HPCwire and leaders of BioTeam, a research computing consultancy specializing in life sciences, have convened to examine the state of HPC (and now AI) use in life sciences. Without HPC writ large, modern life sciences research would quickly grind to a halt. It’s true most life sciences research computing... Read more…

By John Russell

Arm Unveils Neoverse N1 Platform with up to 128-Cores

February 20, 2019

Following on its Neoverse roadmap announcement last October, Arm today revealed its next-gen Neoverse microarchitecture with compute and throughput-optimized si Read more…

By Tiffany Trader

Insights from Optimized Codes on Cineca’s Marconi

February 15, 2019

What can you do with 381,392 CPU cores? For Cineca, it means enabling computational scientists to expand a large part of the world’s body of knowledge from the nanoscale to the astronomic, from calculating quantum effects in new materials to supporting bioinformatics for advanced healthcare research to screening millions of possible chemical combinations to attack a deadly virus. Read more…

By Ken Strandberg

ClusterVision in Bankruptcy, Fate Uncertain

February 13, 2019

ClusterVision, European HPC specialists that have built and installed over 20 Top500-ranked systems in their nearly 17-year history, appear to be in the midst o Read more…

By Tiffany Trader

UC Berkeley Paper Heralds Rise of Serverless Computing in the Cloud – Do You Agree?

February 13, 2019

Almost exactly ten years to the day from publishing of their widely-read, seminal paper on cloud computing, UC Berkeley researchers have issued another ambitious examination of cloud computing - Cloud Programming Simplified: A Berkeley View on Serverless Computing. The new work heralds the rise of ‘serverless computing’ as the next dominant phase of cloud computing. Read more…

By John Russell

Iowa ‘Grows Its Own’ to Fill the HPC Workforce Pipeline

February 13, 2019

The global workforce that supports advanced computing, scientific software and high-speed research networks is relatively small when you stop to consider the magnitude of the transformative discoveries it empowers. Technical conferences provide a forum where specialists convene to learn about the latest innovations and schedule face-time with colleagues from other institutions. Read more…

By Elizabeth Leake, STEM-Trek

Trump Signs Executive Order Launching U.S. AI Initiative

February 11, 2019

U.S. President Donald Trump issued an Executive Order (EO) today launching a U.S Artificial Intelligence Initiative. The new initiative - Maintaining American L Read more…

By John Russell

Celebrating Women in Science: Meet Four Women Leading the Way in HPC

February 11, 2019

One only needs to look around at virtually any CS/tech conference to realize that women are underrepresented, and that holds true of HPC. SC hosts over 13,000 H Read more…

By AJ Lauer

Quantum Computing Will Never Work

November 27, 2018

Amid the gush of money and enthusiastic predictions being thrown at quantum computing comes a proposed cold shower in the form of an essay by physicist Mikhail Read more…

By John Russell

Cray Unveils Shasta, Lands NERSC-9 Contract

October 30, 2018

Cray revealed today the details of its next-gen supercomputing architecture, Shasta, selected to be the next flagship system at NERSC. We've known of the code-name "Shasta" since the Argonne slice of the CORAL project was announced in 2015 and although the details of that plan have changed considerably, Cray didn't slow down its timeline for Shasta. Read more…

By Tiffany Trader

The Case Against ‘The Case Against Quantum Computing’

January 9, 2019

It’s not easy to be a physicist. Richard Feynman (basically the Jimi Hendrix of physicists) once said: “The first principle is that you must not fool yourse Read more…

By Ben Criger

AMD Sets Up for Epyc Epoch

November 16, 2018

It’s been a good two weeks, AMD’s Gary Silcott and Andy Parma told me on the last day of SC18 in Dallas at the restaurant where we met to discuss their show news and recent successes. Heck, it’s been a good year. Read more…

By Tiffany Trader

Intel Reportedly in $6B Bid for Mellanox

January 30, 2019

The latest rumors and reports around an acquisition of Mellanox focus on Intel, which has reportedly offered a $6 billion bid for the high performance interconn Read more…

By Doug Black

ClusterVision in Bankruptcy, Fate Uncertain

February 13, 2019

ClusterVision, European HPC specialists that have built and installed over 20 Top500-ranked systems in their nearly 17-year history, appear to be in the midst o Read more…

By Tiffany Trader

US Leads Supercomputing with #1, #2 Systems & Petascale Arm

November 12, 2018

The 31st Supercomputing Conference (SC) - commemorating 30 years since the first Supercomputing in 1988 - kicked off in Dallas yesterday, taking over the Kay Ba Read more…

By Tiffany Trader

Looking for Light Reading? NSF-backed ‘Comic Books’ Tackle Quantum Computing

January 28, 2019

Still baffled by quantum computing? How about turning to comic books (graphic novels for the well-read among you) for some clarity and a little humor on QC. The Read more…

By John Russell

Leading Solution Providers

SC 18 Virtual Booth Video Tour

Advania @ SC18 AMD @ SC18
ASRock Rack @ SC18
DDN Storage @ SC18
HPE @ SC18
IBM @ SC18
Lenovo @ SC18 Mellanox Technologies @ SC18
NVIDIA @ SC18
One Stop Systems @ SC18
Oracle @ SC18 Panasas @ SC18
Supermicro @ SC18 SUSE @ SC18 TYAN @ SC18
Verne Global @ SC18

Contract Signed for New Finnish Supercomputer

December 13, 2018

After the official contract signing yesterday, configuration details were made public for the new BullSequana system that the Finnish IT Center for Science (CSC Read more…

By Tiffany Trader

Deep500: ETH Researchers Introduce New Deep Learning Benchmark for HPC

February 5, 2019

ETH researchers have developed a new deep learning benchmarking environment – Deep500 – they say is “the first distributed and reproducible benchmarking s Read more…

By John Russell

IBM Quantum Update: Q System One Launch, New Collaborators, and QC Center Plans

January 10, 2019

IBM made three significant quantum computing announcements at CES this week. One was introduction of IBM Q System One; it’s really the integration of IBM’s Read more…

By John Russell

IBM Bets $2B Seeking 1000X AI Hardware Performance Boost

February 7, 2019

For now, AI systems are mostly machine learning-based and “narrow” – powerful as they are by today's standards, they're limited to performing a few, narro Read more…

By Doug Black

HPC Reflections and (Mostly Hopeful) Predictions

December 19, 2018

So much ‘spaghetti’ gets tossed on walls by the technology community (vendors and researchers) to see what sticks that it is often difficult to peer through Read more…

By John Russell

Nvidia’s Jensen Huang Delivers Vision for the New HPC

November 14, 2018

For nearly two hours on Monday at SC18, Jensen Huang, CEO of Nvidia, presented his expansive view of the future of HPC (and computing in general) as only he can do. Animated. Backstopped by a stream of data charts, product photos, and even a beautiful image of supernovae... Read more…

By John Russell

The Deep500 – Researchers Tackle an HPC Benchmark for Deep Learning

January 7, 2019

How do you know if an HPC system, particularly a larger-scale system, is well-suited for deep learning workloads? Today, that’s not an easy question to answer Read more…

By John Russell

Intel Confirms 48-Core Cascade Lake-AP for 2019

November 4, 2018

As part of the run-up to SC18, taking place in Dallas next week (Nov. 11-16), Intel is doling out info on its next-gen Cascade Lake family of Xeon processors, specifically the “Advanced Processor” version (Cascade Lake-AP), architected for high-performance computing, artificial intelligence and infrastructure-as-a-service workloads. Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This