Dr. Eng Lim Goh Hails New Frontier of Scalable Learning

By Tiffany Trader

March 2, 2017

Dr. Eng Lim Goh is one of the leading HPC visionaries of our time. He’s been the driving force behind SGI’s technical computing program for nearly two decades, and since the HPE-SGI joining last November, Goh’s role goes forward as vice president and SGI chief technology officer at HPE.

HPC’s ability to drive innovation and benefit humanity is always top of mind to Goh and he is an enthusiastic proponent of AI and deep learning, fast-moving fields that are being propelled by the confluence and availability of big compute and big data.

Eng Lim Goh

Goh was one of the lead designers on the recently-announced Tsubame AI supercomputer, which is now shipping to the Tokyo Institute of Technology (TiTech). With 47 petaflops of 16-bit AI horsepower, Tsubame3.0 will be one of the largest AI supercomputers in the world when it comes online this summer, and will be the largest in Japan. The system is organized around the concept of what Goh and HPE are calling scalable learning, not just for production deep learning as we know it but to set the stage for near-real time training, so models can learn on the fly.

In this interview with HPCwire, Dr. Goh reviews the current state of AI supercomputing, outlines his vision for where the field is headed and provides insight into the converged SGI-HPE roadmap.

HPCwire: AI is not a new field, but computational power and the availability of data have enabled this renaissance for machine learning and deep learning — how do you view the relationship between HPC and AI?

Dr. Eng Lim Goh: HPC traditionally has been one where you run simulations. You take in small amounts of data, you run your formulas, equations, and you process these data and then you produce massive amounts of data. That has always been the typical approach. Then over the years, this produced data is starting to become a load on the analytics side, to get the insights from these data. I’ve heard of customers who are saying they’ve only managed to analyze 10 percent of the data produced because things were getting a bit behind on the analysis side. They have been smart about selecting what 10 percent to analyze and they have been producing good results anyway, but more and more you’re realizing that the analysis side is becoming an issue not only just in HPC, but also for the instrument side, the Square Kilometre Array, Large Hadron Collider and so on.

So instruments and HPC are generating a large amount of data increasing the load on the analysis side. With an analysis engine, you’re taking all that data in to try to produce some insight at the other end. Lots of data goes in, distilled insight comes out. A haystack goes in and a needle comes out – that is essentially what that analysis is like. The world therefore has started to invest more and more on the analysis side.

I view this analysis as intensive human-in-the-loop analysis, where an analyst sits there, picks the data, runs some algorithm, produces the next step in that data, then the analyst again – the human-in-the-loop – runs other sets of algorithms to produce an output, going through this loop that ultimately produces insight.

At some point as data keeps growing, this intensive human-in-the-loop needs to have a better way, and I believe that is one of the reasons that AI has reemerged, because of the intensity of the human-in-loop and the questions from analysts to see if there’s a way to reduce this intensity. The motivation gives rise to machine learning where you can automate a bit more of the analysis and thus reduce the intensity of the human-in-the-loop in the analysis process.

So one approach therefore to reduce the intensity of the human-in-the-loop is through machine learning and this is how they do it. They take all the massive amounts of data and put it through a learning algorithm and then the learning algorithm ultimately achieves some decision-making capability and the next set of data that comes along, this machine learning algorithm is then applied to it – and now you can see the level of human intervention, the intensity of that human-in-loop, is reduced now because of the increased automation.

The other reason for the reemergence is there’s now enough data more easily available to do machine learning because machine learning requires massive amounts of data. If you go back 30 years the internet wasn’t there, the ability to have this availability of data was much less and the amount of data wasn’t as big. So this is the second reason – the massive amounts of data more readily available gave rise to the resurgence in machine learning.

And then you hear all these terms, machine learning, deep learning, AI, neural network. And the relationship among them I keep emphasizing among our teams and to customers and in my talks is as follows.

A machine learns to be artificially intelligent; that’s the relationship between the two, machine learning and AI. And a method of machine learning is called neural network and a multi-tier or multi-stage neural network is called deep learning.

And that’s how the four terms are related, and it turns out the more popular way today to achieve machine learning is through deep learning and deep learning is really a multi-stage neural network which is a method of machine learning and through machine learning you get artificial intelligence.

HPCwire: How do supervised and unsupervised learning intersect here?

Goh: Supervised, unsupervised and reinforcement learning are the three things. To simplify it, there are two things you have to do in supervised learning, there is a teacher and the teacher does two things. Label the inputs, so there’s a picture of cat, there’s a picture of cat, there’s not a picture of cat.

The second thing the teacher does is to run the supervision, to be the supervisor as the machine makes these wild guesses as to whether it got it right or wrong; this is called supervised learning. With reinforcement learning, you take two instances of the machine learning algorithm and get them to play each other. In the reinforcement learning the teacher has taken a step back and has less involvement.

This year in January, for the first time, the Carnegie Mellon University poker bot running on an HPE supercomputer beat four of the world’s top poker players in a game of Texas Heads-Up No-Limit poker [see our coverage here]. Last year it tried and lost, only beating one poker player out of four; this year it beat all four. Beat in a way that the sum total of all winnings was $1.7 million, while last year the machine lost $700,000.

With poker, unlike chess, you don’t know your opponent’s position; it is incomplete information and therefore the AI/ML algorithm needs to actually make guesses as to what your opponent has, and it turns out that this is actually important in real life to do AI. When you are negotiating, or when you are doing an auction, you don’t quite know what your opponents are thinking and this poker AI program that CMU has developed is not specifically just for poker; in real life it can be used as a negotiator or as a bidder in an auction.

After the CMU poker match, a player asked one of the developers, “Why did the algorithm, the poker bot, apply the bluff in this way?” The developer said they didn’t know the answer. This is the implication of what it means to have supervised and reinforcement learning. The algorithm is smart enough to make the right decision most of the time, but we are starting to not quite know why it is making those decisions.

Unsupervised learning is more, in my opinion, the frontier, where you’re saying as the teacher, I’m not going to do much, I’m not going to supervise, I’m just going to give the AI algorithm massive amounts of data that is unlabeled.

HPCwire: Let’s talk about the importance of scaling these models.

Goh: Learning takes a long time. If you’ve heard of Google’s cat experiment, they were taking in millions of pictures of cats and it took days, weeks or sometimes months depending on how big the machine is to complete that learning process before you can even start making decisions using that learned machine. You don’t have equations like in the HPC case. You essentially have an adder, you’re taking all this data and making guesses, you guess until you got it right and at the end of it, you produce a matrix of weights. In Google’s case, they call those weights tensors and that’s why they are building tensor processors.

The inference part of machine learning is based on the generation of weights or tensors at the end of that learned process. So you’re putting massive amounts of data to the machine learning algorithm and what the machine algorithm ultimately gets is a set or matrix of weights. This type of input gets more weight and this one gets less weight. The question is if you want to learn fast before you can start inferring using your weights, that is to produce your weights fast. Here you can see the funnel: massive data goes in and you produce little data out and that little data is essentially a matrix of weights.

The thing is, you want to learn fast. If you don’t want to take weeks or months to do learning because of the massive amount of data you have to ingest to make guesses on, what do you do? What you do is you scale your machine – this is where we come in right? You have to scale the machine because you can’t scale humans.

A “Co-Design” photo of the newly designed Tsubame3 blade, with TiTech Professor Satoshi Matsuoka and SGI CTO Dr. Goh. Source.

We can’t put two human minds together and hopefully reduce 20 years of education to 10 years, but machines we can scale. We can build a bigger machine to ingest more data and that’s exactly what TiTech does and that’s exactly what ABCI [short for AI Bridging Cloud Infrastructure, see our coverage here], which is the follow-on machine [to Tsubame3.0], will do even more. AIST, the new institute related to TiTech through Professor Satoshi Matsuoka, managing director of AIST, is looking at the next-generation cloud-based machine for artificial intelligence. He has this passion to build the world’s biggest AI machine. And TiTech is one part of it – the first step to scale machine learning – to take that learning process that would typically take months down to weeks, but you want to bring it down to days and even lower.

HPCwire: Can you tie this vision for scalable learning into the hardware and software challenges and what innovations are taking place there?

Goh: This was where we worked to fully understand Professor Matsuoka’s requirements. He’s the visionary and he thinks in a very scalable big way of what’s the next step for machine learning and if I were to simplify the idea it is to learn really fast through scaling, but scaling isn’t just buying more computers, just like with HPC.

High-performance computing isn’t just buying a million laptops and put them on the internet and create a virtual machine; it involves picking the right processor, picking the right interconnect and using the connection in the right way that suits the specific application and then the software layers that are on top of it. So this is the full set of requirements to achieve HPC and it is the same way with scalable machine learning; we have to pick the right processor, step one.

And in terms of the right one, in deep learning specifically, they don’t need that much precision but they need lots of FLOPS – so we look for a processor that could trade off precision for more FLOPS and it turns out the Nvidia P100 that we selected does exactly that in an almost linear fashion – meaning in HPC when you do double-precision, you get X number of FLOPS, when you drop down to single precision, you get 2X number of FLOPS, and when you drop down to half precision, you get almost 4X number of FLOPS. So this processor we’ve picked does the tradeoff in the right way that suits TiTech and that is fully trading off the precision for FLOPS.

Secondly, we need to pick the right interconnect that has high-bandwidth but not just high-bandwidth but as much bandwidth as [unintelligible]. Each node has four P100s from Nvidia and two Xeon processors from Intel. This two plus four combination in one node doesn’t just have one interconnect, we gave it all four. This is a very huge ingesting engine here and injection bandwidth engine here for each node, and then there are 540 of these in the TiTech machine, each node having four Nvidia P100s, two Xeons with not just one, not just two, but four high-bandwidth interconnects coming out of it.

The reason for this huge bandwidth is if you think of a funnel you are ingesting massive amounts of data on one side to crunch and learn from it – even if you have an engine that can learn really fast, you still need the ability to ingest all that data so you can consume it. So that was yet another innovation. I don’t remember [previously] building nodes that have up to four of these ingesting connects into each node. We’ve done many single interconnect, we’ve done fewer dual interconnect. I believe at least for me, this is the first time we’ve built a machine with four interconnects per node.

The other thing is how the interconnects are wired together in a topology. In this case we built a rich fat-tree that costs quite some portion of the money of the whole machine. As much as we dedicate the cost to the processors, we dedicated a significant portion of it to the way we connect so many interconnects coming off of each node in a rich fat tree, and then of course there is a software stack.

We listened very carefully to Professor Matsuoka to achieve his vision and we built to it and now we are pleased that many are making inquiries now for this same class of machine for their own projects.

HPCwire: Are the frameworks keeping up with the scalability on the hardware side?

Goh: The software framework in HPC has always tried to catch up with the industry that invests in scaling the hardware. In the early days, MPI, for example, to scale HPC applications did not scale as fast as we can scale the machines and also partly because the machine didn’t have the interconnect that was fast enough and low latency enough. So the answer is that the frameworks need to scale and some frameworks are scaling better than others, but essentially I think all will have to look at scaling just like the HPC world. HPC has different applications, some of them scale better. Even after so many years, decades, you get most of the applications scaling well, but you still have some applications that can’t scale to 10,000 or 100,000 cores for example. And it will be the same with the frameworks; some will scale better and others will have their niche.

We are watching the frameworks to make sure that we don’t go in a direction that frameworks cannot adapt to or scale to so it’s not just us running well ahead scaling the hardware. We have to look at frameworks too because the industry relies on a framework, especially the open source ones.

HPCwire: Did you see Baidu brought in ring all-reduce into their SVAIL deep learning framework and open sourced it as libraries?

Goh: Very interesting developments. There will be so many of these coming out, people taking AI algorithms into HPC applications too. But if you think about it, an all-reduce, which can be a common function you apply to HPC applications, each core is computing its own part of the entire problem, but ultimately you have to collect all the elements and reduce it to a big number. If you have ten cores, that’s fine, and then you have one hundred cores, one thousand cores, one million cores, going to ten million cores in an exascale machine, then all-reduce becomes a big data problem, and you’re trying to figure out ways to be smarter about it. We’ve been looking at building hardware just to do reduction and now that you built the hardware to do reduction, can the hardware be smarter about the reduction.

In the earlier days “smart” means you encode a fixed way of reducing that is the best you know, but can you be even smarter about it by being flexible about how you reduce, by looking at the pattern of the task reduction, and being smarter about the next reduction — and that’s starting to become a machine that starts to learn.

HPCwire: Switching gears a bit, it’s been about six months since the acquisition was announced and about three months since it was finalized, what can you tell us about the merged roadmap?

Goh: On the SGI side that is now part of HPE, clearly the ICE XA continues. The ICE XA can have different nodes in it and the one sold to TiTech is an AI node, a scalable learning AI node comprised of the four Nvidia P100s and two Xeons with the four interconnects and the option for Omni-Path and EDR, so this line continues: high-bandwidth, scale-out systems. The machine we shipped to TiTech, you can see from the photo that was released, it has the ICE-XA with the HPE green rectangle logo on it. This is public.

On the scale-up side, the UV architecture continues and currently it will be part of the Superdome program. The HPE Apollo line of systems includes both scale-up and scale-out solutions and the ICE-XA would be the part that comes in from the SGI side.

HPCwire: Final question – regarding supercomputing in Japan and the other big players there, Fujitsu and NEC, what are the strengths for HPE/SGI in relation to the competition?

Goh: I think with the Japanese vendors, the strengths are on the HPE side in this field and we’ve already got success stories with regards to building scalable learning engines and we want to keep that edge by bringing what we’ve learned from the HPC side of how to build scalable simulation engines to the AI side to building scalable learning engines. As HPE has acquired SGI, on the SGI side we have decades of experience building scalable systems and we believe that’s going to be a huge differentiator.

The second differentiator is our close relationship with customers all these years, and the application providers — from the ISVs to customers building their own codes. We’ve spanned decades, not just building scalable HPC systems on our own, but we’ve built them in conjunction with these software and applications that are developing also.

When we realized way back that reductions are a key factor, almost decades back, we were already starting to build algorithms for this reduction and hardware reductions. We’re going to take all that experience and bring that to the scalable learning world. We built the first in HPC machine in 1996, so two decades of scalable simulation engines. We’re going to bring that differentiator and knowledge forward to scalable learning engines — that’s the first thing. And the second thing is, as we’ve been doing that, we’ve done that in close relationship with how the software frameworks have evolved.

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