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Last week, Google reported that its custom ASIC Tensor Processing Unit (TPU) was 15-30x faster for inferencing workloads than Nvidia’s K80 GPU (see our coverage, Google Pulls Back the Covers on Its First Machine Learning Chip), and it didn’t take Nvidia long to respond. Unlike the semi-contentious back-and-forth between Nvidia and Intel over benchmarking methodology (see Nvidia Cries Foul on Intel Phi AI Benchmarks), Nvidia took a decidedly more friendly approach in responding to Google. Google of course is a big buyer of Nvidia gear – both for internal neural net training workloads and for accelerating HPC and AI workloads inside its Google Compute Engine cloud.
Responding in a blog post published earlier today, Nvidia is choosing to frame the recent TPU results not as a potential competitive threat, but as as a clear sign of the ascendancy of accelerated computing. “Without accelerated computing, the scale-out of AI is simply not practical,” is the conclusion that Nvidia draws.
“While Google and Nvidia chose different development paths, there were several themes common to both our approaches,” observed Nvidia CEO Jen-Hsun Huang, noting:
- AI requires accelerated computing. Accelerators provide the significant data processing demands of deep learning in an era when Moore’s law is slowing.
- Tensor processing is at the core of delivering performance for deep learning training and inference.
- Tensor processing is a major new workload enterprises must consider when building modern data centers.
- Accelerating tensor processing can dramatically reduce the cost of building modern data centers.
Nvidia heartily applauds Google for its AI successes (“The startling precision of its Google Now service; the landmark victory over the world’s greatest Go player; Google Translate’s ability to operate in 100 different languages”), but also makes sure to highlight how its GPU technology has progressed since the 2015-timeframe when the TPU was deployed in Google datacenters.
In September 2016, Google released the P40 GPU, based on the Pascal architecture, to accelerate inferencing workloads for modern AI applications, such as speech translation and video analysis. Recall that Google benchmarked the TPU against the older (late 2014-era) K80 GPU, based on the Kepler architecture, which debuted in 2012. Nvidia created the following chart to “quantify the performance leap from K80 to P40, and to show how the TPU compares to current NVIDIA technology.”
The Google paper, scrupulous in exploring potential criticisms to its methodology, references the newer P40 silicon, noting 1) “the…P40 was unavailable in early 2015, so isn’t contemporary with our [TPU]”; 2) “We also can’t know the fraction of P40 peak delivered within our rigid time bounds”; and 3) “If we compared newer chips, Section 7 shows that we could triple performance of the…TPU just by using the K80’s GDDR5 memory (at a cost of an additional 10W).”
Based on TDP specs, the TPU is more efficient than the P40 on an operations-per-watt basis by a 6.2X margin (for 8-bit inferencing workloads).
Google cited other reasons to indicate that the TPU is “not an easy target” (refer to Section 7 of the paper, “Evaluation of Alternative TPU Designs”), but keep in mind the TPU can only satisfy inferencing workloads. The training phase of deep learning is far more complicated and GPUs have the lead currently.
Nvidia emphasizes the P40’s ability to accelerate both phases of deep learning:
“The P40 balances computational precision and throughput, on-chip memory and memory bandwidth to achieve unprecedented performance for training, as well as inferencing. For training, P40 has 10x the bandwidth and 12 teraflops of 32-bit floating point performance. For inferencing, P40 has high-throughput 8-bit integer and high-memory bandwidth,” Nvidia states.
Is it surprising that Google, a company without a track record in chip manufacturing, can design a processor to rival or surpass a leading silicon vendor such as Nvidia? With sufficiently deep pockets, anyone can create a custom ASIC that beats general-purpose hardware for a narrow application. The question is whether the strategy will pay off. With deep learning algorithms still evolving at light speed, it can be risky to lock down hardware functionality if you’ll need to change out the silicon a year later, when the algorithms refresh. But Google, running the largest compute infrastructure in the world, is a special case that can mine physical scales of economy even if it isn’t able to amortize the outlay over very long periods. Google hinted that a successor to “this first generation” of TPUs is in the works and may even be working on a third-gen for all we know. The company that gave the world MapReduce and TensorFlow is widely known for innovating far ahead of what it makes public.
