Intel: Management Change at Data Center Group; Xeon Re-architecting on Way

By George Leopold and Doug Black

May 5, 2017

Diane Bryant, EVP and GM of Intel’s Data Center Group and a prominent industry figure (SC15 keynote speaker, e.g.), is taking an extended leave of absence from Intel “to tend to a personal family matter,” according to Intel. Navin Shenoy, most recently GM of the Client Computing Group, will take over DCG (fiscal 2016 revenue: $17 billion).

“Given the extended duration (of Bryant’s leave), an interim leader for the Data Center Group is not possible,” Intel CEO Brian Krzanich said in an email to Intel employees yesterday.

Shenov, a 22-year veteran of Intel who will report directly to Krzanich, has held positions in the CEO’s office, sales and marketing, and the PC and tablet businesses, before running CCG.

Source: Intel

Shenoy and Bryant “will work closely together for the next month to ensure a smooth transition for the organization and our customers…,” Krzanich said, adding that Bryant will be on leave for six to eight months. “And, it goes without saying that my thoughts are with Diane. I look forward to welcoming her back to her next challenging role.”

Krzanich said that over the past five years, Bryant has “transformed DCG from a server-centric group to a business that spans servers, network and storage across all end-user segments, and with product lines and business models that extend beyond the traditional.”

The Bryant news follows an April announcement that Brent Gorda, GM of Intel’s High Performance Data Division, would be leaving the company. Gorda is the former CEO of Whamcloud, the Lustre specialist acquired by Intel in 2012. In March, Intel announced the appointment 11-year Intel veteran Aicha S. Evans as chief strategy officer.

Meanwhile, Intel continues to sharpen its processor focus on data centers and handling a broader set of workloads with the rebranding and “re-architecting” of its Xeon family.

The chip giant, which recently began shipping new Optane solid-state drives based on its 3-D Xpoint memory technology, continues to double down on data center applications and demanding data-driven workloads. Analysts noted that the repackaged “Xeon Processor Scalable Family,” partially unveiled on Thursday (May 4) based on its Skylake processor architecture, is aimed at accelerating HPC workloads, along with machine learning, networking and security.

The new family is designed to deliver “four levels of performance and a variety of choices with regard to which integrations and accelerators customers need,” Intel said.

Source: Intel

Added Jennifer Huffstetler, Intel’s director of data center product marketing: “We are bringing essentially two of our previously segmented platforms, the Xeon E5 and the Xeon E7, together into one unified platform that now will be able to provide that scalability and flexibility from entry compute, network and storage workloads all the way through to mission critical workloads, like in-memory database and analytics, so really bringing the best to bear of both of our Xeon families into this one scalable stack.”

The new data center processor family is scheduled for release this summer, and the chipmaker was stingy about details. Nevertheless, analysts said the scaling strategy was significant. “Intel is separating core count, [reliability, availability and serviceability] features and other special features from their ‘good-better-best’ [categories] they had with Xeon E3, E5 and E7,” chip analyst Patrick Moorhead of Moor Insights & Strategy told EnterpriseTech.

Huffstetler explained that workload characteristics would determine whether greater or lower core counts are required. For example, data center operators running demanding workloads involving HPC utilization or in-memory analytics “would be looking higher up the stack,” she said.

While full details won’t be released until the processor family is officially launched, Huffstetler did provide this nugget: “We are seeing new integrations [that are] able to address those shifting workload needs, including integrations of accelerators, like our QuickAssist technology for crypto- or compression algorithms.”

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