Tech Giants Outline Battle Plans for Future HPC Market

By Doug Black

August 21, 2017

Four companies engaged in a cage fight for leadership in the emerging HPC market of the 2020s are, despite deep differences in some areas, in violent agreement on at least one thing: the power consumption and latency penalties of data movement is Public Enemy No. 1. If we are to realize the promise of exascale computing for AI, data analytics and HPC, advanced scale systems must be rearchitected in ways that, above all, get data closer to compute – though precisely how to do that is a matter of major contention.

Technology strategists from Intel, Nvidia, HPE and Mellanox gathered last week at the Rocky Mountain Advanced Computing Consortium Symposium for a debate on “The Future of HPC Architecture.” Moderated by Tiffany Trader, managing editor of HPCwire, and Thomas Hauser, director of Research Computing at the University of Colorado Boulder, the panelists described their companies’ strategies for enabling exascale to become a practical, accessible reality (incidentally, IBM was invited to participate but declined).

Each of the four agrees that achieving exascale will require radical enhancements in compute capabilities. Each of the four is captivated by an architectural vision that places data, and reduction in data movement latency, at the center of the compute universe.

This means more than just putting more data into memory of increasingly gigantic capacity (we’ve heard talk of memory technology that will hold decades of data). That’s an important part of data centric computing but not all of it. It’s also about architectural schemes that shorten the connections between storage, memory and compute – whether by integrating memory and interconnect functions within a multi-capability processor (Intel’s Scalable System Framework), or by distributing compute to wherever data is located in the compute ecosystem – whether it’s in memory, in storage, in the network, at the edge.

This is a critical part of the strategy for deliveringe exascale systems that will power the increasingly powerful forms of AI to come. AI is candy for technology strategists at the upper echelons of business, scientific research, national defense and government, and the four technology companies represented at the RMACC panel (along with hundreds of other vendors) are the confectioners determined to deliver it.

From left, Bill Magro of Intel, Marc Hamilton of Nvidia, Jerry Lotto of Mellanox, Mike Vildibill of HPE

Of course, how that architecture is cobbled together will be the key technology battleground of the coming decade. It’s all in the details. There are many ideas of dispersing and parallelizing computing power via architectural schemes, though not necessarily lots of agreement. Looked at one way, Intel seems to be moving toward a camp of its own under the umbrella of its tightly integrated Scalable Systems Framework. In another camp is Nvidia, HPE and Mellanox, where compute has vacated the center and is distributed throughout the system, wherever data resides.

“Distributed computing anywhere data lives is going to be the key to the future,” said Jerry Lotto, director HPC and technical computing at Mellanox. In response to this definitive statement, HPE’s Mike Vildibill, VP, Advanced Technologies Group, joked “Well, I’m trying desperately to have a different opinion from my colleagues….”

A central theme of the discussion, one universally agreed upon, was not just how to achieve exascale computing but how to make it relevant, accessible and practical for a broad array of workloads throughout public and private sector elements of the HPC community. The difficulties of scaling the exascale summit are immense.

Let’s consider power consumption. Vildibill put it into perspective by saying that if each system on the list of the world’s Top500 supercomputers is considered a node, the cumulative compute power of that system is roughly an exaflop of peak performance – from a system that consumes more than 650 megawatts of power (the output of a large nuclear power plant).

Clearly, greater efficiencies will have to be made if an exascale system is delivered in the 2022-23 timeframe with a footprint that fits into a reasonably sized data center that consumes 20-30MW. “That requirement alone is fundamentally driving a lot of development we’re doing at HPE,” Vildibill said, “…driving some very significant changes in system architecture done in a way that we can maintain legacy and we can still run our favorite MPI codes, but also address how data movement occurs within large-scale systems.”

“The power analysis we’ve done – and everyone’s done it and come to pretty much the same conclusion – is that something different needs to be done in the way we compute, the way we couple computation together,” said Bill Magro, an Intel Fellow and chief technologist, high performance computing software.

Specifically addressing data movement in HPC systems, he said, “Every time you move data you incur a latency, and the further the parts are apart in the system or even in a node, you suffer that latency.”

“You need programming models and compute engines that avoid moving data,” Magro said, “you need fabrics that have very efficient protocols driven by the needs of HPC to minimize back and forth traffic, whether it be for payloads, protocols or even just guarding the integrity of the data. These are the things we’re looking at.

All of this has brought about profound change in Intel’s HPC strategy, he said. It’s part of the reason Intel now describes itself as a data-centric company.

“Intel’s history has been to drive compute up and up and up,” Magro said. “But we realized a few years ago that compute actually isn’t the hardest problem, it’s everything that’s wrapped around the compute, giving (the system) balance: memory technology, fabric, storage.

“We’re trying to approach this with a systems point of view, even though we’re not a systems company,” he said, alluding to Intel’s Scalable System Framework, “because we don’t think you can get to exascale by working on components individually.”

Marc Hamilton, VP, solutions architecture and engineering at Nvidia, said the company addresses latency problems in part via a heterogeneous architecture, called “fat nodes,” in which “you have a latency-optimized core, such as a CPU, combined with a throughput-optimized core, such as a GPU” within a single system that minimizes data movement.

“You’re always going to be able to move data faster on a piece of silicon or on a motherboard than over a network,” he said.

Mellanox’s Lotto discussed taking latency out of networks by adding intelligence and compute within them.

“Traditionally, we had CPU-centric networks,” Lotto said. “The idea was that the network was basically a passive component of a cluster, that data was going to be delivered to end points in order for computation to take place. We’re trying to move toward a more data centric model for computing by enabling network devices to actually contribute to the computational load. We can offload a lot of the computational capacity from the CPU to the network.”

He cited a raft of technologies under development by Mellanox, including SHARPSHIELD and other products, designed with the goal reducing the latency of communications frameworks like MPI down by an order of magnitude, to 3 or 4 microseconds.

Lotto expanded on these remarks to say that while processing will go wherever data exists, there also will be “coexistence” of applications and workloads within a learning environment.

“We think exascale isn’t going to look like today’s systems in terms of usages,” he said. “It’s not just going to be simulation and modeling any more. It’s going to be simulation and modeling sitting alongside machine learning and AI, sitting alongside high performance data analytics. And not just the workloads coexisting but also interacting through workflows.”

He offered a hypothetical scenario in which a scientist is conducting real time analytics on a perishable sample, and then adjusting the scientific instrument based on data as it, in real time, comes to the scientist.

“Those are types of workloads we’re focusing on, and those have broad implications for systems architecture,” Lotto said. “Not just in terms of how they coexist and connect through resource managers, but also how we make those frameworks take advantage of the core compute and fabric that sits underneath.”

But Intel’s Magro emphasized the physical limits involved in architectural design and the choices that those limits impose on vendors.

“We all have the same fundamental limits on how large a chip we can build, and that means we’re all forced to decide how to use that real estate,” he said. “So there’s a key tension, which is if I come up with something like a dedicated Tensor engine that’s wonderful and perfect for machine learning and I dedicate an area to that, by construction I’m harming the rest of HPC. So what we need to do is find the right balance of what will benefit the most from deep integration, what will be on a motherboard and what can be at the other end of the fabric. That’s where a lot of the tension is.”

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

Fluid HPC: How Extreme-Scale Computing Should Respond to Meltdown and Spectre

February 15, 2018

The Meltdown and Spectre vulnerabilities are proving difficult to fix, and initial experiments suggest security patches will cause significant performance penalties to HPC applications. Even as these patches are rolled o Read more…

By Pete Beckman

Intel Touts Silicon Spin Qubits for Quantum Computing

February 14, 2018

Debate around what makes a good qubit and how best to manufacture them is a sprawling topic. There are many insistent voices favoring one or another approach. Referencing a paper published today in Nature, Intel has offe Read more…

By John Russell

Brookhaven Ramps Up Computing for National Security Effort

February 14, 2018

Last week, Dan Coats, the director of Director of National Intelligence for the U.S., warned the Senate Intelligence Committee that Russia was likely to meddle in the 2018 mid-term U.S. elections, much as it stands accused of doing in the 2016 Presidential election. Read more…

By John Russell

HPE Extreme Performance Solutions

Safeguard Your HPC Environment with the World’s Most Secure Industry Standard Servers

Today’s organizations operate in an environment with ever-evolving threats, and in order to protect themselves they must continuously bolster their security strategy. Hewlett Packard Enterprise (HPE) and Intel® are addressing modern security challenges with the world’s most secure industry standard servers powered by the latest generation of Intel® Xeon® Scalable processors. Read more…

AI Cloud Competition Heats Up: Google’s TPUs, Amazon Building AI Chip

February 12, 2018

Competition in the white hot AI (and public cloud) market pits Google against Amazon this week, with Google offering AI hardware on its cloud platform intended to make it easier, faster and cheaper to train and run machi Read more…

By Doug Black

Fluid HPC: How Extreme-Scale Computing Should Respond to Meltdown and Spectre

February 15, 2018

The Meltdown and Spectre vulnerabilities are proving difficult to fix, and initial experiments suggest security patches will cause significant performance penal Read more…

By Pete Beckman

Brookhaven Ramps Up Computing for National Security Effort

February 14, 2018

Last week, Dan Coats, the director of Director of National Intelligence for the U.S., warned the Senate Intelligence Committee that Russia was likely to meddle in the 2018 mid-term U.S. elections, much as it stands accused of doing in the 2016 Presidential election. Read more…

By John Russell

AI Cloud Competition Heats Up: Google’s TPUs, Amazon Building AI Chip

February 12, 2018

Competition in the white hot AI (and public cloud) market pits Google against Amazon this week, with Google offering AI hardware on its cloud platform intended Read more…

By Doug Black

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

The Food Industry’s Next Journey — from Mars to Exascale

February 12, 2018

Global food producer and one of the world's leading chocolate companies Mars Inc. has a unique perspective on the impact that exascale computing will have on the food industry. Read more…

By Scott Gibson, Oak Ridge National Laboratory

Singularity HPC Container Start-Up – Sylabs – Emerges from Stealth

February 8, 2018

The driving force behind Singularity, the popular HPC container technology, is bringing the open source platform to the enterprise with the launch of a new vent Read more…

By George Leopold

Dell EMC Debuts PowerEdge Servers with AMD EPYC Chips

February 6, 2018

AMD notched another EPYC processor win today with Dell EMC’s introduction of three PowerEdge servers (R6415, R7415, and R7425) based on the EPYC 7000-series p Read more…

By John Russell

‘Next Generation’ Universe Simulation Is Most Advanced Yet

February 5, 2018

The research group that gave us the most detailed time-lapse simulation of the universe’s evolution in 2014, spanning 13.8 billion years of cosmic evolution, is back in the spotlight with an even more advanced cosmological model that is providing new insights into how black holes influence the distribution of dark matter, how heavy elements are produced and distributed, and where magnetic fields originate. Read more…

By Tiffany Trader

Inventor Claims to Have Solved Floating Point Error Problem

January 17, 2018

"The decades-old floating point error problem has been solved," proclaims a press release from inventor Alan Jorgensen. The computer scientist has filed for and Read more…

By Tiffany Trader

Japan Unveils Quantum Neural Network

November 22, 2017

The U.S. and China are leading the race toward productive quantum computing, but it's early enough that ultimate leadership is still something of an open questi Read more…

By Tiffany Trader

AMD Showcases Growing Portfolio of EPYC and Radeon-based Systems at SC17

November 13, 2017

AMD’s charge back into HPC and the datacenter is on full display at SC17. Having launched the EPYC processor line in June along with its MI25 GPU the focus he Read more…

By John Russell

Researchers Measure Impact of ‘Meltdown’ and ‘Spectre’ Patches on HPC Workloads

January 17, 2018

Computer scientists from the Center for Computational Research, State University of New York (SUNY), University at Buffalo have examined the effect of Meltdown Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

IBM Begins Power9 Rollout with Backing from DOE, Google

December 6, 2017

After over a year of buildup, IBM is unveiling its first Power9 system based on the same architecture as the Department of Energy CORAL supercomputers, Summit a Read more…

By Tiffany Trader

Fast Forward: Five HPC Predictions for 2018

December 21, 2017

What’s on your list of high (and low) lights for 2017? Volta 100’s arrival on the heels of the P100? Appearance, albeit late in the year, of IBM’s Power9? Read more…

By John Russell

Russian Nuclear Engineers Caught Cryptomining on Lab Supercomputer

February 12, 2018

Nuclear scientists working at the All-Russian Research Institute of Experimental Physics (RFNC-VNIIEF) have been arrested for using lab supercomputing resources to mine crypto-currency, according to a report in Russia’s Interfax News Agency. Read more…

By Tiffany Trader

Leading Solution Providers

Chip Flaws ‘Meltdown’ and ‘Spectre’ Loom Large

January 4, 2018

The HPC and wider tech community have been abuzz this week over the discovery of critical design flaws that impact virtually all contemporary microprocessors. T Read more…

By Tiffany Trader

Perspective: What Really Happened at SC17?

November 22, 2017

SC is over. Now comes the myriad of follow-ups. Inboxes are filled with templated emails from vendors and other exhibitors hoping to win a place in the post-SC thinking of booth visitors. Attendees of tutorials, workshops and other technical sessions will be inundated with requests for feedback. Read more…

By Andrew Jones

How Meltdown and Spectre Patches Will Affect HPC Workloads

January 10, 2018

There have been claims that the fixes for the Meltdown and Spectre security vulnerabilities, named the KPTI (aka KAISER) patches, are going to affect applicatio Read more…

By Rosemary Francis

GlobalFoundries, Ayar Labs Team Up to Commercialize Optical I/O

December 4, 2017

GlobalFoundries (GF) and Ayar Labs, a startup focused on using light, instead of electricity, to transfer data between chips, today announced they've entered in Read more…

By Tiffany Trader

Tensors Come of Age: Why the AI Revolution Will Help HPC

November 13, 2017

Thirty years ago, parallel computing was coming of age. A bitter battle began between stalwart vector computing supporters and advocates of various approaches to parallel computing. IBM skeptic Alan Karp, reacting to announcements of nCUBE’s 1024-microprocessor system and Thinking Machines’ 65,536-element array, made a public $100 wager that no one could get a parallel speedup of over 200 on real HPC workloads. Read more…

By John Gustafson & Lenore Mullin

Flipping the Flops and Reading the Top500 Tea Leaves

November 13, 2017

The 50th edition of the Top500 list, the biannual publication of the world’s fastest supercomputers based on public Linpack benchmarking results, was released Read more…

By Tiffany Trader

V100 Good but not Great on Select Deep Learning Aps, Says Xcelerit

November 27, 2017

Wringing optimum performance from hardware to accelerate deep learning applications is a challenge that often depends on the specific application in use. A benc Read more…

By John Russell

2017 Gordon Bell Prize Finalists Named

October 23, 2017

The three finalists for this year’s Gordon Bell Prize in High Performance Computing have been announced. They include two papers on projects run on China’s Read more…

By John Russell

  • arrow
  • Click Here for More Headlines
  • arrow
Share This