DARPA Pledges Another $300 Million for Post-Moore’s Readiness

By Tiffany Trader

September 14, 2017

Yesterday, the Defense Advanced Research Projects Agency (DARPA) launched a giant funding effort to ensure the United States can sustain the pace of electronic innovation vital to both a flourishing economy and a secure military. Under the banner of the Electronics Resurgence Initiative (ERI), some $500-$800 million will be invested in post-Moore’s law technologies that will benefit military and commercial users and contribute crucially to national security in the 2025 to 2030 time frame.

First made public in June (see HPCwire coverage here), ERI took shape over the summer as DARPA’s Microsystems Technology Office sought community involvement on the path forward for future progress in electronics. Based on that input, DARPA developed six new programs which are part of the overall larger vision of the Electronic Resurgence Initiative. The six programs are detailed in three Broad Agency Announcements (BAAs) published yesterday on FedBizOpps.gov. Each of the BAAs correlates to one of the ERI research pillars: materials and integration, circuit design, and systems architecture.

Planned investment is in the range of $200 million a year over four years. “ERI Page 3 Investments” refers to research areas that Gordon Moore predicted would become important for future microelectronics progress, cited on page 3 of Moore’s famous 1965 paper, “Cramming More Components onto Integrated Circuits.”

Also joining the ERI portfolio are several existing DARPA programs (including HIVE and CHIPS) as well as the Joint University Microelectronics Program (JUMP), a research effort in basic electronics education co-funded by DARPA and Semiconductor Research Corporation (SRC), an industry consortium based in Durham, N.C.

DARPA says that with the official roll out of the Electronics Resurgence Initiative, it “hopes to open new innovation pathways to address impending engineering and economics challenges that, if left unanswered, could challenge what has been a relentless half-century run of progress in microelectronics technology.”

DARPA is of course referring to the remarkable engine of innovation that is Moore’s law. Gordon Moore’s 1965 observation that transistor densities were doubling at roughly 24-month intervals set the stage for five decades of faster and cheaper microelectronics. But as node feature sizes approach the fundamental limits of physics, the design work and fabrication becomes ever more complex and expensive, jeopardizing the economic benefits of Moore’s dictum.

It’s something of a grand experiment, explained Bill Chappell, director of the Agency’s Microsystems Technology Office (MTO) in a press call, referring to the scale and scope of the Electronics Resurgence Initiative. DARPA has packaged up into one large announcement six different programs (released in three Broad Agency Announcements – BAAs — on FBO.gov). The six different programs will in sum receive $75 million in investment over the next year alone and on the order of $300 million over four years. Like all DARPA programs, the longevity and funding levels of these programs will be tied to performance.

“If we see that we’re getting broad resonance within the commercial industry and within the DoD industry, and unique partnerships are forming and/or unique capabilities are popping up for national defense, it will continue with the expectation or even grow,” said Chappell.

The DoD is finding it increasingly difficult to manufacture and design circuits, partly due to Moore’s law slowdowns and partly due to the scale of designs. “We are victim of our own success in that we have so many transistors available that we now have another problem which is complexity, complexity of manufacturing and complexity of design,” said Chappell. “So whether Moore’s law ends or not, at the DoD, from a niche development perspective we already have a problem on our hands. And we’re sharing that with the commercial world as well; you see a lot of mergers and acquisitions and tumult in the industry as they try to also grapple with some of the similar problems and the manpower required to get a design from concept into a physical product.”

Here’s a rundown on the six programs organized by their research thrust:

Materials and Integration (link)

  • Three Dimensional Monolithic System-on-a-Chip (3DSoC): Develop 3D monolithic technology that will enable > 50X improvement in SoC digital performance at power.
  • Foundations Required for Novel Compute (FRANC): Develop the foundations for assessing and establishing the proof of principle for beyond von Neumann compute topologies enabled by new materials and integration.

Design (link)

  • Intelligent Design of Electronic Assets (IDEA): “No human in the loop” 24-hour layout generation for mixed signal integrated circuits, systems-in-package, and printed circuit boards.
  • Posh Open Source Hardware (POSH): An open source System on Chip (SoC) design and verification eco-system that enables cost effective design of ultra-complex SoCs.

Novel Computing Architectures (link)

  • Software Defined Hardware (SDH): Build runtime reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms.
  • Domain-Specific System on Chip (DSSoC): Enable rapid development of multiapplication systems through a single programmable device.

Chappell gave additional context for the Software Defined Hardware program, noting that it will look at course-grained reprogrammability specifically for big data programs. “We have the TPU and the GPU for dense problems, for dense searches, and dense matrix manipulation. We have recently started the HIVE program, which does sparse graph search. But the big question that still exists is what if you have a dense and sparse dataset? We don’t have a chip under development or even concepts that are very good at doing both of those types of datasets.”

What DARPA is envisioning is a reprogrammable system, or chip, that is intelligent enough and has an intelligent enough just in time compiler to recognize the data and type of data it needs to operate on and reconfigure itself to the need of that moment. DARPA has done seedlings to demonstrate that it’s feasible but “it’s still a DARPA-hard concept to pull off,” said Chappell.

DARPA will hold a number of Proposers Days to meet with interested researchers. The FRANC program of the Materials and Integration thrust will be run in the form of a webinar on Sept.15 and that thrust’s other program, 3DsoC, will take place at DARPA headquarters in Arlington, Va., on Sept. 22. The Proposers Day for the Architectures thrust’s two programs, DSSoC and SDH, will take place near DARPA headquarters in Arlington, Va., on Sept. 18 and 19, respectively. The Proposers Days for both programs in the Design thrust—IDEA and POSH—will take place on Sept. 22, in Mountain View, Calif. Details about all of these Proposers Day events and how to register are included in this Special Notice, DARPA-SN-17-75, posted on FBO.gov.

Asked about the goals for ERI writ large, Chappell said, “Overall success will look like we’ve invented the ideas that will be part of that 2025 and 2030 electronics community in such a way that both our defense base has better access to technology, better access to IP, better design services and capabilities than they have today because of these relationships that we are trying to build while simultaneously US interests in electronics in regards to economic development, maintaining our dominant global position is secured because of the new ideas that we are creating through these investments.

“These $75 million next year and $300 million over the course of the next four years that we’re planning is for very far-out research which often times is not something that a commercial entity can do because of its speculative nature and/or not something the DoD can do because it isn’t necessarily solving a today problem, but a tomorrow problem.”

DARPA is known for funding high-risk, high-reward R&D with broad commercial impact, helping to invent both the Internet and GPS.

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

IBM Demonstrates Deep Neural Network Training with Analog Memory Devices

June 18, 2018

From smarter, more personalized apps to seemingly-ubiquitous Google Assistant and Alexa devices, AI adoption is showing no signs of slowing down – and yet, the hardware used for AI is far from perfect. Currently, GPUs Read more…

By Oliver Peckham

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

Challenges Face Astroinformatics as It Sorts Through the Stars

June 15, 2018

You might have seen one of those YouTube videos: they begin on Earth, slowly zooming out to the Moon, the Solar System, the Milky Way, beyond – and suddenly, you’re looking at trillions of stars. It’s a lot to take Read more…

By Oliver Peckham

HPE Extreme Performance Solutions

HPC and AI Convergence is Accelerating New Levels of Intelligence

Data analytics is the most valuable tool in the digital marketplace – so much so that organizations are employing high performance computing (HPC) capabilities to rapidly collect, share, and analyze endless streams of data. Read more…

IBM Accelerated Insights

Banks Boost Infrastructure to Tackle GDPR

As banks become more digital and data-driven, their IT managers are challenged with fast growing data volumes and lines-of-businesses’ (LoBs’) seemingly limitless appetite for analytics. Read more…

The Machine Learning Hype Cycle and HPC

June 14, 2018

Like many other HPC professionals I’m following the hype cycle around machine learning/deep learning with interest. I subscribe to the view that we’re probably approaching the ‘peak of inflated expectation’ but not quite yet starting the descent into the ‘trough of disillusionment. This still raises the probability that... Read more…

By Dairsie Latimer

Sandia to Take Delivery of World’s Largest Arm System

June 18, 2018

While the enterprise remains circumspect on prospects for Arm servers in the datacenter, the leadership HPC community is taking a bolder, brighter view of the x86 server CPU alternative. Amongst current and planned Arm HPC installations – i.e., the innovative Mont-Blanc project, led by Bull/Atos, the 'Isambard’ Cray XC50 going into the University of Bristol, and commitments from both Japan and France among others -- HPE is announcing that it will be supply the United States National Nuclear Security Administration (NNSA) with a 2.3 petaflops peak Arm-based system, named Astra. Read more…

By Tiffany Trader

The Machine Learning Hype Cycle and HPC

June 14, 2018

Like many other HPC professionals I’m following the hype cycle around machine learning/deep learning with interest. I subscribe to the view that we’re probably approaching the ‘peak of inflated expectation’ but not quite yet starting the descent into the ‘trough of disillusionment. This still raises the probability that... Read more…

By Dairsie Latimer

Xiaoxiang Zhu Receives the 2018 PRACE Ada Lovelace Award for HPC

June 13, 2018

Xiaoxiang Zhu, who works for the German Aerospace Center (DLR) and Technical University of Munich (TUM), was awarded the 2018 PRACE Ada Lovelace Award for HPC for her outstanding contributions in the field of high performance computing (HPC) in Europe. Read more…

By Elizabeth Leake

U.S Considering Launch of National Quantum Initiative

June 11, 2018

Sometime this month the U.S. House Science Committee will introduce legislation to launch a 10-year National Quantum Initiative, according to a recent report by Read more…

By John Russell

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

Exascale USA – Continuing to Move Forward

June 6, 2018

The end of May 2018, saw several important events that continue to advance the Department of Energy’s (DOE) Exascale Computing Initiative (ECI) for the United Read more…

By Alex R. Larzelere

Exascale for the Rest of Us: Exaflops Systems Capable for Industry

June 6, 2018

Enterprise advanced scale computing – or HPC in the enterprise – is an entity unto itself, situated between (and with characteristics of) conventional enter Read more…

By Doug Black

Fracas in Frankfurt: ISC18 Cluster Competition Teams Unveiled

June 6, 2018

The Student Cluster Competition season heats up with the seventh edition of the ISC Student Cluster Competition, slated to begin on June 25th in Frankfurt, Germ Read more…

By Dan Olds

MLPerf – Will New Machine Learning Benchmark Help Propel AI Forward?

May 2, 2018

Let the AI benchmarking wars begin. Today, a diverse group from academia and industry – Google, Baidu, Intel, AMD, Harvard, and Stanford among them – releas Read more…

By John Russell

How the Cloud Is Falling Short for HPC

March 15, 2018

The last couple of years have seen cloud computing gradually build some legitimacy within the HPC world, but still the HPC industry lies far behind enterprise I Read more…

By Chris Downing

US Plans $1.8 Billion Spend on DOE Exascale Supercomputing

April 11, 2018

On Monday, the United States Department of Energy announced its intention to procure up to three exascale supercomputers at a cost of up to $1.8 billion with th Read more…

By Tiffany Trader

Deep Learning at 15 PFlops Enables Training for Extreme Weather Identification at Scale

March 19, 2018

Petaflop per second deep learning training performance on the NERSC (National Energy Research Scientific Computing Center) Cori supercomputer has given climate Read more…

By Rob Farber

Lenovo Unveils Warm Water Cooled ThinkSystem SD650 in Rampup to LRZ Install

February 22, 2018

This week Lenovo took the wraps off the ThinkSystem SD650 high-density server with third-generation direct water cooling technology developed in tandem with par Read more…

By Tiffany Trader

Nvidia Responds to Google TPU Benchmarking

April 10, 2017

Nvidia highlights strengths of its newest GPU silicon in response to Google's report on the performance and energy advantages of its custom tensor processor. Read more…

By Tiffany Trader

ORNL Summit Supercomputer Is Officially Here

June 8, 2018

Oak Ridge National Laboratory (ORNL) together with IBM and Nvidia celebrated the official unveiling of the Department of Energy (DOE) Summit supercomputer toda Read more…

By Tiffany Trader

HPE Wins $57 Million DoD Supercomputing Contract

February 20, 2018

Hewlett Packard Enterprise (HPE) today revealed details of its massive $57 million HPC contract with the U.S. Department of Defense (DoD). The deal calls for HP Read more…

By Tiffany Trader

Leading Solution Providers

SC17 Booth Video Tours Playlist

Altair @ SC17

Altair

AMD @ SC17

AMD

ASRock Rack @ SC17

ASRock Rack

CEJN @ SC17

CEJN

DDN Storage @ SC17

DDN Storage

Huawei @ SC17

Huawei

IBM @ SC17

IBM

IBM Power Systems @ SC17

IBM Power Systems

Intel @ SC17

Intel

Lenovo @ SC17

Lenovo

Mellanox Technologies @ SC17

Mellanox Technologies

Microsoft @ SC17

Microsoft

Penguin Computing @ SC17

Penguin Computing

Pure Storage @ SC17

Pure Storage

Supericro @ SC17

Supericro

Tyan @ SC17

Tyan

Univa @ SC17

Univa

Hennessy & Patterson: A New Golden Age for Computer Architecture

April 17, 2018

On Monday June 4, 2018, 2017 A.M. Turing Award Winners John L. Hennessy and David A. Patterson will deliver the Turing Lecture at the 45th International Sympo Read more…

By Staff

Google Chases Quantum Supremacy with 72-Qubit Processor

March 7, 2018

Google pulled ahead of the pack this week in the race toward "quantum supremacy," with the introduction of a new 72-qubit quantum processor called Bristlecone. Read more…

By Tiffany Trader

Google I/O 2018: AI Everywhere; TPU 3.0 Delivers 100+ Petaflops but Requires Liquid Cooling

May 9, 2018

All things AI dominated discussion at yesterday’s opening of Google’s I/O 2018 developers meeting covering much of Google's near-term product roadmap. The e Read more…

By John Russell

Nvidia Ups Hardware Game with 16-GPU DGX-2 Server and 18-Port NVSwitch

March 27, 2018

Nvidia unveiled a raft of new products from its annual technology conference in San Jose today, and despite not offering up a new chip architecture, there were still a few surprises in store for HPC hardware aficionados. Read more…

By Tiffany Trader

Pattern Computer – Startup Claims Breakthrough in ‘Pattern Discovery’ Technology

May 23, 2018

If it weren’t for the heavy-hitter technology team behind start-up Pattern Computer, which emerged from stealth today in a live-streamed event from San Franci Read more…

By John Russell

Part One: Deep Dive into 2018 Trends in Life Sciences HPC

March 1, 2018

Life sciences is an interesting lens through which to see HPC. It is perhaps not an obvious choice, given life sciences’ relative newness as a heavy user of H Read more…

By John Russell

Intel Pledges First Commercial Nervana Product ‘Spring Crest’ in 2019

May 24, 2018

At its AI developer conference in San Francisco yesterday, Intel embraced a holistic approach to AI and showed off a broad AI portfolio that includes Xeon processors, Movidius technologies, FPGAs and Intel’s Nervana Neural Network Processors (NNPs), based on the technology it acquired in 2016. Read more…

By Tiffany Trader

Google Charts Two-Dimensional Quantum Course

April 26, 2018

Quantum error correction, essential for achieving universal fault-tolerant quantum computation, is one of the main challenges of the quantum computing field and it’s top of mind for Google’s John Martinis. At a presentation last week at the HPC User Forum in Tucson, Martinis, one of the world's foremost experts in quantum computing, emphasized... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This