SC17: Legion Seeks to Elevate HPC Programming

By Tiffany Trader

November 9, 2017

As modern HPC architectures become ever more complex, so too does the task of programming these machines. In the quest for the trifecta of better performance, portability and programmability, new HPC programming systems are being developed. The Legion programming system, a data-centric parallel programming system for writing portable high performance programs, is one such effort that is being developed at Stanford University in collaboration with Nvidia and several U.S. Department of Energy labs.

In this Q&A, Stanford University Computer Science Chair Alex Aiken and Nvidia Chief Scientist Bill Dally provide an overview of Legion, its goals and its relevance for exascale computing. Aiken will hold a tutorial on the Legion programming model this Sunday at SC17 in Denver from 1:30-5pm MT.

HPCwire: Let’s start with a basic, but important question: why does HPC need new programming models?

Alex Aiken, professor and the chair of computer science at Stanford

Alex Aiken and Bill Dally: New programming models are needed to raise the level of programming to enhance portability across types and generations of high-performance computers. Today programmers specify low-level details, like how much parallelism to exploit, and how to stage data through levels of memory. These low-level details tie an application to the performance of a specific machine, and the effort required to modify the code to target future machines is becoming a major obstacle to actually doing high performance computing. By elevating the level of programming, these target-dependent decisions can be made by the programming system, making it easier to write performant codes, and making the codes themselves performance portable.

HPCwire: What is the Legion programming system? What are the main goals of the project?

Aiken and Dally: Legion is a new programming model for modern supercomputing systems that aims to provide excellent performance, portability, and scalability of application codes across a wide range of hardware. A Legion application is composed of tasks written in language of the programmer’s choice, such as C++, CUDA, Fortran, or OpenACC. Legion tasks specify which “regions” of data they will access as well as what kinds of accesses will be performed. Knowledge of the data used by each task allows Legion to confer many benefits to application developers:

Bill Dally, Nvidia chief scientist & Stanford professor

First, a Legion programming system can analyze the tasks and their data usage to automatically and safely infer parallelism and perform the scheduling transformations necessary to fill an exascale machine, even if the code was written in an apparently-sequential style.

Second, the programming system’s knowledge of which data will be accessed by each task allows Legion to automatically insert the necessary data movement for a complex memory hierarchy, greatly simplifying application code and reducing (or often eliminating) idle cyclems on processors waiting for necessary data to arrive.

Finally, Legion’s machine-agnostic description of an application in terms of tasks and regions decouples the process of specifying an application from the determination of how it is mapped to a target machine. This allows the porting and tuning of an application to be done independently from its development and facilitates tuning by machine experts or even a machine learning algorithm. This makes Legion programs inherently performance portable.

HPCwire: The DOE is investing in Legion development as part as part its exascale program. How is Legion positioned to address the challenges of exascale?

Aiken and Dally: Legion is designed for exascale computation. Legion guarantees that parallel execution has the same result as sequential execution, which is a huge advantage for debugging at scale. Legion also provides rich capabilities for describing how a Legion program uses its data. Since managing and moving data is the limiter in many current petascale and future exascale applications, these features give Legion the information it needs to do a much better job of managing data placement and movement than current programming systems. Legion is also highly asynchronous, avoiding the global synchronization constructs which only become more expensive on larger machines. Finally, under the hood, the Legion implementation exploits the extra information it has about a program’s data and its asynchronous capabilities to the hilt, performing much more sophisticated static and dynamic analysis of programs than is possible in current systems to support Legion’s higher level of abstraction while providing scalable and portable performance.

HPCwire: Why is Nvidia involved in Legion? How does Legion fit into Nvidia’s vision for computing?

Dally: Nvidia wants to make it easy for people to develop production application codes that can scale to exascale machines and easily be ported between supercomputers with different GPU generations, numbers of GPUs, and different sized memory hierarchies. By letting programmers specify target-independent codes at a high level, leaving the mapping decisions to the programming system, Legion accomplishes these goals.

Nvidia is also very excited to collaborate with leading researchers from Stanford University and Los Alamos National Lab to move this technology forward.

HPCwire: One of the stated goals/features of Legion is performance portability; at a high-level, how does it achieve this?

Aiken and Dally: Performance portability is achieved in Legion through a strict separation of concerns: we aim to completely decouple the description of the computation from how it is mapped to the target machine. This approach manifests itself explicitly in the programming model: all Legion programs consist of two parts: a machine-independent specification that describes the computation abstractly without any machine details, and one or more application- and/or machine-specific mappers that make policy decisions about how the application should be executed on the target machine. Machine-independent applications can therefore be written once and easily migrated to new machines only by changing the mapping decisions. Importantly, mapping decisions can only impact the performance of the code and never the correctness as the programming system uses program analysis to determine if any data movement and synchronization is necessary to satisfy the mapping decisions.

HPCwire: Alex, what will you be covering in your SC17 tutorial on Sunday and who should attend?

Aiken: The tutorial will cover the major features of the Legion programming system and will be hands-on; participants will be writing programs almost from the start and every concept will be illustrated with a small programming exercise. Anyone who is interested in learning something about the benefits and state of the art of task-based programming models, and of Legion specifically, should find the tutorial useful.

HPCwire: What is the most challenging part of developing a new HPC programming model?

Aiken and Dally: The most challenging part is managing expectations. Is it easy to forget that it took MPI more than 15 years from the time that the initial prototypes were proposed to when really solid implementations were available for use. Many users are expecting new HPC programming models such as Legion to mature much faster than this. We’ve been lucky to collaborate with groups like Jackie Chen’s combustion group at Sandia National Lab, the FleCSi team at Los Alamos National Lab, and the LCLS-II software team at SLAC that are willing to work with us on real applications that push us through our growing pains and ensure the end result will be one that is broadly useful in the HPC programming ecosystem.

HPCwire: How hard is it for an HPC programmer with a legacy application to migrate that application to Legion?

Aiken and Dally: Legion is designed to facilitate the incremental migration of an MPI-based application. Legion interoperates with MPI, allowing a porting effort to focus on moving the performance-critical sections (e.g., the main time-stepping loop or a key solver) to Legion tasks while leaving other parts of the application such as initialization or file I/O in their original MPI-based form. And since Legion operates at the granularity of tasks, the compute heavy “inner loops” from the original optimized application code can often be used directly as the body of newly-created Legion tasks.

As an example, the combustion simulation application S3D, developed at Sandia National Labs, consists of over 200,000 lines of Fortran+MPI code, but only two engineer-months of effort were required to port the main integration loop to Legion. The integration loop comprises only 15 percent of the overall code base, but consumes 97 percent of the cycles during execution. Although still contained in the original Fortran shell, the use of the Legion version of the integration loop allows S3D to run more than 4x faster than the original Fortran version, and over 2x faster than other GPU-accelerated versions of the code.

The above figure shows the architecture of the Legion programming system. Applications targeting Legion have the option of either being written in the Regent programming language or written directly to the Legion C++ runtime interface. Applications written in Regent are compiled to LLVM (and call a C wrapper for the C++ runtime API). Additional info.
Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industry updates delivered to you every week!

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion XL — were added to the benchmark suite as MLPerf continues Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing power it brings to artificial intelligence.  Nvidia's DGX Read more…

Call for Participation in Workshop on Potential NSF CISE Quantum Initiative

March 26, 2024

Editor’s Note: Next month there will be a workshop to discuss what a quantum initiative led by NSF’s Computer, Information Science and Engineering (CISE) directorate could entail. The details are posted below in a Ca Read more…

Waseda U. Researchers Reports New Quantum Algorithm for Speeding Optimization

March 25, 2024

Optimization problems cover a wide range of applications and are often cited as good candidates for quantum computing. However, the execution time for constrained combinatorial optimization applications on quantum device Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at the network layer threatens to make bigger and brawnier pro Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HBM3E memory as well as the the ability to train 1 trillion pa Read more…

MLPerf Inference 4.0 Results Showcase GenAI; Nvidia Still Dominates

March 28, 2024

There were no startling surprises in the latest MLPerf Inference benchmark (4.0) results released yesterday. Two new workloads — Llama 2 and Stable Diffusion Read more…

Q&A with Nvidia’s Chief of DGX Systems on the DGX-GB200 Rack-scale System

March 27, 2024

Pictures of Nvidia's new flagship mega-server, the DGX GB200, on the GTC show floor got favorable reactions on social media for the sheer amount of computing po Read more…

NVLink: Faster Interconnects and Switches to Help Relieve Data Bottlenecks

March 25, 2024

Nvidia’s new Blackwell architecture may have stolen the show this week at the GPU Technology Conference in San Jose, California. But an emerging bottleneck at Read more…

Who is David Blackwell?

March 22, 2024

During GTC24, co-founder and president of NVIDIA Jensen Huang unveiled the Blackwell GPU. This GPU itself is heavily optimized for AI work, boasting 192GB of HB Read more…

Nvidia Looks to Accelerate GenAI Adoption with NIM

March 19, 2024

Today at the GPU Technology Conference, Nvidia launched a new offering aimed at helping customers quickly deploy their generative AI applications in a secure, s Read more…

The Generative AI Future Is Now, Nvidia’s Huang Says

March 19, 2024

We are in the early days of a transformative shift in how business gets done thanks to the advent of generative AI, according to Nvidia CEO and cofounder Jensen Read more…

Nvidia’s New Blackwell GPU Can Train AI Models with Trillions of Parameters

March 18, 2024

Nvidia's latest and fastest GPU, codenamed Blackwell, is here and will underpin the company's AI plans this year. The chip offers performance improvements from Read more…

Nvidia Showcases Quantum Cloud, Expanding Quantum Portfolio at GTC24

March 18, 2024

Nvidia’s barrage of quantum news at GTC24 this week includes new products, signature collaborations, and a new Nvidia Quantum Cloud for quantum developers. Wh Read more…

Alibaba Shuts Down its Quantum Computing Effort

November 30, 2023

In case you missed it, China’s e-commerce giant Alibaba has shut down its quantum computing research effort. It’s not entirely clear what drove the change. Read more…

Nvidia H100: Are 550,000 GPUs Enough for This Year?

August 17, 2023

The GPU Squeeze continues to place a premium on Nvidia H100 GPUs. In a recent Financial Times article, Nvidia reports that it expects to ship 550,000 of its lat Read more…

Shutterstock 1285747942

AMD’s Horsepower-packed MI300X GPU Beats Nvidia’s Upcoming H200

December 7, 2023

AMD and Nvidia are locked in an AI performance battle – much like the gaming GPU performance clash the companies have waged for decades. AMD has claimed it Read more…

DoD Takes a Long View of Quantum Computing

December 19, 2023

Given the large sums tied to expensive weapon systems – think $100-million-plus per F-35 fighter – it’s easy to forget the U.S. Department of Defense is a Read more…

Synopsys Eats Ansys: Does HPC Get Indigestion?

February 8, 2024

Recently, it was announced that Synopsys is buying HPC tool developer Ansys. Started in Pittsburgh, Pa., in 1970 as Swanson Analysis Systems, Inc. (SASI) by John Swanson (and eventually renamed), Ansys serves the CAE (Computer Aided Engineering)/multiphysics engineering simulation market. Read more…

Choosing the Right GPU for LLM Inference and Training

December 11, 2023

Accelerating the training and inference processes of deep learning models is crucial for unleashing their true potential and NVIDIA GPUs have emerged as a game- Read more…

Intel’s Server and PC Chip Development Will Blur After 2025

January 15, 2024

Intel's dealing with much more than chip rivals breathing down its neck; it is simultaneously integrating a bevy of new technologies such as chiplets, artificia Read more…

Baidu Exits Quantum, Closely Following Alibaba’s Earlier Move

January 5, 2024

Reuters reported this week that Baidu, China’s giant e-commerce and services provider, is exiting the quantum computing development arena. Reuters reported � Read more…

Leading Solution Providers

Contributors

Comparing NVIDIA A100 and NVIDIA L40S: Which GPU is Ideal for AI and Graphics-Intensive Workloads?

October 30, 2023

With long lead times for the NVIDIA H100 and A100 GPUs, many organizations are looking at the new NVIDIA L40S GPU, which it’s a new GPU optimized for AI and g Read more…

Shutterstock 1179408610

Google Addresses the Mysteries of Its Hypercomputer 

December 28, 2023

When Google launched its Hypercomputer earlier this month (December 2023), the first reaction was, "Say what?" It turns out that the Hypercomputer is Google's t Read more…

AMD MI3000A

How AMD May Get Across the CUDA Moat

October 5, 2023

When discussing GenAI, the term "GPU" almost always enters the conversation and the topic often moves toward performance and access. Interestingly, the word "GPU" is assumed to mean "Nvidia" products. (As an aside, the popular Nvidia hardware used in GenAI are not technically... Read more…

Shutterstock 1606064203

Meta’s Zuckerberg Puts Its AI Future in the Hands of 600,000 GPUs

January 25, 2024

In under two minutes, Meta's CEO, Mark Zuckerberg, laid out the company's AI plans, which included a plan to build an artificial intelligence system with the eq Read more…

Google Introduces ‘Hypercomputer’ to Its AI Infrastructure

December 11, 2023

Google ran out of monikers to describe its new AI system released on December 7. Supercomputer perhaps wasn't an apt description, so it settled on Hypercomputer Read more…

China Is All In on a RISC-V Future

January 8, 2024

The state of RISC-V in China was discussed in a recent report released by the Jamestown Foundation, a Washington, D.C.-based think tank. The report, entitled "E Read more…

Intel Won’t Have a Xeon Max Chip with New Emerald Rapids CPU

December 14, 2023

As expected, Intel officially announced its 5th generation Xeon server chips codenamed Emerald Rapids at an event in New York City, where the focus was really o Read more…

IBM Quantum Summit: Two New QPUs, Upgraded Qiskit, 10-year Roadmap and More

December 4, 2023

IBM kicks off its annual Quantum Summit today and will announce a broad range of advances including its much-anticipated 1121-qubit Condor QPU, a smaller 133-qu Read more…

  • arrow
  • Click Here for More Headlines
  • arrow
HPCwire