The challenges in silicon scaling and the demands of today’s data-intensive Artificial Intelligence (AI), High Performance Computing (HPC), and analytics workloads are forcing rapid growth in deployment of accelerated computing in our industry.  In addition, the next several years will see a new wave of disruptive memory technologies that will transform the economics of large memory deployments in support of these applications.  But this new wave of accelerators and disruptive technologies won’t add much value if the platform they’re running on wasn’t designed to unleash their potential.

OpenCAPI was developed to fuel this heterogeneous computing revolution by unleashing the potential of these new technologies!  New trends are emerging as accelerators become more commonplace and workloads are being re-written or developed from scratch with acceleration in mind.  Accelerators need improved access to the capacity and low cost per Gigabyte of system memory without the inefficiency of the IO subsystem; OpenCAPI achieves this by providing very high bandwidth with coherency.  The portion of the application running on the accelerator often requires fine-grained interaction with the portion of the application running on the CPU.  The programming complexity and CPU overhead required to communicate with a traditional I/O-attached accelerator makes this impractical, but OpenCAPI places the accelerator natively into the application’s user space to bring about this fine-grained interaction.  These trends led to the development of the OpenCAPI architecture.

To facilitate broad adoption, OpenCAPI was architected to minimize the amount and complexity of circuitry required in an accelerator. In the case of an FPGA, less than five percent of the logic is consumed. Placing the complexity in the CPU instead of the accelerator also allows OpenCAPI to be supportable across all CPU architectures.  Programing with OpenCAPI was also made easier with virtual addressing.  The OpenCAPI architecture also enables a heterogeneous data center environment by enabling not only accelerators but also coherent network controllers, and coherent storage controllers.  In addition, OpenCAPI enables both advanced memory with a wide range of access semantics from load/store to user-mode data transfer models, and access to classic DRAM memory with extremely low latencies.

With products launching now, OpenCAPI is becoming the open standard interface for high performance acceleration today.  As seen at SC17 in the OpenCAPI Consortium and development partners’ booths, there are a wide variety of OpenCAPI based products ranging from systems to components and additional hardware is being tested today in various laboratories.

Join a team that is driving to make a difference in our industry today!  Start by visiting the OpenCAPI Consortium website at www.opencapi.org to learn more including information about membership.  You can also download the protocol specifications after a simple registration process.  Visit the website or stop by the OpenCAPI Consortium booth #1587 at SC17 for more details.  The OpenCAPI Consortium is an open standards forum that is home to the OpenCAPI specifications, enablement, and has operating work groups including the TL and DL protocols, PHY, enablement, and more.  There are now over 30 members of which many are engaged in product development that leverages OpenCAPI technology.

Development Partner Quotes and Blog Links

Companies that are making a difference today include the following:

Mellanox Technologies recently announced the Innova-2 FPGA-based Programmable Adapter, an OpenCAPI based solution which will result in delivering innovative platforms for high-performance computing and deep learning applications.  “We are happy to demonstrate our Innova-2 FPGA-based programmable adapter supporting the OpenCAPI interface at the supercomputing conference 2017,” said Gilad Shainer, vice president of marketing at Mellanox Technologies. “The deep collaborations among the OpenCAPI consortium members enables Mellanox to introduce OpenCAPI based solutions to the market in a short time, which will result in delivering innovative platforms for high-performance computing and deep learning applications.” SC17 booth #653.

Molex Electronic Solutions showcased at SC17 the Flash Storage Accelerator (FSA) development platform which supports OpenCAPI natively and brings hyper converged accelerated storage to Google’s/Rackspace’s Zaius/Barreleye-G2 POWER9 OCP Platform.  “FSA is designed to natively support the benefits of OpenCAPI by providing the lowest possible latency and highest bandwidth to NVMe Storage with the added benefits of OpenCAPI Flash functionality and near storage FPGA acceleration,” said Allan Cantle, founder of Nallatech which was recently purchased by Molex.  “HPDA applications such as Graph Analytics, In-Memory Databases and Bioinformatics are expected to benefit greatly from this platform.” SC17 booth #1263.

Alpha Data Inc. offers OpenCAPI enabled FPGA accelerator boards, featuring Xilinx UltraScale+ FPGAs on POWER9 for high-performance, compute intensive cognitive workloads. “Alpha Data’s Xilinx® FPGA based boards provide the highest performance per watt, lowest latency and simple programming methods for heterogeneous processing systems using POWER architecture,” said Adam Smith, Director of Marketing.  SC17 booth #1838.

Xilinx, Inc. is the leading accelerator platform for OpenCAPI enabled All-Programmable FPGAs, SoCs, and 3DICs.  “Xilinx is pleased to be the accelerator of choice furthering the adoption of the OpenCAPI interface which enables new datacenter and high performance computing workloads,” said Ivo Bolsens, Senior Vice President and Chief Technology Officer, Xilinx. SC17 booth #681.

Amphenol Corporation announced their OpenCAPI FPGA Loop Back cable and OpenCAPI cable.  These enable testing and OpenCAPI accelerators to be connected to standard PCIe while signaling to the host processor through sockets attached to the main system board.  “We are excited to work on OpenCAPI solutions by leveraging our interconnect technology for improved signal integrity and increased bandwidth,” said Greg McSorley, Business Development Manager.

IBM rolled out the CORAL Program at SC17, demonstrating how acceleration is being leveraged by the U.S. Department of Energy’s Summit supercomputer. Coral is equipped with the POWER9 based AC922 system and NVIDIA’s newest Volta-based Tesla GPU accelerator.  “This system will be one of the fastest supercomputers in the world when fully operational next year,” said Brad McCredie, Vice President and IBM Fellow, Cognitive Systems Development. “It will push the frontiers of scientific computing, modeling and simulation.” SC17 booth #1525.

Western Digital is tracking OpenCAPI standards development while exploring OpenCAPI prototype memory and accelerator devices to standardize the process for key storage, memory and accelerator interfaces.  “OpenCAPI standardizes high speed serial, low latency interconnect for memory devices and accelerator devices, the key enablement technologies for new data center workloads focused on machine learning and artificial intelligence,” said Zvonimir Bandic, Sr. Director, Next Generation Platform Technologies, Western Digital.  SC17 booth #643.

Micron is working to unlock the next generation of memory technology with the development of new interface standards such as OpenCAPI in their current and future products. “Unlocking next generations of acceleration and machine learning will require the development of new interface standards such as OpenCAPI,” said Jon Carter, VP-Emerging Memory, Business Development.  “Micron continues to support these standards-setting activities to develop differentiated platforms that leverage Micron’s current and future products.” SC17 booth #1963.

Rackspace is at center stage in the OpenCAPI ecosystem, working with Google to make its two socket POWER9 server, Zaius/Barreleye G2, an appealing development platform for accelerators in the Open Compute community. “The OpenCAPI accelerator and software ecosystem is growing rapidly” said Adi Gangidi, Senior Design Engineer with Rackspace. “With design, manufacturing and firmware collateral available via the Open Compute website, accelerator developers find it easy to design and test their solutions on our platform.”

Tektronix offers test solutions that are applicable to OpenCAPI’s physical layer standards capable of testing at 25Gbps and beyond.  Tektronix offers best-in-class solutions for receiver and transmitter characterization, automation, and debug supporting data rates through 32Gb/s.  “We are excited to be a Contributing Member of the OpenCAPI Consortium,” said Joe Allen, Market Segment Lead at Tektronix.  “Tektronix provides unique tools that are widely used within the Data Center and are scalable for OpenCAPI and we look forward to deliver comprehensive test and characterization solutions in this emerging market.”

Toshiba Electronic Devices & Storage Corp. is working on custom silicon design platforms that enable users to rapidly develop and deploy OpenCAPI based accelerator solutions in the computing, storage and networking space. “We are excited about the tremendous interest in custom silicon for machine learning and AI accelerators,” said Yukihiro Urakawa, Vice President, Logic LSI Division. “By offering pre-verified OpenCAPI sub-system IP in our custom silicon portfolio, we look forward to seeing very high performance, power optimized accelerators that take full advantage of the OpenCAPI interface.”

Wistron unveiled their POWER9 system design at SC17 that incorporated OpenCAPI technology through the 25Gbps high speed links.  “In order to provide the best backend architecture in AI, Big Data, and Cloud applications, Wistron POWER9 system design incorporates OpenCAPI technology through 25Gbps high speed link to dramatically change the traditional data transition method. This design not only improves GPU performance, but also utilizes next generation advanced memory, coherent network, storage, and FPGA. This is an ideal system infrastructure to meet next decade computing world challenges,” said Donald Hwang, Chief Technology Officer and President of EBG at Wistron Corporation.

Inventec introduced and demonstrated the Lan Yang system based on the Open Compute Project (OCP) platform.  “Two POWER9 processors and state of the art bus technology including OpenCAPI and PCIe Gen4 provides the basis for the most advanced technologies for 48V Open Power solutions,” said Lynn Chiu of Inventec.  “We took in one step further and added AST2500 for smart management and OCP Mezz 2.0 slots for expansion and heterogeneous infrastructure to support dedicated customer’s requirement for data center applications.”