The latest revolution in HPC and Artificial Intelligence is reflected in the effort around the new Data-Centric architecture. This architecture recognizes that data is the most important asset to any organization or business, and our ability to find insights, design new products and enhance science depends on the ability to analyze the growing amounts of data, as fast as possible. The old data center concept of CPU-Centric architecture has reached the limits of its scalability. Compute and storage infrastructures need to design not around the CPU but around the data, which means the ability to analyze data everywhere. Therefore the new generations of data center interconnect, will incorporate In-Network Computing technologies that share the responsibility for handling and accelerating application workloads.

Interconnects based on In-Networking computing enable offloading not only the entire range of network functions from the CPU to the network (aka network transport and RDMA), but various  data algorithms as well. Offloading data algorithms to the network allows users to run these algorithms on the data while the data is being transferred within the system interconnect, rather than waiting for the data to reach a CPU. In-Network Computing transforms the data center interconnect into a “distributed CPU,” and “distributed memory,” to overcome performance bottlenecks and enable faster and more scalable data analysis. One of the leading technologies under the In-Networking Computing architecture is Scalable Hierarchal Aggregation and Reduction Protocol (SHARP)™.

Collective communication is a term used to describe communication patterns amongst all members of a communication endpoint group. For example, in the case of Message Passing Interface (MPI), the communication end-points are MPI processes and the groups associated with the collective operation are described by the local and remote groups associated with the MPI communicator. Generally, one may define many types of collective operations. The MPI standard defines blocking and non-blocking forms of barrier synchronization, broadcast, gather, scatter, gather to all, all-to-all gather/scatter, reduction, reduce-scatter, and scan. The OpenSHMEM specification defines blocking barrier synchronization, broadcast, collect, and reduction forms of collective operations.

The performance of collective operations for applications that use such functions is often critical to the overall performance of these applications, as it defines performance and scalability. Additionally, the explicit coupling between communication end-points tends to magnify the effects of system noise on the parallel applications by delaying one or more data exchanges, resulting in further application scalability challenges. Enhancing operational performance can no longer by achieved by merely adding more CPUs. In fact, adding more CPUs to the system can actually hurt the collective’s performance and increase operational latency.

On account of the large impact collective operations has on overall application performance and scalability, Mellanox has invested considerable effort in optimizing the performance of such operations. This includes enhancing the Host Channel Adapter (HCA) with CORE-Direct™ application offloading technology, which was developed jointly by Mellanox and Oak Ridge National Laboratory and received the R&D100 award.

SHARP further improves the performance of collective operations by processing the data as it traverses the network, eliminating the need to send data multiple times between end-points. The first stage of SHARP introduced with the EDR InfiniBand generation, supports performance- critical barrier and small data reduction collective operations. The second generation of SHARP to be introduced with the HDR InfiniBand generation extends support for large data collectives as well.

Figure 1 and 2 demonstrate the performance advantages of SHARP, using the MPI AllReduce collective operation. The testing was implemented on the new InfiniBand-accelerated Dragonfly+ Niagara supercomputer, the fastest supercomputer in Canada. Niagara, which is owned by the University of Toronto and operated by SciNet, is designed to enable large parallel jobs. Niagara was designed to optimize throughput of a range of scientific codes running at scale, energy efficiency, and network and storage performance and capacity. Niagara consists of 1500 nodes, each node has 40 Intel Skylake cores at 2.4GHz, for a total of 60,000 cores, and 202 GB of RAM per node, all connected with EDR InfiniBand network in a Dragonfly+ topology.

Both graphs demonstrated the performance advantages of SHARP – including a dramatic reduction in AllReduce latency – up to 8X higher performance, combined with a reduction in data motion and of course, in CPU utilization, which means freeing up CPU cycles needed for other tasks.

Scalable Hierarchal Aggregation and Reduction Protocol (SHARP) technology is one of the main In-Network Computing architecture elements. Other technologies include the ability to offload MPI Tag-Matching and the MPI Rendezvous protocol from the CPU (software) to the network. In-Network Computing is the cutting-edge advantage of InfiniBand interconnect. It feeds intelligence into the network that connects the top supercomputers around the word, accelerating high-performance computing and artificial intelligence applications.