What’s Hot and What’s Not at ISC 2018?

By Dairsie Latimer

June 22, 2018

Editor’s note: Tick tock. It’s the final countdown to one of the most well-attended HPC events of the year. Red Oak’s Dairsie Latimer shares his perspective on the standout themes in play.

As the calendar rolls around to late June we see the ISC conference, held in Frankfurt (June 24th-28th), heave into view. With some of the pre-show announcements already starting to roll out, what do we think some of the main talking points will be next week?

There’s already been some press around the Summit machine at ORNL, with the traditional peak DP FLOPS (and the associated Linpack run for the Top500) taking a slight back seat to the new maths of exaops (counted in single and reduced precision FLOPS). Apart from some dubious interpretation of the numbers from the perspective of us HPC types, the decision to quote figures in exaops (as opposed to DP FLOPS) does represent an apparent symbolic shift in emphasis for scientific computing.

The apparent press confusion, over how fast and by what margin Summit would lead the Chinese competition when the Top500 list is announced next week, was probably fuelled as much by jingoism as any practical confusion over the metrics for comparison.

There’s been plenty of commentary around the new accounting methods (in terms of claiming bragging rights) but it does raise a serious point – workloads are becoming more diverse and mixed precision is a good thing, especially for ML and DL. The confluence of traditional HPC simulation, big data analytics and ML with DL thrown in for good measure, means the relevance of LINPACK as a benchmark is more tenuous than ever. We’re back to the mantra, “Benchmark. Benchmark. Benchmark again.”, and not just purely synthetic workloads. Do it with your own applications and real data if you can. Turn on all your IO, job profiling and stats gathering because they can have a surprising effect on actual performance.

Prof. Bryan Lawrence[1] has an interesting recent presentation to the EuroHPC Requirements Workshop where he discusses amongst other things the performance metrics (measure of speed) in the context of Climate and Weather science (but the concept can easily be extended to all other domains). His very reasonable contention is that what users really care about is Simulated Years Per (real) Day (SYPD) or equivalent and that when you take into account the costs required to achieve different levels of performance at certain resolutions and with differing levels of complexity (numbers of physical parameters etc) you have populated the matrix which informs the scope of the procurement and likely technological approaches.

Anyway, I digress. We also have another interesting pre-announcement which is the system architecture of Sandia’s Astra (based on Cavium’s ThunderX2s and HPE Apollo 70s). It will be interesting to see where this system lands later in the year (somewhere just inside the November Top100 I suspect) but it will probably be one of the first major deployments (multi-petaflops) of an ARM based HPC system (but props to the GW4 collaborators in the UK for leading the way).

We have plenty of noise being made by non-Intel CPU vendors this June, which leads us to the inevitable twice yearly juggling of Intel’s Xeon product roadmap due to the issues surrounding their 10 nm process transition. Do they need 10 nm to make good CPUs? Manifestly not. But the multi-year delays 10 nm has experienced have probably been directly implicated in the mercy killing of Xeon Phi, the rejigging of the Aurora system architecture, as well as significant disruption to other product roadmaps, just at a time their potential competitors in the datacentre are starting to hit their stride.

Apparently Intel’s (now former) CEO Brian Krzanich has said to analysts “that it was Intel’s job not to let AMD capture 15-20% market share.” (See HPCwire coverage here.) Even in a growth market and assuming this is units shipped rather than revenue, that would still represent a pretty big dent in x86 revenues for Intel and that’s not factoring in the single digit slice that ARM and IBM are likely to capture. Perhaps this is a deliberately pessimistic assessment by Intel to help soften the market reaction in the next FY?

AMD while not yet making significant inroads into the datacentre have definitely started to chip away with the first generation Epyc CPUs, with projections in the 5 percent range by Q4 2018, and the latest 7 nm core will add some additional impetus given Intel’s problems delivering their equivalent 10 nm products.

Outside the x86 space, Intel have also been talking about Optane DIMMs and their decision to go back into the discrete GPU market again. The first is just late, but full of potential, the second seems like a distraction they can ill afford if it is really also targeted at the datacentre. Intel have quite a few irons in the fire, and at least on paper, and four competing (Intel would probably prefer the term complementary) ML/DL strategies. The Nervana acquisition has yet to bear fruit in the ML/DL space (now pushed back into 2019), the Xeon+FPGA strategy is likely to be too costly for deployment in general HPC procurements, Knights Mill was presumably also rounded up with the other Knights and quietly sent to the glue factory, so for the time being stock Xeon is a perfectly effective platform for inference workloads (actually using the trained models). That’s assuming you can work out how to deploy ML and DL using the plethora of competing frameworks (TensorFlow, Caffe2, CNTK, etc.) in a production environment. This brings us on neatly onto three of the most interesting topics at ISC from our perspective:

  • Beyond Moore’s Law
  • The Rise of Containerized HPC
  • Artificial Intelligence on HPC Platforms

The first hopefully will be an interesting summary of the changes that we as system and software engineers, as well as users will expect to see over the next three to five years, and how that will inevitably impact the HPC application software stack.

The last two are in my mind are currently intertwined. ML/DL is currently the Wild West of scientific and computer science research, with vast unexplored tracts of new territory and exciting things to see and discover. It’s also a lawless place, with various competing interests pushing ahead to further their own interests and agendas. The fact that these frameworks are churning so fast, means that they are practically impossible to deploy in any conventional HPC production environment.

This of course is where containerisation comes in and everyone I know will be tracking this with some interest. While Docker has the hearts and minds of the ML/DL researchers, because they typically work on single tenanted, or at least single use, GPU heavy boxes (think DGX systems from NVIDIA) where being root isn’t necessarily anathema. However no self-respecting HPC centre will deploy Docker on its general use HPC systems so that leaves Singularity as the most oft cited container platform of interest for production HPC systems. I’ll be really interested to see how software as infrastructure, containerisation, automated build and test, deployment and provisioning systems adapt over the next six to twelve months. I’m hoping that the Machine Learning day will cover or initiate serious discussions on at least some of these issues.

About the Author

Dairsie Latimer, Technical Advisor at Red Oak Consulting, has a somewhat eclectic background, having worked in a variety of roles on supplier side and client side across the commercial and public sectors as an consultant and software engineer. Following an early career in computer graphics, micro-architecture design and full stack software development, he has over twelve years’ specialist experience in the HPC sector, ranging from developing low-level libraries and software for novel computing architectures to porting complex HPC applications to a range of accelerators. Dairise joined Red Oak Consulting (@redoakHPC) in 2010 bringing his wealth of experience to both the business and customers.

[1] NCAS, University of Reading

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