In this bimonthly feature, HPCwire highlights newly published research in the high-performance computing community and related domains. From parallel programming to exascale to quantum computing, the details are here.

Examining networking and communication challenges for post-exascale systems

Even with exascale still on the horizon, researchers are already beginning to look ahead to the post-exascale era. In this study, a team from Ohio State University took a closer look at the networking and communication challenges that are likely to face post-exascale systems. They present their vision of post-exascale architectures, summarize the challenges from a variety of perspectives, and outline potential roadblocks to designing efficient programming model support for those systems.

Authors: Dhabaleswar Panda, Xiao-Yi Lu and Hari Subramoni

Developing a computational chemistry framework for the exascale era

NWChem has arguably been the de facto standard for running high-accuracy computational chemistry simulations on powerful supercomputers – and it’s being rewritten for the exascale era. In this paper, researchers from Ames Laboratory, Argonne National Laboratory, Virginia Tech, Brookhaven National Laboratory, and Lawrence Berkeley National Laboratory discuss the rewriting effort. They focus on the Simulation Development Enviornment (SDE) upon which NWChemEx is based.

Authors: Ryan M. Richard, Colleen Bertoni, Jeffery S. Boschen, Kristopher Keipert, Benjamin Pritchard, Edward F. Valeev, Robert J. Harrison, Wibe A. De Jong and Theresa L. Windus

Migrating astrophysical code into the exascale era

Other fields are also preparing for the exascale era. In this paper, researchers from the Astronomical Observatory of Trieste in Italy outlines their testing process for migrating their astrophysical code to exascale systems. The researchers describe their test system, outline how they re-engineered their application and show their first results.

Authors: D. Goz, S. Bertocco, L. Tornatore and G. Taffoni

Exploring high-performance processor architecture beyond the exascale

In this paper, the authors – a pair of researchers from the State Key Laboratory of Mathematical Engineering and Advanced Computing in China – take another look beyond the exascale. The paper focuses on three architecture design goals for HPC processors in a post-exascale era: effective performance scaling, efficient resource utilization, and adaptation to diverse applications. The authors propose a high-performance many-core processor architecture aimed at achieving those goals.

Authors: Xiang-Hui Xie and Xun Jia

Scaling high-performance parallel file systems in the cloud

High-performance parallel file systems such as Lustre, BeeGFS, and Gluster allow research workflows to scale. In this paper, a team from the University of Washington and Argonne National Laboratory discuss a project aimed at developing infrastructure to scalably deploy and tune each parallel file system in an array of environments – specifically, public and academic clouds – to explore the feasibility of cloud solutions for HPC workflows.

Authors: James Beckett, Eric Kim, Evan Stanton, David Liu, Vishank Rughwani, Seungmin Hwang, Joaquin Chung, Rob Fatland and Nam Pho

Cooperative preprocessing on HPC systems

Data throughput needs for HPC systems are rapidly increasing. In this paper, a team of researchers from the State Key Laboratory of Mathematical Engineering and Advanced Computing and the National Supercomputer Center of Wuxi discuss the questions and opportunities posed by data preprocessing. They propose a preprocessing model for data-intensive applications in HPC systems.

Authors: Rujun Sun, Lufei Zhang and Xiyang Wang

Developing a directive-based high-level programming framework for reconfigurable HPC

Accelerator-based heterogeneous computing has become a popular solution for energy-efficient HPC. FPGAs have traditionally offered more advantages compared to other accelerators, but also suffer from disadvantages in programmability and portability. In this paper, researchers from the University of Oregon and Oak Ridge National Laboratory present a directive-based, high-level programming framework for high-performance reconfigurable computing and outline the results of preliminary testing.

Authors: Seyong Lee, Jacob Lambert, Jungwon Kim, Jeffrey S. Vetter and Allen D. Malony

Do you know about research that should be included in next month’s list? If so, send us an email at [email protected]. We look forward to hearing from you.