Overcoming Network and Storage Bottlenecks in HPC & AI

March 11, 2019

As processors and data storage drives grow bigger and faster, they can easily overwhelm networks, creating the need for new networking and system I/O approaches.

It wasn’t that many years ago that 10GbE networks seemed like the be-all and end-all for high-performance computing. Who would ever need more bandwidth than that? Well, fast forward to the present. As many organizations have found, 10GbE, and even 25GbE and 40GbE, can’t deliver the throughput demanded by bandwidth-hungry HPC workloads, including high-performance data analytics, AI, machine learning and deep learning.

Here’s the problem. With data-intensive applications, the network can create bottlenecks that limit the performance gains made possible by Intel® Optane storage, multi-core CPUs and other technology advances. While drives and processors are getting bigger and faster, the speed at which data moves is limited by the bandwidth of the network, along with system I/O, and that puts a damper on what matters most — the responsiveness of the application.

When a fraud-prevention system or a real-time stock-trading application is making split-second decisions, there’s no time for system latency. Milliseconds matter. Network latency also matters to countless other HPC use cases, from training machine learning models to extracting life-saving insights from genomic data. Slower networks mean slower time to insight. And that’s a problem for today’s workloads that are running up against network limitations in HPC systems.

Breaking through bottlenecks

There are many ways to break through bottlenecks and some lessons learned from office systems. The IT team at the University of Pisa is leveraging a network architecture to improve the performance of its Storage Spaces Direct environment, which incorporates lightning-fast NVMe drives.

“The network has become again the bottleneck of a system, mostly because of NVMe drives,” Antonio Cisternino, the university’s chief information officer, notes in a Dell EMC case study. “Four NVMe drives, aggregated, are capable of generating around 11 gigabits per second of bandwidth, which tops a 100-gigabit connection. They may saturate and block I/O with just four drives.”[1]

To get around this bottleneck, the IT pros at the University of Pisa used Dell EMC S5048-ON switches to build what amounts to a bigger highway in their Storage Spaces Direct environment. A spine-leaf network design gives every server access to two lanes of 25Gb RoCE — RDMA over Converged Ethernet — to move data in and out of the NVMe drives. This results in an aggregate bandwidth of 50Gb/sec, which helps ensure that the network won’t be much of a bottleneck in the system.

A high-performance file system

In HPC systems, data transfer rates are only part of the latency story. There is also the closely aligned issue of file system I/O performance, which can impact the speed at which data is transferred across the network. As a researcher from Lawrence Berkeley National Laboratory notes, “if data is being transferred to a busy file system the transfer rate would be slower than a file system at regular activity levels.”[2]

In Australia, the Commonwealth Scientific and Industrial Research Organisation (CSIRO) is addressing this issue via a storage upgrade to remove file-system bottlenecks across its HPC clusters. It has contracted with Dell EMC for a new, higher-performance file system to be shared across all of its in-house supercomputers, according to Australia’s iTnews.[3]

The new file system will be based on Dell EMC PowerEdge™ R740 servers with Intel® Xeon® Scalable processors and will include 2 PB of NVMe-based storage from Intel, iTnews reports. This upgrade will help CSIRO avoid I/O bottlenecks and harness the full potential of its HPC systems, including its new Dell EMC-based Bracewell supercomputer.

“As our users became accustomed to the new capability of the Bracewell cluster, we anticipated that the IO performance of the filesystem would become a bottleneck restricting the performance of some of our users’ codes,” a CSIRO spokesperson told iTnews. “This upgrade will remove that bottleneck.”

Key takeaways

With today’s data-intensive applications, HPC administrators must look closely at network and system I/O architectures. Data is not slowing down, and HPC systems need to keep all those bits and bytes moving in step with ever-faster processors and ever-faster storage media.

This is the way it is in a world where HPC, data analytics and AI are rapidly converging. And this convergence calls for creative approaches to avoid bottlenecks caused by network and system I/O constraints.

To learn more

For a closer look at the University of Pisa’s Storage Spaces Direct environment, read the Dell EMC case study “Storage Success.” And to explore the technologies for HPC and AI in a converged world, visit dellemc.com/hpc and dellemc.com/ai.

 

The Convergence of HPC, Analytics and AI

High-performance computing, data analytics and artificial intelligence no longer live in separate domains. These complementary technologies are rapidly converging as organizations work to gain greater value from the data they capture and store.


[1] Dell EMC case study, “Storage Success,” June 2018.

[2] Karen Tu, Lawrence Berkeley National Laboratory, “Identifying Network Data Transfer Bottlenecks in HPC Systems,” abstract, SC18 presentation.

[3] iTnews, “CSIRO removes HPC ‘bottleneck’ with storage upgrade,” July 6, 2018.

 

Subscribe to HPCwire's Weekly Update!

Be the most informed person in the room! Stay ahead of the tech trends with industy updates delivered to you every week!

SC19’s HPC Impact Showcase Chair: AI + HPC a ‘Speed Train’

November 16, 2019

This year’s chair of the HPC Impact Showcase at the SC19 conference in Denver is Lori Diachin, who has spent her career at the spearhead of HPC. Currently deputy director for the U.S. Department of Energy’s (DOE) Read more…

By Doug Black

Microsoft Azure Adds Graphcore’s IPU

November 15, 2019

Graphcore, the U.K. AI chip developer, is expanding collaboration with Microsoft to offer its intelligent processing units on the Azure cloud, making Microsoft the first large public cloud vendor to offer the IPU designe Read more…

By George Leopold

At SC19: What Is UrgentHPC and Why Is It Needed?

November 14, 2019

The UrgentHPC workshop, taking place Sunday (Nov. 17) at SC19, is focused on using HPC and real-time data for urgent decision making in response to disasters such as wildfires, flooding, health emergencies, and accidents. We chat with organizer Nick Brown, research fellow at EPCC, University of Edinburgh, to learn more. Read more…

By Tiffany Trader

China’s Tencent Server Design Will Use AMD Rome

November 13, 2019

Tencent, the Chinese cloud giant, said it would use AMD’s newest Epyc processor in its internally-designed server. The design win adds further momentum to AMD’s bid to erode rival Intel Corp.’s dominance of the glo Read more…

By George Leopold

NCSA Industry Conference Recap – Part 1

November 13, 2019

Industry Program Director Brendan McGinty welcomed guests to the annual National Center for Supercomputing Applications (NCSA) Industry Conference, October 8-10, on the University of Illinois campus in Urbana (UIUC). One hundred seventy from 40 organizations attended the invitation-only, two-day event. Read more…

By Elizabeth Leake, STEM-Trek

AWS Solution Channel

Making High Performance Computing Affordable and Accessible for Small and Medium Businesses with HPC on AWS

High performance computing (HPC) brings a powerful set of tools to a broad range of industries, helping to drive innovation and boost revenue in finance, genomics, oil and gas extraction, and other fields. Read more…

IBM Accelerated Insights

Data Management – The Key to a Successful AI Project

 

Five characteristics of an awesome AI data infrastructure

[Attend the IBM LSF & HPC User Group Meeting at SC19 in Denver on November 19!]

AI is powered by data

While neural networks seem to get all the glory, data is the unsung hero of AI projects – data lies at the heart of everything from model training to tuning to selection to validation. Read more…

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing components with Intel Xeon, AMD Epyc, IBM Power, and Arm server ch Read more…

By Tiffany Trader

SC19’s HPC Impact Showcase Chair: AI + HPC a ‘Speed Train’

November 16, 2019

This year’s chair of the HPC Impact Showcase at the SC19 conference in Denver is Lori Diachin, who has spent her career at the spearhead of HPC. Currently Read more…

By Doug Black

Cray, Fujitsu Both Bringing Fujitsu A64FX-based Supercomputers to Market in 2020

November 12, 2019

The number of top-tier HPC systems makers has shrunk due to a steady march of M&A activity, but there is increased diversity and choice of processing compon Read more…

By Tiffany Trader

Intel AI Summit: New ‘Keem Bay’ Edge VPU, AI Product Roadmap

November 12, 2019

At its AI Summit today in San Francisco, Intel touted a raft of AI training and inference hardware for deployments ranging from cloud to edge and designed to support organizations at various points of their AI journeys. The company revealed its Movidius Myriad Vision Processing Unit (VPU)... Read more…

By Doug Black

IBM Adds Support for Ion Trap Quantum Technology to Qiskit

November 11, 2019

After years of percolating in the shadow of quantum computing research based on superconducting semiconductors – think IBM, Rigetti, Google, and D-Wave (quant Read more…

By John Russell

Tackling HPC’s Memory and I/O Bottlenecks with On-Node, Non-Volatile RAM

November 8, 2019

On-node, non-volatile memory (NVRAM) is a game-changing technology that can remove many I/O and memory bottlenecks and provide a key enabler for exascale. That’s the conclusion drawn by the scientists and researchers of Europe’s NEXTGenIO project, an initiative funded by the European Commission’s Horizon 2020 program to explore this new... Read more…

By Jan Rowell

MLPerf Releases First Inference Benchmark Results; Nvidia Touts its Showing

November 6, 2019

MLPerf.org, the young AI-benchmarking consortium, today issued the first round of results for its inference test suite. Among organizations with submissions wer Read more…

By John Russell

Azure Cloud First with AMD Epyc Rome Processors

November 6, 2019

At Ignite 2019 this week, Microsoft's Azure cloud team and AMD announced an expansion of their partnership that began in 2017 when Azure debuted Epyc-backed instances for storage workloads. The fourth-generation Azure D-series and E-series virtual machines previewed at the Rome launch in August are now generally available. Read more…

By Tiffany Trader

Nvidia Launches Credit Card-Sized 21 TOPS Jetson System for Edge Devices

November 6, 2019

Nvidia has launched a new addition to its Jetson product line: a credit card-sized (70x45mm) form factor delivering up to 21 trillion operations/second (TOPS) o Read more…

By Doug Black

Supercomputer-Powered AI Tackles a Key Fusion Energy Challenge

August 7, 2019

Fusion energy is the Holy Grail of the energy world: low-radioactivity, low-waste, zero-carbon, high-output nuclear power that can run on hydrogen or lithium. T Read more…

By Oliver Peckham

Using AI to Solve One of the Most Prevailing Problems in CFD

October 17, 2019

How can artificial intelligence (AI) and high-performance computing (HPC) solve mesh generation, one of the most commonly referenced problems in computational engineering? A new study has set out to answer this question and create an industry-first AI-mesh application... Read more…

By James Sharpe

Cray Wins NNSA-Livermore ‘El Capitan’ Exascale Contract

August 13, 2019

Cray has won the bid to build the first exascale supercomputer for the National Nuclear Security Administration (NNSA) and Lawrence Livermore National Laborator Read more…

By Tiffany Trader

DARPA Looks to Propel Parallelism

September 4, 2019

As Moore’s law runs out of steam, new programming approaches are being pursued with the goal of greater hardware performance with less coding. The Defense Advanced Projects Research Agency is launching a new programming effort aimed at leveraging the benefits of massive distributed parallelism with less sweat. Read more…

By George Leopold

AMD Launches Epyc Rome, First 7nm CPU

August 8, 2019

From a gala event at the Palace of Fine Arts in San Francisco yesterday (Aug. 7), AMD launched its second-generation Epyc Rome x86 chips, based on its 7nm proce Read more…

By Tiffany Trader

D-Wave’s Path to 5000 Qubits; Google’s Quantum Supremacy Claim

September 24, 2019

On the heels of IBM’s quantum news last week come two more quantum items. D-Wave Systems today announced the name of its forthcoming 5000-qubit system, Advantage (yes the name choice isn’t serendipity), at its user conference being held this week in Newport, RI. Read more…

By John Russell

Ayar Labs to Demo Photonics Chiplet in FPGA Package at Hot Chips

August 19, 2019

Silicon startup Ayar Labs continues to gain momentum with its DARPA-backed optical chiplet technology that puts advanced electronics and optics on the same chip Read more…

By Tiffany Trader

Crystal Ball Gazing: IBM’s Vision for the Future of Computing

October 14, 2019

Dario Gil, IBM’s relatively new director of research, painted a intriguing portrait of the future of computing along with a rough idea of how IBM thinks we’ Read more…

By John Russell

Leading Solution Providers

ISC 2019 Virtual Booth Video Tour

CRAY
CRAY
DDN
DDN
DELL EMC
DELL EMC
GOOGLE
GOOGLE
ONE STOP SYSTEMS
ONE STOP SYSTEMS
PANASAS
PANASAS
VERNE GLOBAL
VERNE GLOBAL

Intel Confirms Retreat on Omni-Path

August 1, 2019

Intel Corp.’s plans to make a big splash in the network fabric market for linking HPC and other workloads has apparently belly-flopped. The chipmaker confirmed to us the outlines of an earlier report by the website CRN that it has jettisoned plans for a second-generation version of its Omni-Path interconnect... Read more…

By Staff report

Kubernetes, Containers and HPC

September 19, 2019

Software containers and Kubernetes are important tools for building, deploying, running and managing modern enterprise applications at scale and delivering enterprise software faster and more reliably to the end user — while using resources more efficiently and reducing costs. Read more…

By Daniel Gruber, Burak Yenier and Wolfgang Gentzsch, UberCloud

Dell Ramps Up HPC Testing of AMD Rome Processors

October 21, 2019

Dell Technologies is wading deeper into the AMD-based systems market with a growing evaluation program for the latest Epyc (Rome) microprocessors from AMD. In a Read more…

By John Russell

Rise of NIH’s Biowulf Mirrors the Rise of Computational Biology

July 29, 2019

The story of NIH’s supercomputer Biowulf is fascinating, important, and in many ways representative of the transformation of life sciences and biomedical res Read more…

By John Russell

Xilinx vs. Intel: FPGA Market Leaders Launch Server Accelerator Cards

August 6, 2019

The two FPGA market leaders, Intel and Xilinx, both announced new accelerator cards this week designed to handle specialized, compute-intensive workloads and un Read more…

By Doug Black

When Dense Matrix Representations Beat Sparse

September 9, 2019

In our world filled with unintended consequences, it turns out that saving memory space to help deal with GPU limitations, knowing it introduces performance pen Read more…

By James Reinders

With the Help of HPC, Astronomers Prepare to Deflect a Real Asteroid

September 26, 2019

For years, NASA has been running simulations of asteroid impacts to understand the risks (and likelihoods) of asteroids colliding with Earth. Now, NASA and the European Space Agency (ESA) are preparing for the next, crucial step in planetary defense against asteroid impacts: physically deflecting a real asteroid. Read more…

By Oliver Peckham

Cerebras to Supply DOE with Wafer-Scale AI Supercomputing Technology

September 17, 2019

Cerebras Systems, which debuted its wafer-scale AI silicon at Hot Chips last month, has entered into a multi-year partnership with Argonne National Laboratory and Lawrence Livermore National Laboratory as part of a larger collaboration with the U.S. Department of Energy... Read more…

By Tiffany Trader

  • arrow
  • Click Here for More Headlines
  • arrow
Do NOT follow this link or you will be banned from the site!
Share This